si.c revision 1.16 1 1.16 gwr /* $NetBSD: si.c,v 1.16 1995/05/24 20:52:27 gwr Exp $ */
2 1.8 cgd
3 1.1 glass /*
4 1.2 gwr * Copyright (C) 1994 Adam Glass, Gordon W. Ross
5 1.1 glass * Copyright (C) 1993 Allen K. Briggs, Chris P. Caputo,
6 1.1 glass * Michael L. Finch, Bradley A. Grantham, and
7 1.1 glass * Lawrence A. Kesteloot
8 1.1 glass * All rights reserved.
9 1.1 glass *
10 1.1 glass * Redistribution and use in source and binary forms, with or without
11 1.1 glass * modification, are permitted provided that the following conditions
12 1.1 glass * are met:
13 1.1 glass * 1. Redistributions of source code must retain the above copyright
14 1.1 glass * notice, this list of conditions and the following disclaimer.
15 1.1 glass * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 glass * notice, this list of conditions and the following disclaimer in the
17 1.1 glass * documentation and/or other materials provided with the distribution.
18 1.1 glass * 3. All advertising materials mentioning features or use of this software
19 1.1 glass * must display the following acknowledgement:
20 1.1 glass * This product includes software developed by the Alice Group.
21 1.1 glass * 4. The names of the Alice Group or any of its members may not be used
22 1.1 glass * to endorse or promote products derived from this software without
23 1.1 glass * specific prior written permission.
24 1.1 glass *
25 1.1 glass * THIS SOFTWARE IS PROVIDED BY THE ALICE GROUP ``AS IS'' AND ANY EXPRESS OR
26 1.1 glass * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
27 1.1 glass * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 1.1 glass * IN NO EVENT SHALL THE ALICE GROUP BE LIABLE FOR ANY DIRECT, INDIRECT,
29 1.1 glass * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
30 1.1 glass * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31 1.1 glass * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32 1.1 glass * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33 1.1 glass * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34 1.1 glass * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 1.1 glass */
36 1.1 glass
37 1.14 gwr #define DEBUG 1
38 1.2 gwr
39 1.2 gwr /* XXX - Need to add support for real DMA. -gwr */
40 1.2 gwr /* #define PSEUDO_DMA 1 (broken) */
41 1.1 glass
42 1.1 glass #include <sys/types.h>
43 1.1 glass #include <sys/malloc.h>
44 1.1 glass #include <sys/param.h>
45 1.1 glass #include <sys/systm.h>
46 1.1 glass #include <sys/errno.h>
47 1.1 glass #include <sys/buf.h>
48 1.1 glass #include <sys/proc.h>
49 1.1 glass #include <sys/user.h>
50 1.1 glass #include <sys/device.h>
51 1.1 glass
52 1.1 glass #include <machine/autoconf.h>
53 1.1 glass #include <machine/isr.h>
54 1.1 glass #include <machine/obio.h>
55 1.1 glass
56 1.2 gwr #include <scsi/scsi_all.h>
57 1.2 gwr #include <scsi/scsi_debug.h>
58 1.2 gwr #include <scsi/scsiconf.h>
59 1.2 gwr
60 1.1 glass #include "scsi_defs.h"
61 1.1 glass #include "scsi_5380.h"
62 1.14 gwr #include "scsi_sunsi.h"
63 1.14 gwr
64 1.14 gwr #ifdef DEBUG
65 1.14 gwr static int si_debug = 0;
66 1.14 gwr static int si_flags = 0 /* | SDEV_DB2 */ ;
67 1.14 gwr #endif
68 1.1 glass
69 1.1 glass #define SCI_PHASE_DISC 0 /* sort of ... */
70 1.10 gwr #define SCI_CLR_INTR(regs) ((volatile)(regs->sci_iack))
71 1.1 glass #define SCI_ACK(ptr,phase) (ptr)->sci_tcmd = (phase)
72 1.1 glass #define SCSI_TIMEOUT_VAL 10000000
73 1.1 glass #define WAIT_FOR_NOT_REQ(ptr) { \
74 1.1 glass int scsi_timeout = SCSI_TIMEOUT_VAL; \
75 1.1 glass while ( ((ptr)->sci_bus_csr & SCI_BUS_REQ) && \
76 1.1 glass ((ptr)->sci_bus_csr & SCI_BUS_REQ) && \
77 1.1 glass ((ptr)->sci_bus_csr & SCI_BUS_REQ) && \
78 1.1 glass (--scsi_timeout) ); \
79 1.1 glass if (!scsi_timeout) { \
80 1.2 gwr printf("scsi timeout--WAIT_FOR_NOT_REQ---%s, line %d.\n", \
81 1.2 gwr __FILE__, __LINE__); \
82 1.1 glass goto scsi_timeout_error; \
83 1.1 glass } \
84 1.1 glass }
85 1.1 glass #define WAIT_FOR_REQ(ptr) { \
86 1.1 glass int scsi_timeout = SCSI_TIMEOUT_VAL; \
87 1.1 glass while ( (((ptr)->sci_bus_csr & SCI_BUS_REQ) == 0) && \
88 1.1 glass (((ptr)->sci_bus_csr & SCI_BUS_REQ) == 0) && \
89 1.1 glass (((ptr)->sci_bus_csr & SCI_BUS_REQ) == 0) && \
90 1.1 glass (--scsi_timeout) ); \
91 1.1 glass if (!scsi_timeout) { \
92 1.2 gwr printf("scsi timeout--WAIT_FOR_REQ---%s, line %d.\n", \
93 1.2 gwr __FILE__, __LINE__); \
94 1.1 glass goto scsi_timeout_error; \
95 1.1 glass } \
96 1.1 glass }
97 1.1 glass #define WAIT_FOR_BSY(ptr) { \
98 1.1 glass int scsi_timeout = SCSI_TIMEOUT_VAL; \
99 1.1 glass while ( (((ptr)->sci_bus_csr & SCI_BUS_BSY) == 0) && \
100 1.1 glass (((ptr)->sci_bus_csr & SCI_BUS_BSY) == 0) && \
101 1.1 glass (((ptr)->sci_bus_csr & SCI_BUS_BSY) == 0) && \
102 1.1 glass (--scsi_timeout) ); \
103 1.1 glass if (!scsi_timeout) { \
104 1.2 gwr printf("scsi timeout--WAIT_FOR_BSY---%s, line %d.\n", \
105 1.2 gwr __FILE__, __LINE__); \
106 1.1 glass goto scsi_timeout_error; \
107 1.1 glass } \
108 1.1 glass }
109 1.1 glass
110 1.14 gwr #define ARBITRATION_RETRIES 1000
111 1.14 gwr
112 1.1 glass #ifdef DDB
113 1.1 glass int Debugger();
114 1.1 glass #else
115 1.2 gwr #define Debugger() panic("Should call Debugger here %s:%d", \
116 1.2 gwr __FILE__, __LINE__)
117 1.1 glass #endif
118 1.1 glass
119 1.1 glass struct ncr5380_softc {
120 1.1 glass struct device sc_dev;
121 1.10 gwr volatile void *sc_regs;
122 1.14 gwr int sc_adapter_type;
123 1.1 glass struct scsi_link sc_link;
124 1.1 glass };
125 1.1 glass
126 1.3 gwr static void ncr5380_minphys(struct buf *bp);
127 1.3 gwr static int ncr5380_scsi_cmd(struct scsi_xfer *xs);
128 1.14 gwr static int ncr5380_reset_adapter(struct ncr5380_softc *);
129 1.14 gwr static int ncr5380_reset_scsibus(struct ncr5380_softc *);
130 1.3 gwr static int ncr5380_poll(int adapter, int timeout);
131 1.3 gwr static int ncr5380_send_cmd(struct scsi_xfer *xs);
132 1.1 glass
133 1.14 gwr static int ncr_intr(void *);
134 1.1 glass
135 1.3 gwr static int si_generic(int adapter, int id, int lun,
136 1.1 glass struct scsi_generic *cmd, int cmdlen,
137 1.1 glass void *databuf, int datalen);
138 1.3 gwr static int si_group0(int adapter, int id, int lun,
139 1.1 glass int opcode, int addr, int len,
140 1.1 glass int flags, caddr_t databuf, int datalen);
141 1.1 glass
142 1.1 glass static char scsi_name[] = "si";
143 1.1 glass
144 1.1 glass struct scsi_adapter ncr5380_switch = {
145 1.1 glass ncr5380_scsi_cmd, /* scsi_cmd() */
146 1.1 glass ncr5380_minphys, /* scsi_minphys() */
147 1.12 gwr NULL, /* open_target_lu() */
148 1.12 gwr NULL, /* close_target_lu() */
149 1.1 glass };
150 1.1 glass
151 1.1 glass /* This is copied from julian's bt driver */
152 1.1 glass /* "so we have a default dev struct for our link struct." */
153 1.1 glass struct scsi_device ncr_dev = {
154 1.1 glass NULL, /* Use default error handler. */
155 1.2 gwr NULL, /* Use default start handler. */
156 1.2 gwr NULL, /* Use default async handler. */
157 1.1 glass NULL, /* Use default "done" routine. */
158 1.1 glass };
159 1.1 glass
160 1.3 gwr static int si_match();
161 1.3 gwr static void si_attach();
162 1.1 glass
163 1.2 gwr struct cfdriver sicd = {
164 1.2 gwr NULL, "si", si_match, si_attach, DV_DULL,
165 1.2 gwr sizeof(struct ncr5380_softc), NULL, 0,
166 1.2 gwr };
167 1.1 glass
168 1.3 gwr static int
169 1.2 gwr si_print(aux, name)
170 1.1 glass void *aux;
171 1.1 glass char *name;
172 1.1 glass {
173 1.1 glass }
174 1.1 glass
175 1.3 gwr static int
176 1.10 gwr si_match(parent, vcf, args)
177 1.1 glass struct device *parent;
178 1.10 gwr void *vcf, *args;
179 1.1 glass {
180 1.10 gwr struct cfdata *cf = vcf;
181 1.10 gwr struct confargs *ca = args;
182 1.16 gwr int x, probe_addr;
183 1.10 gwr
184 1.16 gwr /* Default interrupt priority always splbio==2 */
185 1.16 gwr if (ca->ca_intpri == -1)
186 1.16 gwr ca->ca_intpri = 2;
187 1.16 gwr
188 1.16 gwr if ((cpu_machine_id == SUN3_MACH_50) ||
189 1.16 gwr (cpu_machine_id == SUN3_MACH_60) )
190 1.16 gwr {
191 1.16 gwr /* Sun3/50 or Sun3/60 have only OBIO "si" */
192 1.16 gwr if (ca->ca_bustype != BUS_OBIO)
193 1.16 gwr return(0);
194 1.13 gwr if (ca->ca_paddr == -1)
195 1.13 gwr ca->ca_paddr = OBIO_NCR_SCSI;
196 1.16 gwr /* OK... */
197 1.16 gwr } else {
198 1.16 gwr /* Other Sun3 models may have VME "si" or "sc" */
199 1.16 gwr if (ca->ca_bustype != BUS_VME16)
200 1.16 gwr return (0);
201 1.13 gwr if (ca->ca_paddr == -1)
202 1.13 gwr return (0);
203 1.16 gwr /* OK... */
204 1.16 gwr }
205 1.16 gwr
206 1.16 gwr /* Make sure there is something there... */
207 1.16 gwr x = bus_peek(ca->ca_bustype, ca->ca_paddr + 1, 1);
208 1.16 gwr if (x == -1)
209 1.13 gwr return (0);
210 1.16 gwr
211 1.16 gwr /*
212 1.16 gwr * If this is a VME SCSI board, we have to determine whether
213 1.16 gwr * it is an "sc" (Sun2) or "si" (Sun3) SCSI board. This can
214 1.16 gwr * be determined using the fact that the "sc" board occupies
215 1.16 gwr * 4K bytes in VME space but the "si" board occupies 2K bytes.
216 1.16 gwr */
217 1.16 gwr if (ca->ca_bustype == BUS_VME16) {
218 1.16 gwr /* Note, the "si" board should NOT respond here. */
219 1.16 gwr x = bus_peek(ca->ca_bustype, ca->ca_paddr + 0x801, 1);
220 1.16 gwr if (x != -1)
221 1.16 gwr return(0);
222 1.13 gwr }
223 1.13 gwr
224 1.16 gwr return (1);
225 1.1 glass }
226 1.1 glass
227 1.3 gwr static void
228 1.10 gwr si_attach(parent, self, args)
229 1.1 glass struct device *parent, *self;
230 1.10 gwr void *args;
231 1.1 glass {
232 1.10 gwr struct ncr5380_softc *ncr5380 = (struct ncr5380_softc *) self;
233 1.14 gwr volatile sci_regmap_t *regs;
234 1.10 gwr struct confargs *ca = args;
235 1.1 glass
236 1.12 gwr switch (ca->ca_bustype) {
237 1.10 gwr
238 1.12 gwr case BUS_OBIO:
239 1.12 gwr regs = (sci_regmap_t *)
240 1.12 gwr obio_alloc(ca->ca_paddr, sizeof(*regs));
241 1.14 gwr isr_add_autovect(ncr_intr, (void *)ncr5380,
242 1.12 gwr ca->ca_intpri);
243 1.12 gwr break;
244 1.12 gwr
245 1.12 gwr case BUS_VME16:
246 1.12 gwr regs = (sci_regmap_t *)
247 1.12 gwr bus_mapin(ca->ca_bustype, ca->ca_paddr, sizeof(*regs));
248 1.14 gwr isr_add_vectored(ncr_intr, (void *)ncr5380,
249 1.12 gwr ca->ca_intpri, ca->ca_intvec);
250 1.12 gwr break;
251 1.12 gwr
252 1.12 gwr default:
253 1.12 gwr printf("unknown\n");
254 1.12 gwr return;
255 1.12 gwr }
256 1.1 glass
257 1.14 gwr ncr5380->sc_adapter_type = ca->ca_bustype;
258 1.10 gwr ncr5380->sc_regs = regs;
259 1.12 gwr
260 1.12 gwr /*
261 1.12 gwr * fill in the prototype scsi_link.
262 1.12 gwr */
263 1.2 gwr ncr5380->sc_link.adapter_softc = ncr5380;
264 1.12 gwr ncr5380->sc_link.adapter_target = 7;
265 1.1 glass ncr5380->sc_link.adapter = &ncr5380_switch;
266 1.1 glass ncr5380->sc_link.device = &ncr_dev;
267 1.14 gwr ncr5380->sc_link.openings = 2;
268 1.13 gwr #ifdef DEBUG
269 1.14 gwr ncr5380->sc_link.flags |= si_flags;
270 1.13 gwr #endif
271 1.1 glass
272 1.12 gwr printf("\n");
273 1.14 gwr ncr5380_reset_adapter(ncr5380);
274 1.14 gwr ncr5380_reset_scsibus(ncr5380);
275 1.10 gwr config_found(self, &(ncr5380->sc_link), si_print);
276 1.1 glass }
277 1.1 glass
278 1.1 glass #define MIN_PHYS 65536 /*BARF!!!!*/
279 1.3 gwr static void
280 1.1 glass ncr5380_minphys(struct buf *bp)
281 1.1 glass {
282 1.1 glass if (bp->b_bcount > MIN_PHYS) {
283 1.1 glass printf("Uh-oh... ncr5380_minphys setting bp->b_bcount = %x.\n", MIN_PHYS);
284 1.1 glass bp->b_bcount = MIN_PHYS;
285 1.1 glass }
286 1.1 glass }
287 1.1 glass #undef MIN_PHYS
288 1.1 glass
289 1.5 gwr static int
290 1.1 glass ncr5380_scsi_cmd(struct scsi_xfer *xs)
291 1.1 glass {
292 1.1 glass int flags, s, r;
293 1.1 glass
294 1.1 glass flags = xs->flags;
295 1.1 glass if (xs->bp) flags |= (SCSI_NOSLEEP);
296 1.1 glass if ( flags & ITSDONE ) {
297 1.1 glass printf("Already done?");
298 1.1 glass xs->flags &= ~ITSDONE;
299 1.1 glass }
300 1.1 glass if ( ! ( flags & INUSE ) ) {
301 1.1 glass printf("Not in use?");
302 1.1 glass xs->flags |= INUSE;
303 1.1 glass }
304 1.1 glass
305 1.15 gwr s = splbio();
306 1.14 gwr
307 1.1 glass if ( flags & SCSI_RESET ) {
308 1.1 glass printf("flags & SCSIRESET.\n");
309 1.14 gwr ncr5380_reset_scsibus(xs->sc_link->adapter_softc);
310 1.14 gwr r = COMPLETE;
311 1.14 gwr } else {
312 1.14 gwr r = ncr5380_send_cmd(xs);
313 1.14 gwr xs->flags |= ITSDONE;
314 1.14 gwr scsi_done(xs);
315 1.1 glass }
316 1.14 gwr
317 1.15 gwr splx(s);
318 1.1 glass
319 1.1 glass switch(r) {
320 1.14 gwr case COMPLETE:
321 1.14 gwr case SUCCESSFULLY_QUEUED:
322 1.14 gwr r = SUCCESSFULLY_QUEUED;
323 1.14 gwr if (xs->flags & SCSI_POLL)
324 1.14 gwr r = COMPLETE;
325 1.14 gwr break;
326 1.14 gwr default:
327 1.14 gwr break;
328 1.1 glass }
329 1.1 glass return r;
330 1.1 glass }
331 1.1 glass
332 1.14 gwr #ifdef DEBUG
333 1.3 gwr static int
334 1.1 glass ncr5380_show_scsi_cmd(struct scsi_xfer *xs)
335 1.1 glass {
336 1.1 glass u_char *b = (u_char *) xs->cmd;
337 1.1 glass int i = 0;
338 1.1 glass
339 1.1 glass if ( ! ( xs->flags & SCSI_RESET ) ) {
340 1.1 glass printf("si(%d:%d:%d)-",
341 1.2 gwr xs->sc_link->scsibus,
342 1.2 gwr xs->sc_link->target,
343 1.2 gwr xs->sc_link->lun);
344 1.1 glass while (i < xs->cmdlen) {
345 1.1 glass if (i) printf(",");
346 1.1 glass printf("%x",b[i++]);
347 1.1 glass }
348 1.1 glass printf("-\n");
349 1.1 glass } else {
350 1.1 glass printf("si(%d:%d:%d)-RESET-\n",
351 1.2 gwr xs->sc_link->scsibus,
352 1.2 gwr xs->sc_link->target,
353 1.2 gwr xs->sc_link->lun);
354 1.1 glass }
355 1.1 glass }
356 1.14 gwr #endif
357 1.1 glass
358 1.1 glass /*
359 1.1 glass * Actual chip control.
360 1.1 glass */
361 1.1 glass
362 1.14 gwr static void
363 1.14 gwr ncr_sbc_intr(struct ncr5380_softc *ncr5380)
364 1.1 glass {
365 1.14 gwr volatile sci_regmap_t *regs = ncr5380->sc_regs;
366 1.1 glass
367 1.14 gwr if ((regs->sci_csr & SCI_CSR_INT) == 0) {
368 1.2 gwr #ifdef DEBUG
369 1.14 gwr printf (" ncr_sbc_intr: spurrious\n");
370 1.2 gwr #endif
371 1.14 gwr return;
372 1.10 gwr }
373 1.14 gwr
374 1.14 gwr SCI_CLR_INTR(regs);
375 1.14 gwr #ifdef DEBUG
376 1.14 gwr printf (" ncr_sbc_intr\n");
377 1.14 gwr #endif
378 1.1 glass }
379 1.1 glass
380 1.14 gwr static void
381 1.14 gwr ncr_dma_intr(struct ncr5380_softc *ncr5380)
382 1.1 glass {
383 1.14 gwr volatile struct si_regs *regs = ncr5380->sc_regs;
384 1.14 gwr
385 1.14 gwr #ifdef DEBUG
386 1.14 gwr printf (" ncr_dma_intr\n");
387 1.2 gwr #endif
388 1.1 glass }
389 1.1 glass
390 1.14 gwr static int
391 1.14 gwr ncr_intr(void *arg)
392 1.1 glass {
393 1.14 gwr struct ncr5380_softc *ncr5380 = arg;
394 1.14 gwr volatile struct si_regs *si = ncr5380->sc_regs;
395 1.14 gwr int rv = 0;
396 1.14 gwr
397 1.14 gwr /* Interrupts not enabled? Can not be for us. */
398 1.14 gwr if ((si->si_csr & SI_CSR_INTR_EN) == 0)
399 1.14 gwr return rv;
400 1.14 gwr
401 1.14 gwr if (si->si_csr & SI_CSR_DMA_IP) {
402 1.14 gwr ncr_dma_intr(ncr5380);
403 1.14 gwr rv++;
404 1.14 gwr }
405 1.14 gwr if (si->si_csr & SI_CSR_SBC_IP) {
406 1.14 gwr ncr_sbc_intr(ncr5380);
407 1.14 gwr rv++;
408 1.14 gwr }
409 1.14 gwr return rv;
410 1.14 gwr }
411 1.14 gwr
412 1.14 gwr static int
413 1.14 gwr ncr5380_reset_adapter(struct ncr5380_softc *ncr5380)
414 1.14 gwr {
415 1.14 gwr volatile struct si_regs *si = ncr5380->sc_regs;
416 1.14 gwr
417 1.14 gwr #ifdef DEBUG
418 1.14 gwr if (si_debug) {
419 1.14 gwr printf("si_reset_adapter\n");
420 1.14 gwr }
421 1.2 gwr #endif
422 1.14 gwr
423 1.14 gwr /* The reset bits are active low. */
424 1.14 gwr si->si_csr = 0;
425 1.14 gwr delay(100);
426 1.14 gwr si->si_csr = SI_CSR_FIFO_RES | SI_CSR_SCSI_RES;
427 1.1 glass }
428 1.1 glass
429 1.3 gwr static int
430 1.14 gwr ncr5380_reset_scsibus(struct ncr5380_softc *ncr5380)
431 1.1 glass {
432 1.14 gwr volatile sci_regmap_t *regs = ncr5380->sc_regs;
433 1.14 gwr
434 1.14 gwr #ifdef DEBUG
435 1.14 gwr if (si_debug) {
436 1.14 gwr printf("si_reset_scsibus\n");
437 1.14 gwr }
438 1.14 gwr #endif
439 1.2 gwr
440 1.2 gwr regs->sci_icmd = SCI_ICMD_TEST;
441 1.2 gwr regs->sci_icmd = SCI_ICMD_TEST | SCI_ICMD_RST;
442 1.2 gwr delay(2500);
443 1.2 gwr regs->sci_icmd = 0;
444 1.1 glass
445 1.2 gwr regs->sci_mode = 0;
446 1.2 gwr regs->sci_tcmd = SCI_PHASE_DISC;
447 1.2 gwr regs->sci_sel_enb = 0;
448 1.1 glass
449 1.2 gwr SCI_CLR_INTR(regs);
450 1.2 gwr SCI_CLR_INTR(regs);
451 1.1 glass }
452 1.1 glass
453 1.3 gwr static int
454 1.1 glass ncr5380_poll(int adapter, int timeout)
455 1.1 glass {
456 1.1 glass }
457 1.1 glass
458 1.3 gwr static int
459 1.1 glass ncr5380_send_cmd(struct scsi_xfer *xs)
460 1.1 glass {
461 1.1 glass int sense;
462 1.1 glass
463 1.14 gwr #ifdef DIAGNOSTIC
464 1.14 gwr if ((getsr() & PSL_IPL) < PSL_IPL2)
465 1.14 gwr panic("ncr_send_cmd: bad spl");
466 1.14 gwr #endif
467 1.14 gwr
468 1.14 gwr #ifdef DEBUG
469 1.14 gwr if (si_debug & 2)
470 1.14 gwr ncr5380_show_scsi_cmd(xs);
471 1.14 gwr #endif
472 1.14 gwr
473 1.2 gwr sense = si_generic( xs->sc_link->scsibus, xs->sc_link->target,
474 1.1 glass xs->sc_link->lun, xs->cmd, xs->cmdlen,
475 1.1 glass xs->data, xs->datalen );
476 1.14 gwr
477 1.13 gwr switch (sense) {
478 1.13 gwr case 0: /* success */
479 1.13 gwr xs->resid = 0;
480 1.13 gwr xs->error = XS_NOERROR;
481 1.13 gwr break;
482 1.13 gwr
483 1.13 gwr case 0x02: /* Check condition */
484 1.2 gwr #ifdef DEBUG
485 1.14 gwr if (si_debug)
486 1.14 gwr printf("check cond. target %d.\n",
487 1.14 gwr xs->sc_link->target);
488 1.2 gwr #endif
489 1.13 gwr delay(10); /* Phil's fix for slow devices. */
490 1.13 gwr si_group0(xs->sc_link->scsibus,
491 1.13 gwr xs->sc_link->target,
492 1.13 gwr xs->sc_link->lun,
493 1.13 gwr 0x3, 0x0,
494 1.13 gwr sizeof(struct scsi_sense_data),
495 1.13 gwr 0, (caddr_t) &(xs->sense),
496 1.13 gwr sizeof(struct scsi_sense_data));
497 1.13 gwr xs->error = XS_SENSE;
498 1.13 gwr break;
499 1.13 gwr case 0x08: /* Busy */
500 1.13 gwr xs->error = XS_BUSY;
501 1.13 gwr break;
502 1.13 gwr default:
503 1.13 gwr xs->error = XS_DRIVER_STUFFUP;
504 1.13 gwr break;
505 1.13 gwr
506 1.1 glass }
507 1.1 glass return (COMPLETE);
508 1.1 glass }
509 1.1 glass
510 1.3 gwr static int
511 1.2 gwr si_select_target(register volatile sci_regmap_t *regs,
512 1.1 glass u_char myid, u_char tid, int with_atn)
513 1.1 glass {
514 1.1 glass register u_char bid, icmd;
515 1.1 glass int ret = SCSI_RET_RETRY;
516 1.14 gwr int arb_retries, arb_wait;
517 1.1 glass
518 1.1 glass /* for our purposes.. */
519 1.1 glass myid = 1 << myid;
520 1.1 glass tid = 1 << tid;
521 1.1 glass
522 1.2 gwr regs->sci_sel_enb = 0; /* we don't want any interrupts. */
523 1.2 gwr regs->sci_tcmd = 0; /* get into a harmless state */
524 1.14 gwr
525 1.14 gwr arb_retries = ARBITRATION_RETRIES;
526 1.14 gwr
527 1.14 gwr retry_arbitration:
528 1.2 gwr regs->sci_mode = 0; /* get into a harmless state */
529 1.14 gwr if (--arb_retries <= 0) {
530 1.14 gwr #ifdef DEBUG
531 1.14 gwr if (si_debug) {
532 1.14 gwr printf("si_select: arb_retries expended\n");
533 1.14 gwr }
534 1.14 gwr #endif
535 1.14 gwr goto lost;
536 1.14 gwr }
537 1.14 gwr
538 1.14 gwr if ((regs->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)) &&
539 1.14 gwr (regs->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)) &&
540 1.14 gwr (regs->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)))
541 1.14 gwr {
542 1.14 gwr #ifdef DEBUG
543 1.14 gwr if (si_debug) {
544 1.14 gwr printf("si_select_target: still BSY|SEL\n");
545 1.14 gwr }
546 1.14 gwr #endif
547 1.14 gwr return ret;
548 1.14 gwr }
549 1.1 glass
550 1.1 glass regs->sci_odata = myid;
551 1.1 glass regs->sci_mode = SCI_MODE_ARB;
552 1.2 gwr /* regs->sci_mode |= SCI_MODE_ARB; XXX? */
553 1.14 gwr
554 1.1 glass /* AIP might not set if BSY went true after we checked */
555 1.14 gwr /* Wait up to about 100 usec. for it to appear. */
556 1.14 gwr arb_wait = 50; /* X2 */
557 1.14 gwr do {
558 1.1 glass if (regs->sci_icmd & SCI_ICMD_AIP)
559 1.1 glass break;
560 1.14 gwr delay2us();
561 1.14 gwr } while (--arb_wait > 0);
562 1.14 gwr if (arb_wait <= 0) {
563 1.14 gwr /* XXX - Could have missed it? */
564 1.14 gwr goto retry_arbitration;
565 1.14 gwr }
566 1.14 gwr #ifdef DEBUG
567 1.14 gwr if (si_debug) {
568 1.14 gwr printf("si_select_target: API after %d tries (last wait %d)\n",
569 1.14 gwr ARBITRATION_RETRIES - arb_retries,
570 1.14 gwr (50 - arb_wait));
571 1.1 glass }
572 1.14 gwr #endif
573 1.1 glass
574 1.14 gwr delay(3); /* 2.2 uSec. arbitration delay */
575 1.1 glass
576 1.1 glass if (regs->sci_icmd & SCI_ICMD_LST) {
577 1.2 gwr #ifdef DEBUG
578 1.14 gwr if (si_debug)
579 1.14 gwr printf ("lost 1\n");
580 1.2 gwr #endif
581 1.14 gwr goto retry_arbitration; /* XXX */
582 1.1 glass }
583 1.1 glass
584 1.1 glass regs->sci_mode &= ~SCI_MODE_PAR_CHK;
585 1.1 glass bid = regs->sci_data;
586 1.1 glass
587 1.1 glass if ((bid & ~myid) > myid) {
588 1.2 gwr #ifdef DEBUG
589 1.14 gwr if (si_debug)
590 1.14 gwr printf ("lost 2\n");
591 1.2 gwr #endif
592 1.14 gwr /* Trying again will not help. */
593 1.1 glass goto lost;
594 1.1 glass }
595 1.1 glass if (regs->sci_icmd & SCI_ICMD_LST) {
596 1.2 gwr #ifdef DEBUG
597 1.14 gwr if (si_debug)
598 1.14 gwr printf ("lost 3\n");
599 1.2 gwr #endif
600 1.1 glass goto lost;
601 1.1 glass }
602 1.1 glass
603 1.1 glass /* Won arbitration, enter selection phase now */
604 1.1 glass icmd = regs->sci_icmd & ~(SCI_ICMD_DIFF|SCI_ICMD_TEST);
605 1.1 glass icmd |= (with_atn ? (SCI_ICMD_SEL|SCI_ICMD_ATN) : SCI_ICMD_SEL);
606 1.1 glass regs->sci_icmd = icmd;
607 1.1 glass
608 1.1 glass if (regs->sci_icmd & SCI_ICMD_LST) {
609 1.2 gwr #ifdef DEBUG
610 1.14 gwr if (si_debug)
611 1.14 gwr printf ("nosel\n");
612 1.2 gwr #endif
613 1.1 glass goto nosel;
614 1.1 glass }
615 1.1 glass
616 1.1 glass /* XXX a target that violates specs might still drive the bus XXX */
617 1.1 glass /* XXX should put our id out, and after the delay check nothi XXX */
618 1.1 glass /* XXX ng else is out there. XXX */
619 1.1 glass
620 1.2 gwr delay2us();
621 1.1 glass
622 1.14 gwr regs->sci_sel_enb = 0;
623 1.14 gwr
624 1.1 glass regs->sci_odata = myid | tid;
625 1.14 gwr
626 1.14 gwr icmd |= SCI_ICMD_BSY|SCI_ICMD_DATA;
627 1.14 gwr regs->sci_icmd = icmd;
628 1.1 glass
629 1.1 glass /* regs->sci_mode &= ~SCI_MODE_ARB; 2 deskew delays, too */
630 1.1 glass regs->sci_mode = 0; /* 2 deskew delays, too */
631 1.1 glass
632 1.14 gwr icmd &= ~SCI_ICMD_BSY;
633 1.1 glass regs->sci_icmd = icmd;
634 1.1 glass
635 1.1 glass /* bus settle delay, 400ns */
636 1.2 gwr delay2us(); /* too much (was 2) ? */
637 1.1 glass
638 1.14 gwr regs->sci_mode |= SCI_MODE_PAR_CHK;
639 1.1 glass
640 1.1 glass {
641 1.1 glass register int timeo = 2500;/* 250 msecs in 100 usecs chunks */
642 1.1 glass while ((regs->sci_bus_csr & SCI_BUS_BSY) == 0) {
643 1.1 glass if (--timeo > 0) {
644 1.1 glass delay(100);
645 1.1 glass } else {
646 1.14 gwr /* This is the "normal" no-such-device select error. */
647 1.14 gwr #ifdef DEBUG
648 1.14 gwr if (si_debug)
649 1.14 gwr printf("si_select: did not see BSY\n");
650 1.14 gwr #endif
651 1.1 glass goto nodev;
652 1.1 glass }
653 1.1 glass }
654 1.1 glass }
655 1.1 glass
656 1.1 glass icmd &= ~(SCI_ICMD_DATA|SCI_ICMD_SEL);
657 1.1 glass regs->sci_icmd = icmd;
658 1.1 glass /* regs->sci_sel_enb = myid;*/ /* looks like we should NOT have it */
659 1.14 gwr /* XXX - SCI_MODE_PAR_CHK ? */
660 1.1 glass return SCSI_RET_SUCCESS;
661 1.14 gwr
662 1.1 glass nodev:
663 1.1 glass ret = SCSI_RET_DEVICE_DOWN;
664 1.1 glass regs->sci_sel_enb = myid;
665 1.1 glass nosel:
666 1.1 glass icmd &= ~(SCI_ICMD_DATA|SCI_ICMD_SEL|SCI_ICMD_ATN);
667 1.1 glass regs->sci_icmd = icmd;
668 1.14 gwr regs->sci_mode = 0;
669 1.14 gwr return ret;
670 1.14 gwr
671 1.1 glass lost:
672 1.14 gwr regs->sci_icmd = 0;
673 1.1 glass regs->sci_mode = 0;
674 1.14 gwr #ifdef DEBUG
675 1.14 gwr if (si_debug) {
676 1.14 gwr printf("si_select: lost arbitration\n");
677 1.14 gwr }
678 1.14 gwr #endif
679 1.1 glass return ret;
680 1.1 glass }
681 1.1 glass
682 1.1 glass sci_data_out(regs, phase, count, data)
683 1.2 gwr register volatile sci_regmap_t *regs;
684 1.1 glass unsigned char *data;
685 1.1 glass {
686 1.1 glass register unsigned char icmd;
687 1.1 glass register int cnt=0;
688 1.1 glass
689 1.1 glass /* ..checks.. */
690 1.1 glass
691 1.1 glass icmd = regs->sci_icmd & ~(SCI_ICMD_DIFF|SCI_ICMD_TEST);
692 1.1 glass loop:
693 1.1 glass if (SCI_CUR_PHASE(regs->sci_bus_csr) != phase)
694 1.1 glass return cnt;
695 1.1 glass
696 1.1 glass WAIT_FOR_REQ(regs);
697 1.1 glass icmd |= SCI_ICMD_DATA;
698 1.1 glass regs->sci_icmd = icmd;
699 1.1 glass regs->sci_odata = *data++;
700 1.1 glass icmd |= SCI_ICMD_ACK;
701 1.1 glass regs->sci_icmd = icmd;
702 1.1 glass
703 1.1 glass icmd &= ~(SCI_ICMD_DATA|SCI_ICMD_ACK);
704 1.1 glass WAIT_FOR_NOT_REQ(regs);
705 1.1 glass regs->sci_icmd = icmd;
706 1.1 glass ++cnt;
707 1.1 glass if (--count > 0)
708 1.1 glass goto loop;
709 1.1 glass scsi_timeout_error:
710 1.1 glass return cnt;
711 1.1 glass }
712 1.1 glass
713 1.1 glass sci_data_in(regs, phase, count, data)
714 1.2 gwr register volatile sci_regmap_t *regs;
715 1.1 glass unsigned char *data;
716 1.1 glass {
717 1.1 glass register unsigned char icmd;
718 1.1 glass register int cnt=0;
719 1.1 glass
720 1.1 glass /* ..checks.. */
721 1.1 glass
722 1.1 glass icmd = regs->sci_icmd & ~(SCI_ICMD_DIFF|SCI_ICMD_TEST);
723 1.1 glass
724 1.1 glass loop:
725 1.1 glass if (SCI_CUR_PHASE(regs->sci_bus_csr) != phase)
726 1.1 glass return cnt;
727 1.1 glass
728 1.1 glass WAIT_FOR_REQ(regs);
729 1.1 glass *data++ = regs->sci_data;
730 1.1 glass icmd |= SCI_ICMD_ACK;
731 1.1 glass regs->sci_icmd = icmd;
732 1.1 glass
733 1.1 glass icmd &= ~SCI_ICMD_ACK;
734 1.1 glass WAIT_FOR_NOT_REQ(regs);
735 1.1 glass regs->sci_icmd = icmd;
736 1.1 glass ++cnt;
737 1.1 glass if (--count > 0)
738 1.1 glass goto loop;
739 1.1 glass
740 1.1 glass scsi_timeout_error:
741 1.1 glass return cnt;
742 1.1 glass }
743 1.1 glass
744 1.3 gwr static int
745 1.2 gwr si_command_transfer(register volatile sci_regmap_t *regs,
746 1.1 glass int maxlen, u_char *data, u_char *status, u_char *msg)
747 1.1 glass {
748 1.1 glass int xfer=0, phase;
749 1.1 glass
750 1.1 glass /* printf("command_transfer called for 0x%x.\n", *data); */
751 1.1 glass
752 1.1 glass regs->sci_icmd = 0;
753 1.1 glass
754 1.1 glass while (1) {
755 1.1 glass
756 1.1 glass WAIT_FOR_REQ(regs);
757 1.1 glass
758 1.1 glass phase = SCI_CUR_PHASE(regs->sci_bus_csr);
759 1.1 glass
760 1.1 glass switch (phase) {
761 1.1 glass case SCSI_PHASE_CMD:
762 1.1 glass SCI_ACK(regs,SCSI_PHASE_CMD);
763 1.1 glass xfer += sci_data_out(regs, SCSI_PHASE_CMD,
764 1.1 glass maxlen, data);
765 1.1 glass return xfer;
766 1.1 glass case SCSI_PHASE_DATA_IN:
767 1.1 glass printf("Data in phase in command_transfer?\n");
768 1.1 glass return 0;
769 1.1 glass case SCSI_PHASE_DATA_OUT:
770 1.1 glass printf("Data out phase in command_transfer?\n");
771 1.1 glass return 0;
772 1.1 glass case SCSI_PHASE_STATUS:
773 1.1 glass SCI_ACK(regs,SCSI_PHASE_STATUS);
774 1.1 glass printf("status in command_transfer.\n");
775 1.1 glass sci_data_in(regs, SCSI_PHASE_STATUS,
776 1.1 glass 1, status);
777 1.1 glass break;
778 1.1 glass case SCSI_PHASE_MESSAGE_IN:
779 1.1 glass SCI_ACK(regs,SCSI_PHASE_MESSAGE_IN);
780 1.1 glass printf("msgin in command_transfer.\n");
781 1.1 glass sci_data_in(regs, SCSI_PHASE_MESSAGE_IN,
782 1.1 glass 1, msg);
783 1.1 glass break;
784 1.1 glass case SCSI_PHASE_MESSAGE_OUT:
785 1.1 glass SCI_ACK(regs,SCSI_PHASE_MESSAGE_OUT);
786 1.1 glass sci_data_out(regs, SCSI_PHASE_MESSAGE_OUT,
787 1.1 glass 1, msg);
788 1.1 glass break;
789 1.1 glass default:
790 1.1 glass printf("Unexpected phase 0x%x in "
791 1.1 glass "command_transfer().\n", phase);
792 1.1 glass scsi_timeout_error:
793 1.1 glass return xfer;
794 1.1 glass break;
795 1.1 glass }
796 1.1 glass }
797 1.1 glass }
798 1.1 glass
799 1.3 gwr static int
800 1.2 gwr si_data_transfer(register volatile sci_regmap_t *regs,
801 1.1 glass int maxlen, u_char *data, u_char *status, u_char *msg)
802 1.1 glass {
803 1.1 glass int retlen = 0, xfer, phase;
804 1.1 glass
805 1.1 glass regs->sci_icmd = 0;
806 1.1 glass
807 1.1 glass *status = 0;
808 1.1 glass
809 1.1 glass while (1) {
810 1.1 glass
811 1.1 glass WAIT_FOR_REQ(regs);
812 1.1 glass
813 1.1 glass phase = SCI_CUR_PHASE(regs->sci_bus_csr);
814 1.1 glass
815 1.1 glass switch (phase) {
816 1.1 glass case SCSI_PHASE_CMD:
817 1.1 glass printf("Command phase in data_transfer().\n");
818 1.1 glass return retlen;
819 1.1 glass case SCSI_PHASE_DATA_IN:
820 1.1 glass SCI_ACK(regs,SCSI_PHASE_DATA_IN);
821 1.1 glass #if PSEUDO_DMA
822 1.1 glass xfer = sci_pdma_in(regs, SCSI_PHASE_DATA_IN,
823 1.1 glass maxlen, data);
824 1.1 glass #else
825 1.1 glass xfer = sci_data_in(regs, SCSI_PHASE_DATA_IN,
826 1.1 glass maxlen, data);
827 1.1 glass #endif
828 1.1 glass retlen += xfer;
829 1.1 glass maxlen -= xfer;
830 1.1 glass break;
831 1.1 glass case SCSI_PHASE_DATA_OUT:
832 1.1 glass SCI_ACK(regs,SCSI_PHASE_DATA_OUT);
833 1.1 glass #if PSEUDO_DMA
834 1.1 glass xfer = sci_pdma_out(regs, SCSI_PHASE_DATA_OUT,
835 1.1 glass maxlen, data);
836 1.1 glass #else
837 1.1 glass xfer = sci_data_out(regs, SCSI_PHASE_DATA_OUT,
838 1.1 glass maxlen, data);
839 1.1 glass #endif
840 1.1 glass retlen += xfer;
841 1.1 glass maxlen -= xfer;
842 1.1 glass break;
843 1.1 glass case SCSI_PHASE_STATUS:
844 1.1 glass SCI_ACK(regs,SCSI_PHASE_STATUS);
845 1.1 glass sci_data_in(regs, SCSI_PHASE_STATUS,
846 1.1 glass 1, status);
847 1.1 glass break;
848 1.1 glass case SCSI_PHASE_MESSAGE_IN:
849 1.1 glass SCI_ACK(regs,SCSI_PHASE_MESSAGE_IN);
850 1.1 glass sci_data_in(regs, SCSI_PHASE_MESSAGE_IN,
851 1.1 glass 1, msg);
852 1.1 glass if (*msg == 0) {
853 1.1 glass return retlen;
854 1.1 glass } else {
855 1.1 glass printf( "message 0x%x in "
856 1.1 glass "data_transfer.\n", *msg);
857 1.1 glass }
858 1.1 glass break;
859 1.1 glass case SCSI_PHASE_MESSAGE_OUT:
860 1.1 glass SCI_ACK(regs,SCSI_PHASE_MESSAGE_OUT);
861 1.1 glass sci_data_out(regs, SCSI_PHASE_MESSAGE_OUT,
862 1.1 glass 1, msg);
863 1.1 glass break;
864 1.1 glass default:
865 1.1 glass printf( "Unexpected phase 0x%x in "
866 1.1 glass "data_transfer().\n", phase);
867 1.1 glass scsi_timeout_error:
868 1.1 glass return retlen;
869 1.1 glass break;
870 1.1 glass }
871 1.1 glass }
872 1.1 glass }
873 1.1 glass
874 1.3 gwr static int
875 1.2 gwr si_dorequest(register volatile sci_regmap_t *regs,
876 1.1 glass int target, int lun, u_char *cmd, int cmdlen,
877 1.1 glass char *databuf, int datalen, int *sent, int *ret)
878 1.1 glass {
879 1.1 glass /* Returns 0 on success, -1 on internal error, or the status byte */
880 1.1 glass int cmd_bytes_sent, r;
881 1.1 glass u_char stat, msg, c;
882 1.1 glass
883 1.1 glass *sent = 0;
884 1.1 glass
885 1.2 gwr if ( ( r = si_select_target(regs, 7, target, 1) ) != SCSI_RET_SUCCESS) {
886 1.14 gwr #ifdef DEBUG
887 1.14 gwr if (si_debug) {
888 1.14 gwr printf("si_dorequest: select returned %d\n", r);
889 1.14 gwr }
890 1.14 gwr #endif
891 1.1 glass *ret = r;
892 1.1 glass SCI_CLR_INTR(regs);
893 1.1 glass switch (r) {
894 1.1 glass case SCSI_RET_RETRY:
895 1.1 glass return 0x08;
896 1.1 glass default:
897 1.2 gwr printf("si_select_target(target %d, lun %d) failed(%d).\n",
898 1.1 glass target, lun, r);
899 1.1 glass case SCSI_RET_DEVICE_DOWN:
900 1.1 glass return -1;
901 1.1 glass }
902 1.1 glass }
903 1.1 glass
904 1.1 glass c = 0x80 | lun;
905 1.1 glass
906 1.2 gwr if ((cmd_bytes_sent = si_command_transfer(regs, cmdlen,
907 1.14 gwr (u_char *) cmd, &stat, &c)) != cmdlen)
908 1.14 gwr {
909 1.1 glass SCI_CLR_INTR(regs);
910 1.1 glass *ret = SCSI_RET_COMMAND_FAIL;
911 1.1 glass printf("Data underrun sending CCB (%d bytes of %d, sent).\n",
912 1.1 glass cmd_bytes_sent, cmdlen);
913 1.1 glass return -1;
914 1.1 glass }
915 1.1 glass
916 1.2 gwr *sent=si_data_transfer(regs, datalen, (u_char *)databuf,
917 1.1 glass &stat, &msg);
918 1.14 gwr #ifdef DEBUG
919 1.14 gwr if (si_debug) {
920 1.14 gwr printf("si_dorequest: data transfered = %d\n", *sent);
921 1.14 gwr }
922 1.14 gwr #endif
923 1.1 glass
924 1.1 glass *ret = 0;
925 1.1 glass return stat;
926 1.1 glass }
927 1.1 glass
928 1.3 gwr static int
929 1.2 gwr si_generic(int adapter, int id, int lun, struct scsi_generic *cmd,
930 1.1 glass int cmdlen, void *databuf, int datalen)
931 1.1 glass {
932 1.2 gwr register struct ncr5380_softc *ncr5380 = sicd.cd_devs[adapter];
933 1.2 gwr register volatile sci_regmap_t *regs = ncr5380->sc_regs;
934 1.2 gwr int i,j,sent,ret;
935 1.1 glass
936 1.2 gwr if (cmd->opcode == TEST_UNIT_READY) /* XXX */
937 1.2 gwr cmd->bytes[0] = ((u_char) lun << 5);
938 1.1 glass
939 1.2 gwr i = si_dorequest(regs, id, lun, (u_char *) cmd, cmdlen,
940 1.2 gwr databuf, datalen, &sent, &ret);
941 1.1 glass
942 1.2 gwr return i;
943 1.1 glass }
944 1.1 glass
945 1.3 gwr static int
946 1.2 gwr si_group0(int adapter, int id, int lun, int opcode, int addr, int len,
947 1.1 glass int flags, caddr_t databuf, int datalen)
948 1.1 glass {
949 1.2 gwr register struct ncr5380_softc *ncr5380 = sicd.cd_devs[adapter];
950 1.2 gwr register volatile sci_regmap_t *regs = ncr5380->sc_regs;
951 1.2 gwr unsigned char cmd[6];
952 1.2 gwr int i,j,sent,ret;
953 1.2 gwr
954 1.2 gwr cmd[0] = opcode; /* Operation code */
955 1.2 gwr cmd[1] = (lun << 5) | ((addr >> 16) & 0x1F); /* Lun & MSB of addr */
956 1.2 gwr cmd[2] = (addr >> 8) & 0xFF; /* addr */
957 1.2 gwr cmd[3] = addr & 0xFF; /* LSB of addr */
958 1.2 gwr cmd[4] = len; /* Allocation length */
959 1.2 gwr cmd[5] = flags; /* Link/Flag */
960 1.1 glass
961 1.2 gwr i = si_dorequest(regs, id, lun, cmd, 6, databuf, datalen, &sent, &ret);
962 1.1 glass
963 1.2 gwr return i;
964 1.1 glass }
965