Home | History | Annotate | Line # | Download | only in dev
      1  1.12   andvar /*	$NetBSD: sivar.h,v 1.12 2023/01/23 22:16:44 andvar Exp $	*/
      2   1.1      gwr 
      3   1.3      gwr /*-
      4   1.3      gwr  * Copyright (c) 1996 The NetBSD Foundation, Inc.
      5   1.1      gwr  * All rights reserved.
      6   1.1      gwr  *
      7   1.3      gwr  * This code is derived from software contributed to The NetBSD Foundation
      8   1.3      gwr  * by Adam Glass, David Jones, and Gordon W. Ross.
      9   1.3      gwr  *
     10   1.1      gwr  * Redistribution and use in source and binary forms, with or without
     11   1.1      gwr  * modification, are permitted provided that the following conditions
     12   1.1      gwr  * are met:
     13   1.1      gwr  * 1. Redistributions of source code must retain the above copyright
     14   1.1      gwr  *    notice, this list of conditions and the following disclaimer.
     15   1.1      gwr  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1      gwr  *    notice, this list of conditions and the following disclaimer in the
     17   1.1      gwr  *    documentation and/or other materials provided with the distribution.
     18   1.1      gwr  *
     19   1.3      gwr  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20   1.3      gwr  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21   1.3      gwr  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22   1.4      gwr  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23   1.4      gwr  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24   1.3      gwr  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25   1.3      gwr  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26   1.3      gwr  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27   1.3      gwr  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28   1.3      gwr  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29   1.3      gwr  * POSSIBILITY OF SUCH DAMAGE.
     30   1.1      gwr  */
     31   1.1      gwr 
     32   1.1      gwr /*
     33   1.1      gwr  * This file defines the interface between si.c and
     34   1.1      gwr  * the bus-specific files: si_obio.c, si_vme.c
     35   1.1      gwr  */
     36   1.1      gwr 
     37   1.1      gwr /*
     38   1.1      gwr  * Transfers smaller than this are done using PIO
     39   1.1      gwr  * (on assumption they're not worth DMA overhead)
     40   1.1      gwr  */
     41   1.1      gwr #define	MIN_DMA_LEN 128
     42   1.1      gwr 
     43   1.1      gwr /*
     44  1.12   andvar  * Transfers larger than 65535 bytes need to be split-up.
     45   1.1      gwr  * (Some of the FIFO logic has only 16 bits counters.)
     46   1.1      gwr  * Make the size an integer multiple of the page size
     47   1.1      gwr  * to avoid buf/cluster remap problems.  (paranoid?)
     48   1.1      gwr  */
     49   1.1      gwr #define	MAX_DMA_LEN 0xE000
     50   1.1      gwr 
     51   1.1      gwr /*
     52   1.1      gwr  * This structure is used to keep track of mapped DMA requests.
     53   1.1      gwr  */
     54   1.1      gwr struct si_dma_handle {
     55   1.1      gwr 	int 		dh_flags;
     56   1.1      gwr #define	SIDH_BUSY	1		/* This DH is in use */
     57   1.1      gwr #define	SIDH_OUT	2		/* DMA does data out (write) */
     58   1.9  tsutsui 	vaddr_t		dh_dmaaddr;	/* VA of buffer in DVMA space */
     59   1.9  tsutsui 	vsize_t		dh_dmalen;	/* Length of KVA mapping. */
     60   1.1      gwr };
     61   1.1      gwr 
     62   1.1      gwr /*
     63   1.1      gwr  * The first structure member has to be the ncr5380_softc
     64   1.1      gwr  * so we can just cast to go back and fourth between them.
     65   1.1      gwr  */
     66   1.1      gwr struct si_softc {
     67   1.1      gwr 	struct ncr5380_softc	ncr_sc;
     68   1.9  tsutsui 	bus_space_tag_t		sc_bst;
     69   1.9  tsutsui 	bus_space_handle_t	sc_bsh;
     70   1.1      gwr 	volatile struct si_regs	*sc_regs;
     71   1.9  tsutsui 	bus_dma_tag_t		sc_dmat;
     72   1.9  tsutsui 	bus_dmamap_t		sc_dmap;
     73   1.1      gwr 	int		sc_adapter_type;
     74   1.1      gwr 	int		sc_adapter_iv_am;	/* int. vec + address modifier */
     75   1.2      gwr 	int 	sc_options;			/* options for this instance */
     76   1.1      gwr 	int 	sc_reqlen;  		/* requested transfer length */
     77   1.1      gwr 	struct si_dma_handle *sc_dma;
     78   1.1      gwr 	/* DMA command block for the OBIO controller. */
     79   1.1      gwr 	void *sc_dmacmd;
     80   1.1      gwr };
     81   1.2      gwr 
     82   1.5      gwr /* Options for disconnect/reselect, DMA, and interrupts. */
     83   1.5      gwr #define SI_NO_DISCONNECT    0xff
     84   1.5      gwr #define SI_NO_PARITY_CHK  0xff00
     85   1.5      gwr #define SI_FORCE_POLLING 0x10000
     86   1.5      gwr #define SI_DISABLE_DMA   0x20000
     87   1.2      gwr /* The options are taken from the config file (PR#1929) */
     88   1.1      gwr 
     89   1.1      gwr extern int si_debug;
     90   1.1      gwr 
     91   1.7      chs void si_attach(struct si_softc *);
     92   1.7      chs int  si_intr(void *);
     93   1.1      gwr 
     94   1.7      chs void si_dma_alloc(struct ncr5380_softc *);
     95   1.7      chs void si_dma_free(struct ncr5380_softc *);
     96   1.7      chs void si_dma_poll(struct ncr5380_softc *);
     97