1 1.6 tsutsui /* $NetBSD: xyreg.h,v 1.6 2024/12/20 23:52:00 tsutsui Exp $ */ 2 1.1 gwr 3 1.1 gwr /* 4 1.1 gwr * Copyright (c) 1995 Charles D. Cranor 5 1.1 gwr * All rights reserved. 6 1.1 gwr * 7 1.1 gwr * Redistribution and use in source and binary forms, with or without 8 1.1 gwr * modification, are permitted provided that the following conditions 9 1.1 gwr * are met: 10 1.1 gwr * 1. Redistributions of source code must retain the above copyright 11 1.1 gwr * notice, this list of conditions and the following disclaimer. 12 1.1 gwr * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 gwr * notice, this list of conditions and the following disclaimer in the 14 1.1 gwr * documentation and/or other materials provided with the distribution. 15 1.1 gwr * 16 1.1 gwr * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.1 gwr * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.1 gwr * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.1 gwr * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.1 gwr * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 1.1 gwr * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 1.1 gwr * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 1.1 gwr * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 1.1 gwr * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 1.1 gwr * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 1.1 gwr */ 27 1.1 gwr 28 1.1 gwr /* 29 1.1 gwr * x y r e g . h 30 1.1 gwr * 31 1.1 gwr * this file contains the description of the Xylogics 450/451's hardware 32 1.1 gwr * data structures. 33 1.1 gwr * 34 1.5 chuck * author: Chuck Cranor <chuck@netbsd> 35 1.1 gwr */ 36 1.1 gwr 37 1.1 gwr #define XYC_MAXDEV 2 /* max devices per controller */ 38 1.1 gwr #define XYC_CTLIOPB XYC_MAXDEV /* controller's iopb */ 39 1.1 gwr #define XYC_RESETUSEC 1000000 /* max time for xyc reset (same as xdc?) */ 40 1.1 gwr #define XYC_MAXIOPB (XYC_MAXDEV+1) 41 1.1 gwr /* max number of iopbs that can be active */ 42 1.1 gwr #define XYC_MAXTIME 4*1000000 /* four seconds before we give up and reset */ 43 1.1 gwr #define XYC_MAXTRIES 4 /* max number of times to retry an operation */ 44 1.1 gwr #define XYC_INTERLEAVE 1 /* interleave (from disk label?) */ 45 1.1 gwr #define XYFM_BPS 0x200 /* must be 512! */ 46 1.1 gwr 47 1.1 gwr /* 48 1.1 gwr * xyc device interface 49 1.1 gwr * (lives in VME address space) [note: bytes are swapped!] 50 1.1 gwr */ 51 1.1 gwr 52 1.1 gwr struct xyc { 53 1.1 gwr volatile u_char xyc_reloc_hi; /* iopb relocation (low byte) */ 54 1.1 gwr volatile u_char xyc_reloc_lo; /* iopb relocation (high byte) */ 55 1.1 gwr volatile u_char xyc_addr_hi; /* iopb address (low byte) */ 56 1.1 gwr volatile u_char xyc_addr_lo; /* iopb address (high byte) */ 57 1.1 gwr volatile u_char xyc_rsetup; /* reset/update reg */ 58 1.1 gwr volatile u_char xyc_csr; /* control and status register */ 59 1.1 gwr }; 60 1.1 gwr 61 1.1 gwr /* 62 1.1 gwr * xyc_csr 63 1.1 gwr */ 64 1.1 gwr 65 1.1 gwr #define XYC_GBSY 0x80 /* go/busy */ 66 1.1 gwr #define XYC_ERR 0x40 /* error */ 67 1.1 gwr #define XYC_DERR 0x20 /* double error! */ 68 1.1 gwr #define XYC_IPND 0x10 /* interrupt pending */ 69 1.1 gwr #define XYC_ADRM 0x08 /* 24-bit addressing */ 70 1.1 gwr #define XYC_AREQ 0x04 /* attention request */ 71 1.1 gwr #define XYC_AACK 0x02 /* attention ack. */ 72 1.1 gwr #define XYC_DRDY 0x01 /* drive ready */ 73 1.1 gwr 74 1.1 gwr /* 75 1.1 gwr * Input/Output Parameter Block (iopb) 76 1.1 gwr * 77 1.1 gwr * all controller commands are done via iopb's. to start a command you 78 1.1 gwr * must do this: 79 1.1 gwr * [1] allocate space in DVMA space for the iopb 80 1.1 gwr * [2] fill out all the fields of the iopb 81 1.1 gwr * [3] if the controller isn't busy, start the iopb by loading the address 82 1.1 gwr * and reloc in the xyc's registers and setting the "go" bit [done] 83 1.1 gwr * [4] controller busy: set AREQ bit, and wait for AACK bit. 84 1.1 gwr * add iopb to the chain, and clear AREQ to resume I/O 85 1.1 gwr * 86 1.1 gwr * when the controller is done with a command it may interrupt (if you 87 1.6 tsutsui * ask it to) and it will set the XYC_IPND bit in the csr. clear 88 1.1 gwr * the interrupt by writing one to this bit. 89 1.6 tsutsui * 90 1.1 gwr * the format of the iopb is described in section 2.4 of the manual. 91 1.1 gwr * note that it is byte-swapped on the sun. 92 1.1 gwr */ 93 1.1 gwr 94 1.1 gwr struct xy_iopb { 95 1.1 gwr /* section 2.4.2: byte 1 */ 96 1.1 gwr volatile u_char resv1:1; /* reserved */ 97 1.1 gwr volatile u_char iei:1; /* interrupt on each IOPB done */ 98 1.1 gwr volatile u_char ierr:1; /* interrupt on error (no effect on 450) */ 99 1.1 gwr volatile u_char hdp:1; /* hold dual port drive */ 100 1.1 gwr volatile u_char asr:1; /* autoseek retry */ 101 1.1 gwr volatile u_char eef:1; /* enable extended fn. (overlap seek) */ 102 1.1 gwr volatile u_char ecm:2; /* ECC correction mode */ 103 1.1 gwr #define XY_ECM 2 /* use mode 2 (see section 2.4.2) */ 104 1.1 gwr /* section 2.4.1: byte 0 */ 105 1.1 gwr volatile u_char aud:1; /* auto-update iopb */ 106 1.1 gwr volatile u_char relo:1; /* enable multibus relocation (>16bit addrs)*/ 107 1.1 gwr volatile u_char chen:1; /* chain enable, "next iopb" is valid */ 108 1.1 gwr volatile u_char ien:1; /* interrupt enable */ 109 1.1 gwr volatile u_char com:4; /* command */ 110 1.1 gwr #define XYCMD_NOP 0x0 /* no-op */ 111 1.1 gwr #define XYCMD_WR 0x1 /* write */ 112 1.1 gwr #define XYCMD_RD 0x2 /* read */ 113 1.1 gwr #define XYCMD_WTH 0x3 /* write track headers */ 114 1.1 gwr #define XYCMD_RTH 0x4 /* read track headers */ 115 1.1 gwr #define XYCMD_SK 0x5 /* seek */ 116 1.1 gwr #define XYCMD_RST 0x6 /* drive reset */ 117 1.1 gwr #define XYCMD_WFM 0x7 /* write format */ 118 1.1 gwr #define XYCMD_RDH 0x8 /* read header, data, and ECC */ 119 1.1 gwr #define XYCMD_RDS 0x9 /* read drive status */ 120 1.1 gwr #define XYCMD_WRH 0xa /* write header, data, and ECC */ 121 1.1 gwr #define XYCMD_SDS 0xb /* set drive size */ 122 1.1 gwr #define XYCMD_ST 0xc /* self test */ 123 1.1 gwr #define XYCMD_R 0xd /* reserved */ 124 1.1 gwr #define XYCMD_MBL 0xe /* maint. buffer load */ 125 1.1 gwr #define XYCMD_MBD 0xf /* main. buffer dump */ 126 1.1 gwr /* section 2.4.4: byte 3 */ 127 1.1 gwr volatile u_char errno; /* error or completion code */ 128 1.1 gwr /* section 2.4.3: byte 2 */ 129 1.1 gwr volatile u_char errs:1; /* error summary bit */ 130 1.1 gwr volatile u_char resv2:2; /* reserved */ 131 1.1 gwr volatile u_char ctyp:3; /* controller type */ 132 1.1 gwr #define XYCT_450 1 /* the 450 controller */ 133 1.1 gwr volatile u_char resv3:1; /* reserved */ 134 1.1 gwr volatile u_char done:1; /* done! */ 135 1.1 gwr /* section 2.4.6: byte 5 */ 136 1.1 gwr volatile u_char dt:2; /* drive type */ 137 1.1 gwr #define XYC_MAXDT 3 /* largest drive type possible */ 138 1.1 gwr volatile u_char resv4:4; /* reserved */ 139 1.1 gwr volatile u_char unit:2; /* unit # */ 140 1.1 gwr /* section 2.4.5: byte 4 */ 141 1.1 gwr volatile u_char bw:1; /* byte(1)/word(0) xfer size */ 142 1.1 gwr volatile u_char intlv:4; /* interleave factor (0=1:1, 1=2:1, etc.) */ 143 1.2 wiz volatile u_char thro:3; /* DMA throttle (0=2,1=4,2=8, etc...) */ 144 1.2 wiz #define XY_THRO 4 /* 4 == 32 DMA cycles */ 145 1.1 gwr /* section 2.4.8: byte 7 */ 146 1.1 gwr volatile u_char sect; /* sector # */ 147 1.1 gwr /* section 2.4.7: byte 6 */ 148 1.1 gwr volatile u_char head; /* head # */ 149 1.1 gwr /* section 2.4.9: byte 8,9 */ 150 1.1 gwr volatile u_short cyl; /* cyl # */ 151 1.1 gwr /* section 2.4.10: byte a,b */ 152 1.1 gwr volatile u_short scnt; /* sector count, also drive status */ 153 1.1 gwr #define xy_dr_status scnt 154 1.1 gwr #define XYS_ONCL 0x80 /* on-cylinder (active LOW) */ 155 1.1 gwr #define XYS_DRDY 0x40 /* drive ready (active LOW) */ 156 1.1 gwr #define XYS_WRPT 0x20 /* write protect */ 157 1.1 gwr #define XYS_DPB 0x10 /* dual-port busy */ 158 1.1 gwr #define XYS_SKER 0x08 /* hard seek error */ 159 1.1 gwr #define XYS_DFLT 0x04 /* disk fault */ 160 1.1 gwr /* section 2.4.11: byte c,d */ 161 1.1 gwr volatile u_short dataa; /* data address */ 162 1.1 gwr /* section 2.4.12: byte e,f */ 163 1.1 gwr volatile u_short datar; /* data relocation pointer */ 164 1.1 gwr /* section 2.4.14: byte 11 */ 165 1.1 gwr volatile u_char subfn; /* sub-function */ 166 1.1 gwr /* section 2.4.13: byte 10 */ 167 1.3 wiz volatile u_char hoff; /* head offset for fixed/removable drives */ 168 1.1 gwr /* section 2.4.15: byte 12,13 */ 169 1.1 gwr volatile u_short nxtiopb; /* next iopb address (same relocation) */ 170 1.1 gwr /* section 2.4.16: byte 14,15 */ 171 1.1 gwr volatile u_short eccpat; /* ecc pattern */ 172 1.1 gwr /* section 2.4.17: byte 16,17 */ 173 1.1 gwr volatile u_short eccaddr; /* ecc address */ 174 1.1 gwr }; 175 1.1 gwr 176 1.1 gwr 177 1.1 gwr /* 178 1.1 gwr * errors (section 2.4.4.1) 179 1.1 gwr */ 180 1.1 gwr 181 1.1 gwr /* software error codes */ 182 1.1 gwr #define XY_ERR_FAIL 0xff /* general total failure */ 183 1.1 gwr #define XY_ERR_DERR 0xfe /* double error */ 184 1.1 gwr /* no error */ 185 1.1 gwr #define XY_ERR_AOK 0x00 /* success */ 186 1.1 gwr 187 1.1 gwr #define XY_ERR_IPEN 0x01 /* interrupt pending */ 188 1.1 gwr #define XY_ERR_BCFL 0x03 /* busy conflict */ 189 1.1 gwr #define XY_ERR_TIMO 0x04 /* operation timeout */ 190 1.1 gwr #define XY_ERR_NHDR 0x05 /* header not found */ 191 1.1 gwr #define XY_ERR_HARD 0x06 /* hard ECC error */ 192 1.1 gwr #define XY_ERR_ICYL 0x07 /* illegal cylinder address */ 193 1.1 gwr #define XY_ERR_ISEC 0x0a /* illegal sector address */ 194 1.1 gwr #define XY_ERR_SMAL 0x0d /* last sector too small */ 195 1.1 gwr #define XY_ERR_SACK 0x0e /* slave ACK error (non-existent memory) */ 196 1.1 gwr #define XY_ERR_CHER 0x12 /* cylinder and head/header error */ 197 1.1 gwr #define XY_ERR_SRTR 0x13 /* auto-seek retry successful */ 198 1.1 gwr #define XY_ERR_WPRO 0x14 /* write-protect error */ 199 1.1 gwr #define XY_ERR_UIMP 0x15 /* unimplemented command */ 200 1.1 gwr #define XY_ERR_DNRY 0x16 /* drive not ready */ 201 1.1 gwr #define XY_ERR_SZER 0x17 /* sector count zero */ 202 1.1 gwr #define XY_ERR_DFLT 0x18 /* drive faulted */ 203 1.1 gwr #define XY_ERR_ISSZ 0x19 /* illegal sector size */ 204 1.1 gwr #define XY_ERR_SLTA 0x1a /* self test a */ 205 1.1 gwr #define XY_ERR_SLTB 0x1b /* self test b */ 206 1.1 gwr #define XY_ERR_SLTC 0x1c /* self test c */ 207 1.1 gwr #define XY_ERR_SOFT 0x1e /* soft ECC error */ 208 1.1 gwr #define XY_ERR_SFOK 0x1f /* soft ECC error recovered */ 209 1.1 gwr #define XY_ERR_IHED 0x20 /* illegal head */ 210 1.1 gwr #define XY_ERR_DSEQ 0x21 /* disk sequencer error */ 211 1.1 gwr #define XY_ERR_SEEK 0x25 /* seek error */ 212 1.1 gwr 213 1.1 gwr 214 1.1 gwr /* error actions */ 215 1.1 gwr #define XY_ERA_PROG 0x10 /* program error: quit */ 216 1.1 gwr #define XY_ERA_SOFT 0x30 /* soft error: we recovered */ 217 1.1 gwr #define XY_ERA_HARD 0x40 /* hard error: retry */ 218 1.1 gwr #define XY_ERA_RSET 0x60 /* hard error: reset, then retry */ 219 1.1 gwr #define XY_ERA_WPRO 0x90 /* write protected */ 220 1.1 gwr 221 1.1 gwr 222