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xyreg.h revision 1.2
      1  1.2  wiz /* $NetBSD: xyreg.h,v 1.2 2003/05/03 18:11:05 wiz Exp $ */
      2  1.1  gwr 
      3  1.1  gwr /*
      4  1.1  gwr  *
      5  1.1  gwr  * Copyright (c) 1995 Charles D. Cranor
      6  1.1  gwr  * All rights reserved.
      7  1.1  gwr  *
      8  1.1  gwr  * Redistribution and use in source and binary forms, with or without
      9  1.1  gwr  * modification, are permitted provided that the following conditions
     10  1.1  gwr  * are met:
     11  1.1  gwr  * 1. Redistributions of source code must retain the above copyright
     12  1.1  gwr  *    notice, this list of conditions and the following disclaimer.
     13  1.1  gwr  * 2. Redistributions in binary form must reproduce the above copyright
     14  1.1  gwr  *    notice, this list of conditions and the following disclaimer in the
     15  1.1  gwr  *    documentation and/or other materials provided with the distribution.
     16  1.1  gwr  * 3. All advertising materials mentioning features or use of this software
     17  1.1  gwr  *    must display the following acknowledgement:
     18  1.1  gwr  *      This product includes software developed by Charles D. Cranor.
     19  1.1  gwr  * 4. The name of the author may not be used to endorse or promote products
     20  1.1  gwr  *    derived from this software without specific prior written permission.
     21  1.1  gwr  *
     22  1.1  gwr  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     23  1.1  gwr  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24  1.1  gwr  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25  1.1  gwr  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     26  1.1  gwr  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     27  1.1  gwr  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     28  1.1  gwr  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     29  1.1  gwr  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     30  1.1  gwr  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     31  1.1  gwr  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32  1.1  gwr  */
     33  1.1  gwr 
     34  1.1  gwr /*
     35  1.1  gwr  * x y r e g . h
     36  1.1  gwr  *
     37  1.1  gwr  * this file contains the description of the Xylogics 450/451's hardware
     38  1.1  gwr  * data structures.
     39  1.1  gwr  *
     40  1.1  gwr  * author: Chuck Cranor <chuck (at) ccrc.wustl.edu>
     41  1.1  gwr  */
     42  1.1  gwr 
     43  1.1  gwr #define XYC_MAXDEV    2       /* max devices per controller */
     44  1.1  gwr #define XYC_CTLIOPB   XYC_MAXDEV /* controller's iopb */
     45  1.1  gwr #define XYC_RESETUSEC 1000000 /* max time for xyc reset (same as xdc?) */
     46  1.1  gwr #define XYC_MAXIOPB   (XYC_MAXDEV+1)
     47  1.1  gwr 			      /* max number of iopbs that can be active */
     48  1.1  gwr #define XYC_MAXTIME   4*1000000 /* four seconds before we give up and reset */
     49  1.1  gwr #define XYC_MAXTRIES  4       /* max number of times to retry an operation */
     50  1.1  gwr #define XYC_INTERLEAVE 1      /* interleave (from disk label?) */
     51  1.1  gwr #define XYFM_BPS	0x200 /* must be 512! */
     52  1.1  gwr 
     53  1.1  gwr /*
     54  1.1  gwr  * xyc device interface
     55  1.1  gwr  * (lives in VME address space)   [note: bytes are swapped!]
     56  1.1  gwr  */
     57  1.1  gwr 
     58  1.1  gwr struct xyc {
     59  1.1  gwr   volatile u_char xyc_reloc_hi;        /* iopb relocation (low byte) */
     60  1.1  gwr   volatile u_char xyc_reloc_lo;        /* iopb relocation (high byte) */
     61  1.1  gwr   volatile u_char xyc_addr_hi;         /* iopb address (low byte) */
     62  1.1  gwr   volatile u_char xyc_addr_lo;         /* iopb address (high byte) */
     63  1.1  gwr   volatile u_char xyc_rsetup;          /* reset/update reg */
     64  1.1  gwr   volatile u_char xyc_csr;             /* control and status register */
     65  1.1  gwr };
     66  1.1  gwr 
     67  1.1  gwr /*
     68  1.1  gwr  * xyc_csr
     69  1.1  gwr  */
     70  1.1  gwr 
     71  1.1  gwr #define XYC_GBSY     0x80     /* go/busy */
     72  1.1  gwr #define XYC_ERR	     0x40     /* error */
     73  1.1  gwr #define XYC_DERR     0x20     /* double error! */
     74  1.1  gwr #define XYC_IPND     0x10     /* interrupt pending */
     75  1.1  gwr #define XYC_ADRM     0x08     /* 24-bit addressing */
     76  1.1  gwr #define XYC_AREQ     0x04     /* attention request */
     77  1.1  gwr #define XYC_AACK     0x02     /* attention ack. */
     78  1.1  gwr #define XYC_DRDY     0x01     /* drive ready */
     79  1.1  gwr 
     80  1.1  gwr /*
     81  1.1  gwr  * Input/Output Parameter Block (iopb)
     82  1.1  gwr  *
     83  1.1  gwr  * all controller commands are done via iopb's.   to start a command you
     84  1.1  gwr  * must do this:
     85  1.1  gwr  * [1] allocate space in DVMA space for the iopb
     86  1.1  gwr  * [2] fill out all the fields of the iopb
     87  1.1  gwr  * [3] if the controller isn't busy, start the iopb by loading the address
     88  1.1  gwr  *     and reloc in the xyc's registers and setting the "go" bit [done]
     89  1.1  gwr  * [4] controller busy: set AREQ bit, and wait for AACK bit.
     90  1.1  gwr  *     add iopb to the chain, and clear AREQ to resume I/O
     91  1.1  gwr  *
     92  1.1  gwr  * when the controller is done with a command it may interrupt (if you
     93  1.1  gwr  * ask it to) and it will set the XYC_IPND bit in the csr.   clear
     94  1.1  gwr  * the interrupt by writing one to this bit.
     95  1.1  gwr  *
     96  1.1  gwr  * the format of the iopb is described in section 2.4 of the manual.
     97  1.1  gwr  * note that it is byte-swapped on the sun.
     98  1.1  gwr  */
     99  1.1  gwr 
    100  1.1  gwr struct xy_iopb {
    101  1.1  gwr 				 /* section 2.4.2: byte 1 */
    102  1.1  gwr   volatile u_char resv1:1;	 /* reserved */
    103  1.1  gwr   volatile u_char iei:1;	 /* interrupt on each IOPB done */
    104  1.1  gwr   volatile u_char ierr:1;	 /* interrupt on error (no effect on 450) */
    105  1.1  gwr   volatile u_char hdp:1;	 /* hold dual port drive */
    106  1.1  gwr   volatile u_char asr:1;	 /* autoseek retry */
    107  1.1  gwr   volatile u_char eef:1;	 /* enable extended fn. (overlap seek) */
    108  1.1  gwr   volatile u_char ecm:2;	 /* ECC correction mode */
    109  1.1  gwr #define XY_ECM 2		 /* use mode 2 (see section 2.4.2) */
    110  1.1  gwr                                  /* section 2.4.1: byte 0 */
    111  1.1  gwr   volatile u_char aud:1;	 /* auto-update iopb */
    112  1.1  gwr   volatile u_char relo:1;	 /* enable multibus relocation (>16bit addrs)*/
    113  1.1  gwr   volatile u_char chen:1;        /* chain enable, "next iopb" is valid */
    114  1.1  gwr   volatile u_char ien:1;	 /* interrupt enable */
    115  1.1  gwr   volatile u_char com:4;	 /* command */
    116  1.1  gwr #define XYCMD_NOP 0x0            /* no-op */
    117  1.1  gwr #define XYCMD_WR  0x1            /* write */
    118  1.1  gwr #define XYCMD_RD  0x2            /* read */
    119  1.1  gwr #define XYCMD_WTH 0x3		 /* write track headers */
    120  1.1  gwr #define XYCMD_RTH 0x4		 /* read track headers */
    121  1.1  gwr #define XYCMD_SK  0x5            /* seek */
    122  1.1  gwr #define XYCMD_RST 0x6            /* drive reset */
    123  1.1  gwr #define XYCMD_WFM 0x7		 /* write format */
    124  1.1  gwr #define XYCMD_RDH 0x8		 /* read header, data, and ECC */
    125  1.1  gwr #define XYCMD_RDS 0x9		 /* read drive status */
    126  1.1  gwr #define XYCMD_WRH 0xa		 /* write header, data, and ECC */
    127  1.1  gwr #define XYCMD_SDS 0xb		 /* set drive size */
    128  1.1  gwr #define XYCMD_ST  0xc		 /* self test */
    129  1.1  gwr #define XYCMD_R   0xd		 /* reserved */
    130  1.1  gwr #define XYCMD_MBL 0xe		 /* maint. buffer load */
    131  1.1  gwr #define XYCMD_MBD 0xf		 /* main. buffer dump */
    132  1.1  gwr                                  /* section 2.4.4: byte 3 */
    133  1.1  gwr   volatile u_char errno;	 /* error or completion code */
    134  1.1  gwr                                  /* section 2.4.3: byte 2 */
    135  1.1  gwr   volatile u_char errs:1;        /* error summary bit */
    136  1.1  gwr   volatile u_char resv2:2;	 /* reserved */
    137  1.1  gwr   volatile u_char ctyp:3;	 /* controller type */
    138  1.1  gwr #define XYCT_450 1		 /* the 450 controller */
    139  1.1  gwr   volatile u_char resv3:1;	 /* reserved */
    140  1.1  gwr   volatile u_char done:1;	 /* done! */
    141  1.1  gwr                                  /* section 2.4.6: byte 5 */
    142  1.1  gwr   volatile u_char dt:2;		 /* drive type */
    143  1.1  gwr #define XYC_MAXDT 3		 /* largest drive type possible */
    144  1.1  gwr   volatile u_char resv4:4;	 /* reserved */
    145  1.1  gwr   volatile u_char unit:2;	 /* unit # */
    146  1.1  gwr                                  /* section 2.4.5: byte 4 */
    147  1.1  gwr   volatile u_char bw:1;		 /* byte(1)/word(0) xfer size */
    148  1.1  gwr   volatile u_char intlv:4;	 /* interleave factor (0=1:1, 1=2:1, etc.) */
    149  1.2  wiz   volatile u_char thro:3;	 /* DMA throttle (0=2,1=4,2=8, etc...) */
    150  1.2  wiz #define XY_THRO 4		 /* 4 == 32 DMA cycles */
    151  1.1  gwr                                  /* section 2.4.8: byte 7 */
    152  1.1  gwr   volatile u_char sect;		 /* sector # */
    153  1.1  gwr                                  /* section 2.4.7: byte 6 */
    154  1.1  gwr   volatile u_char head;		 /* head # */
    155  1.1  gwr                                  /* section 2.4.9: byte 8,9 */
    156  1.1  gwr   volatile u_short cyl;		 /* cyl # */
    157  1.1  gwr                                  /* section 2.4.10: byte a,b */
    158  1.1  gwr   volatile u_short scnt;	 /* sector count, also drive status */
    159  1.1  gwr #define xy_dr_status scnt
    160  1.1  gwr #define XYS_ONCL 0x80		 /* on-cylinder (active LOW) */
    161  1.1  gwr #define XYS_DRDY 0x40		 /* drive ready (active LOW) */
    162  1.1  gwr #define XYS_WRPT 0x20		 /* write protect */
    163  1.1  gwr #define XYS_DPB  0x10		 /* dual-port busy */
    164  1.1  gwr #define XYS_SKER 0x08		 /* hard seek error */
    165  1.1  gwr #define XYS_DFLT 0x04		 /* disk fault */
    166  1.1  gwr                                  /* section 2.4.11: byte c,d */
    167  1.1  gwr   volatile u_short dataa;	 /* data address */
    168  1.1  gwr                                  /* section 2.4.12: byte e,f */
    169  1.1  gwr   volatile u_short datar;	 /* data relocation pointer */
    170  1.1  gwr 				 /* section 2.4.14: byte 11 */
    171  1.1  gwr   volatile u_char subfn;	 /* sub-function */
    172  1.1  gwr 				 /* section 2.4.13: byte 10 */
    173  1.1  gwr   volatile u_char hoff;		 /* head offset for fixed/removeable drives */
    174  1.1  gwr 				 /* section 2.4.15: byte 12,13 */
    175  1.1  gwr   volatile u_short nxtiopb;	 /* next iopb address (same relocation) */
    176  1.1  gwr 				 /* section 2.4.16: byte 14,15 */
    177  1.1  gwr   volatile u_short eccpat;	 /* ecc pattern */
    178  1.1  gwr 				 /* section 2.4.17: byte 16,17 */
    179  1.1  gwr   volatile u_short eccaddr;	 /* ecc address */
    180  1.1  gwr };
    181  1.1  gwr 
    182  1.1  gwr 
    183  1.1  gwr /*
    184  1.1  gwr  * errors (section 2.4.4.1)
    185  1.1  gwr  */
    186  1.1  gwr 
    187  1.1  gwr /* software error codes */
    188  1.1  gwr #define XY_ERR_FAIL 0xff         /* general total failure */
    189  1.1  gwr #define XY_ERR_DERR 0xfe	 /* double error */
    190  1.1  gwr /* no error */
    191  1.1  gwr #define XY_ERR_AOK  0x00         /* success */
    192  1.1  gwr 
    193  1.1  gwr #define XY_ERR_IPEN 0x01	 /* interrupt pending */
    194  1.1  gwr #define XY_ERR_BCFL 0x03	 /* busy conflict */
    195  1.1  gwr #define XY_ERR_TIMO 0x04	 /* operation timeout */
    196  1.1  gwr #define XY_ERR_NHDR 0x05	 /* header not found */
    197  1.1  gwr #define XY_ERR_HARD 0x06	 /* hard ECC error */
    198  1.1  gwr #define XY_ERR_ICYL 0x07	 /* illegal cylinder address */
    199  1.1  gwr #define XY_ERR_ISEC 0x0a	 /* illegal sector address */
    200  1.1  gwr #define XY_ERR_SMAL 0x0d	 /* last sector too small */
    201  1.1  gwr #define XY_ERR_SACK 0x0e	 /* slave ACK error (non-existent memory) */
    202  1.1  gwr #define XY_ERR_CHER 0x12	 /* cylinder and head/header error */
    203  1.1  gwr #define XY_ERR_SRTR 0x13	 /* auto-seek retry successful */
    204  1.1  gwr #define XY_ERR_WPRO 0x14	 /* write-protect error */
    205  1.1  gwr #define XY_ERR_UIMP 0x15	 /* unimplemented command */
    206  1.1  gwr #define XY_ERR_DNRY 0x16	 /* drive not ready */
    207  1.1  gwr #define XY_ERR_SZER 0x17	 /* sector count zero */
    208  1.1  gwr #define XY_ERR_DFLT 0x18	 /* drive faulted */
    209  1.1  gwr #define XY_ERR_ISSZ 0x19	 /* illegal sector size */
    210  1.1  gwr #define XY_ERR_SLTA 0x1a	 /* self test a */
    211  1.1  gwr #define XY_ERR_SLTB 0x1b	 /* self test b */
    212  1.1  gwr #define XY_ERR_SLTC 0x1c	 /* self test c */
    213  1.1  gwr #define XY_ERR_SOFT 0x1e	 /* soft ECC error */
    214  1.1  gwr #define XY_ERR_SFOK 0x1f	 /* soft ECC error recovered */
    215  1.1  gwr #define XY_ERR_IHED 0x20	 /* illegal head */
    216  1.1  gwr #define XY_ERR_DSEQ 0x21	 /* disk sequencer error */
    217  1.1  gwr #define XY_ERR_SEEK 0x25	 /* seek error */
    218  1.1  gwr 
    219  1.1  gwr 
    220  1.1  gwr /* error actions */
    221  1.1  gwr #define XY_ERA_PROG 0x10	 /* program error: quit */
    222  1.1  gwr #define XY_ERA_SOFT 0x30         /* soft error: we recovered */
    223  1.1  gwr #define XY_ERA_HARD 0x40         /* hard error: retry */
    224  1.1  gwr #define XY_ERA_RSET 0x60         /* hard error: reset, then retry */
    225  1.1  gwr #define XY_ERA_WPRO 0x90         /* write protected */
    226  1.1  gwr 
    227  1.1  gwr 
    228