zs.c revision 1.52 1 1.52 thorpej /* $NetBSD: zs.c,v 1.52 1998/01/12 20:32:29 thorpej Exp $ */
2 1.10 cgd
3 1.42 gwr /*-
4 1.42 gwr * Copyright (c) 1996 The NetBSD Foundation, Inc.
5 1.31 gwr * All rights reserved.
6 1.1 glass *
7 1.42 gwr * This code is derived from software contributed to The NetBSD Foundation
8 1.42 gwr * by Gordon W. Ross.
9 1.42 gwr *
10 1.1 glass * Redistribution and use in source and binary forms, with or without
11 1.1 glass * modification, are permitted provided that the following conditions
12 1.1 glass * are met:
13 1.1 glass * 1. Redistributions of source code must retain the above copyright
14 1.1 glass * notice, this list of conditions and the following disclaimer.
15 1.1 glass * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 glass * notice, this list of conditions and the following disclaimer in the
17 1.1 glass * documentation and/or other materials provided with the distribution.
18 1.42 gwr * 3. All advertising materials mentioning features or use of this software
19 1.1 glass * must display the following acknowledgement:
20 1.42 gwr * This product includes software developed by the NetBSD
21 1.42 gwr * Foundation, Inc. and its contributors.
22 1.42 gwr * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.42 gwr * contributors may be used to endorse or promote products derived
24 1.42 gwr * from this software without specific prior written permission.
25 1.1 glass *
26 1.42 gwr * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.42 gwr * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.42 gwr * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.44 gwr * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.44 gwr * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.42 gwr * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.42 gwr * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.42 gwr * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.42 gwr * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.42 gwr * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.42 gwr * POSSIBILITY OF SUCH DAMAGE.
37 1.1 glass */
38 1.1 glass
39 1.1 glass /*
40 1.31 gwr * Zilog Z8530 Dual UART driver (machine-dependent part)
41 1.1 glass *
42 1.31 gwr * Runs two serial lines per chip using slave drivers.
43 1.31 gwr * Plain tty/async lines use the zs_async slave.
44 1.31 gwr * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
45 1.1 glass */
46 1.1 glass
47 1.5 gwr #include <sys/param.h>
48 1.1 glass #include <sys/systm.h>
49 1.43 gwr #include <sys/conf.h>
50 1.1 glass #include <sys/device.h>
51 1.1 glass #include <sys/file.h>
52 1.1 glass #include <sys/ioctl.h>
53 1.43 gwr #include <sys/kernel.h>
54 1.43 gwr #include <sys/proc.h>
55 1.1 glass #include <sys/tty.h>
56 1.1 glass #include <sys/time.h>
57 1.1 glass #include <sys/syslog.h>
58 1.1 glass
59 1.1 glass #include <machine/autoconf.h>
60 1.1 glass #include <machine/cpu.h>
61 1.1 glass #include <machine/obio.h>
62 1.47 gwr #include <machine/machdep.h>
63 1.3 gwr #include <machine/mon.h>
64 1.49 gwr #include <machine/z8530var.h>
65 1.49 gwr
66 1.49 gwr #include <dev/cons.h>
67 1.49 gwr #include <dev/ic/z8530reg.h>
68 1.1 glass
69 1.44 gwr #include <sun3/dev/zs_cons.h>
70 1.50 gwr
71 1.50 gwr #include "kbd.h" /* NKBD */
72 1.50 gwr #include "zsc.h" /* NZSC */
73 1.50 gwr #define NZS NZSC
74 1.50 gwr
75 1.50 gwr /* Make life easier for the initialized arrays here. */
76 1.50 gwr #if NZS < 2
77 1.50 gwr #undef NZS
78 1.50 gwr #define NZS 2
79 1.50 gwr #endif
80 1.47 gwr
81 1.47 gwr extern void Debugger __P((void));
82 1.43 gwr
83 1.16 gwr /*
84 1.43 gwr * Some warts needed by z8530tty.c -
85 1.43 gwr * The default parity REALLY needs to be the same as the PROM uses,
86 1.43 gwr * or you can not see messages done with printf during boot-up...
87 1.43 gwr */
88 1.43 gwr int zs_def_cflag = (CREAD | CS8 | HUPCL);
89 1.43 gwr int zs_major = 12;
90 1.1 glass
91 1.43 gwr /*
92 1.43 gwr * The Sun3 provides a 4.9152 MHz clock to the ZS chips.
93 1.43 gwr */
94 1.2 glass #define PCLK (9600 * 512) /* PCLK pin input clock rate */
95 1.2 glass
96 1.2 glass /*
97 1.22 gwr * Define interrupt levels.
98 1.2 glass */
99 1.2 glass #define ZSHARD_PRI 6 /* Wired on the CPU board... */
100 1.22 gwr #define ZSSOFT_PRI 3 /* Want tty pri (4) but this is OK. */
101 1.1 glass
102 1.33 gwr #define ZS_DELAY() delay(2)
103 1.31 gwr
104 1.31 gwr /* The layout of this is hardware-dependent (padding, order). */
105 1.31 gwr struct zschan {
106 1.31 gwr volatile u_char zc_csr; /* ctrl,status, and indirect access */
107 1.31 gwr u_char zc_xxx0;
108 1.31 gwr volatile u_char zc_data; /* data */
109 1.31 gwr u_char zc_xxx1;
110 1.31 gwr };
111 1.31 gwr struct zsdevice {
112 1.31 gwr /* Yes, they are backwards. */
113 1.31 gwr struct zschan zs_chan_b;
114 1.31 gwr struct zschan zs_chan_a;
115 1.1 glass };
116 1.1 glass
117 1.1 glass
118 1.31 gwr /* Default OBIO addresses. */
119 1.50 gwr static int zs_physaddr[NZS] = {
120 1.44 gwr OBIO_ZS_KBD_MS,
121 1.44 gwr OBIO_ZS_TTY_AB };
122 1.43 gwr
123 1.31 gwr /* Saved PROM mappings */
124 1.50 gwr static struct zsdevice *zsaddr[NZS];
125 1.43 gwr
126 1.31 gwr /* Flags from cninit() */
127 1.50 gwr static int zs_hwflags[NZS][2];
128 1.43 gwr
129 1.31 gwr /* Default speed for each channel */
130 1.50 gwr static int zs_defspeed[NZS][2] = {
131 1.31 gwr { 1200, /* keyboard */
132 1.31 gwr 1200 }, /* mouse */
133 1.31 gwr { 9600, /* ttya */
134 1.31 gwr 9600 }, /* ttyb */
135 1.31 gwr };
136 1.13 gwr
137 1.43 gwr static u_char zs_init_reg[16] = {
138 1.43 gwr 0, /* 0: CMD (reset, etc.) */
139 1.43 gwr 0, /* 1: No interrupts yet. */
140 1.43 gwr 0x18 + ZSHARD_PRI, /* IVECT */
141 1.43 gwr ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
142 1.43 gwr ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
143 1.43 gwr ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
144 1.43 gwr 0, /* 6: TXSYNC/SYNCLO */
145 1.43 gwr 0, /* 7: RXSYNC/SYNCHI */
146 1.43 gwr 0, /* 8: alias for data port */
147 1.43 gwr ZSWR9_MASTER_IE,
148 1.43 gwr 0, /*10: Misc. TX/RX control bits */
149 1.43 gwr ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
150 1.43 gwr 14, /*12: BAUDLO (default=9600) */
151 1.43 gwr 0, /*13: BAUDHI (default=9600) */
152 1.43 gwr ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
153 1.43 gwr ZSWR15_BREAK_IE | ZSWR15_DCD_IE,
154 1.43 gwr };
155 1.43 gwr
156 1.1 glass
157 1.31 gwr /* Find PROM mappings (for console support). */
158 1.43 gwr void
159 1.43 gwr zs_init()
160 1.31 gwr {
161 1.31 gwr int i;
162 1.1 glass
163 1.50 gwr for (i = 0; i < NZS; i++) {
164 1.31 gwr zsaddr[i] = (struct zsdevice *)
165 1.44 gwr obio_find_mapping(zs_physaddr[i], sizeof(struct zschan));
166 1.31 gwr }
167 1.43 gwr }
168 1.13 gwr
169 1.47 gwr struct zschan *
170 1.50 gwr zs_get_chan_addr(zs_unit, channel)
171 1.50 gwr int zs_unit, channel;
172 1.31 gwr {
173 1.31 gwr struct zsdevice *addr;
174 1.31 gwr struct zschan *zc;
175 1.31 gwr
176 1.50 gwr if (zs_unit >= NZS)
177 1.31 gwr return NULL;
178 1.50 gwr addr = zsaddr[zs_unit];
179 1.31 gwr if (addr == NULL)
180 1.31 gwr return NULL;
181 1.31 gwr if (channel == 0) {
182 1.31 gwr zc = &addr->zs_chan_a;
183 1.31 gwr } else {
184 1.31 gwr zc = &addr->zs_chan_b;
185 1.31 gwr }
186 1.31 gwr return (zc);
187 1.31 gwr }
188 1.13 gwr
189 1.18 gwr
190 1.31 gwr /****************************************************************
191 1.31 gwr * Autoconfig
192 1.31 gwr ****************************************************************/
193 1.31 gwr
194 1.31 gwr /* Definition of the driver for autoconfig. */
195 1.50 gwr static int zs_match __P((struct device *, struct cfdata *, void *));
196 1.50 gwr static void zs_attach __P((struct device *, struct device *, void *));
197 1.50 gwr static int zs_print __P((void *, const char *name));
198 1.31 gwr
199 1.34 thorpej struct cfattach zsc_ca = {
200 1.50 gwr sizeof(struct zsc_softc), zs_match, zs_attach
201 1.34 thorpej };
202 1.34 thorpej
203 1.52 thorpej extern struct cfdriver zsc_cd;
204 1.31 gwr
205 1.43 gwr static int zshard __P((void *));
206 1.43 gwr static int zssoft __P((void *));
207 1.43 gwr static int zs_get_speed __P((struct zs_chanstate *));
208 1.31 gwr
209 1.9 gwr
210 1.1 glass /*
211 1.31 gwr * Is the zs chip present?
212 1.1 glass */
213 1.1 glass static int
214 1.50 gwr zs_match(parent, cf, aux)
215 1.31 gwr struct device *parent;
216 1.43 gwr struct cfdata *cf;
217 1.43 gwr void *aux;
218 1.1 glass {
219 1.31 gwr struct confargs *ca = aux;
220 1.50 gwr int unit = cf->cf_unit;
221 1.35 gwr void *va;
222 1.13 gwr
223 1.35 gwr /*
224 1.43 gwr * This driver only supports its wired-in mappings,
225 1.43 gwr * because the console support depends on those.
226 1.35 gwr */
227 1.43 gwr if (ca->ca_paddr != zs_physaddr[unit])
228 1.35 gwr return (0);
229 1.35 gwr
230 1.31 gwr /* Make sure zs_init() found mappings. */
231 1.35 gwr va = zsaddr[unit];
232 1.35 gwr if (va == NULL)
233 1.21 gwr return (0);
234 1.21 gwr
235 1.21 gwr /* This returns -1 on a fault (bus error). */
236 1.43 gwr if (peek_byte(va) == -1)
237 1.43 gwr return (0);
238 1.43 gwr
239 1.43 gwr /* Default interrupt priority (always splbio==2) */
240 1.43 gwr if (ca->ca_intpri == -1)
241 1.43 gwr ca->ca_intpri = ZSHARD_PRI;
242 1.43 gwr
243 1.43 gwr return (1);
244 1.1 glass }
245 1.1 glass
246 1.1 glass /*
247 1.1 glass * Attach a found zs.
248 1.1 glass *
249 1.31 gwr * Match slave number to zs unit number, so that misconfiguration will
250 1.31 gwr * not set up the keyboard as ttya, etc.
251 1.1 glass */
252 1.1 glass static void
253 1.50 gwr zs_attach(parent, self, aux)
254 1.31 gwr struct device *parent;
255 1.31 gwr struct device *self;
256 1.31 gwr void *aux;
257 1.31 gwr {
258 1.31 gwr struct zsc_softc *zsc = (void *) self;
259 1.31 gwr struct confargs *ca = aux;
260 1.31 gwr struct zsc_attach_args zsc_args;
261 1.31 gwr volatile struct zschan *zc;
262 1.31 gwr struct zs_chanstate *cs;
263 1.50 gwr int s, zs_unit, channel;
264 1.50 gwr static int didintr;
265 1.2 glass
266 1.50 gwr zs_unit = zsc->zsc_dev.dv_unit;
267 1.13 gwr
268 1.43 gwr printf(": (softpri %d)\n", ZSSOFT_PRI);
269 1.1 glass
270 1.31 gwr /* Use the mapping setup by the Sun PROM. */
271 1.50 gwr if (zsaddr[zs_unit] == NULL)
272 1.50 gwr panic("zs_attach: zs%d not mapped\n", zs_unit);
273 1.31 gwr
274 1.31 gwr /*
275 1.31 gwr * Initialize software state for each channel.
276 1.31 gwr */
277 1.31 gwr for (channel = 0; channel < 2; channel++) {
278 1.43 gwr zsc_args.channel = channel;
279 1.50 gwr zsc_args.hwflags = zs_hwflags[zs_unit][channel];
280 1.43 gwr cs = &zsc->zsc_cs_store[channel];
281 1.43 gwr zsc->zsc_cs[channel] = cs;
282 1.1 glass
283 1.31 gwr cs->cs_channel = channel;
284 1.31 gwr cs->cs_private = NULL;
285 1.31 gwr cs->cs_ops = &zsops_null;
286 1.37 gwr cs->cs_brg_clk = PCLK / 16;
287 1.31 gwr
288 1.50 gwr zc = zs_get_chan_addr(zs_unit, channel);
289 1.43 gwr cs->cs_reg_csr = &zc->zc_csr;
290 1.43 gwr cs->cs_reg_data = &zc->zc_data;
291 1.2 glass
292 1.31 gwr bcopy(zs_init_reg, cs->cs_creg, 16);
293 1.31 gwr bcopy(zs_init_reg, cs->cs_preg, 16);
294 1.15 gwr
295 1.43 gwr /* XXX: Get these from the EEPROM instead? */
296 1.43 gwr /* XXX: See the mvme167 code. Better. */
297 1.43 gwr if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
298 1.43 gwr cs->cs_defspeed = zs_get_speed(cs);
299 1.43 gwr else
300 1.50 gwr cs->cs_defspeed = zs_defspeed[zs_unit][channel];
301 1.43 gwr cs->cs_defcflag = zs_def_cflag;
302 1.43 gwr
303 1.47 gwr /* Make these correspond to cs_defcflag (-crtscts) */
304 1.46 gwr cs->cs_rr0_dcd = ZSRR0_DCD;
305 1.47 gwr cs->cs_rr0_cts = 0;
306 1.47 gwr cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
307 1.47 gwr cs->cs_wr5_rts = 0;
308 1.46 gwr
309 1.1 glass /*
310 1.31 gwr * Clear the master interrupt enable.
311 1.31 gwr * The INTENA is common to both channels,
312 1.31 gwr * so just do it on the A channel.
313 1.1 glass */
314 1.31 gwr if (channel == 0) {
315 1.32 gwr zs_write_reg(cs, 9, 0);
316 1.31 gwr }
317 1.15 gwr
318 1.1 glass /*
319 1.31 gwr * Look for a child driver for this channel.
320 1.31 gwr * The child attach will setup the hardware.
321 1.1 glass */
322 1.50 gwr if (!config_found(self, (void *)&zsc_args, zs_print)) {
323 1.31 gwr /* No sub-driver. Just reset it. */
324 1.43 gwr u_char reset = (channel == 0) ?
325 1.31 gwr ZSWR9_A_RESET : ZSWR9_B_RESET;
326 1.45 gwr s = splhigh();
327 1.32 gwr zs_write_reg(cs, 9, reset);
328 1.31 gwr splx(s);
329 1.31 gwr }
330 1.1 glass }
331 1.1 glass
332 1.43 gwr /*
333 1.43 gwr * Now safe to install interrupt handlers. Note the arguments
334 1.43 gwr * to the interrupt handlers aren't used. Note, we only do this
335 1.43 gwr * once since both SCCs interrupt at the same level and vector.
336 1.43 gwr */
337 1.50 gwr if (!didintr) {
338 1.50 gwr didintr = 1;
339 1.31 gwr isr_add_autovect(zssoft, NULL, ZSSOFT_PRI);
340 1.43 gwr isr_add_autovect(zshard, NULL, ca->ca_intpri);
341 1.31 gwr }
342 1.50 gwr /* XXX; evcnt_attach() ? */
343 1.24 gwr
344 1.31 gwr /*
345 1.31 gwr * Set the master interrupt enable and interrupt vector.
346 1.31 gwr * (common to both channels, do it on A)
347 1.31 gwr */
348 1.43 gwr cs = zsc->zsc_cs[0];
349 1.45 gwr s = splhigh();
350 1.31 gwr /* interrupt vector */
351 1.32 gwr zs_write_reg(cs, 2, zs_init_reg[2]);
352 1.31 gwr /* master interrupt control (enable) */
353 1.32 gwr zs_write_reg(cs, 9, zs_init_reg[9]);
354 1.31 gwr splx(s);
355 1.45 gwr
356 1.45 gwr /*
357 1.45 gwr * XXX: L1A hack - We would like to be able to break into
358 1.45 gwr * the debugger during the rest of autoconfiguration, so
359 1.45 gwr * lower interrupts just enough to let zs interrupts in.
360 1.50 gwr * This is done after both zs devices are attached.
361 1.45 gwr */
362 1.50 gwr if (zs_unit == 1) {
363 1.45 gwr printf("zsc1: enabling zs interrupts\n");
364 1.45 gwr (void)spl5(); /* splzs - 1 */
365 1.45 gwr }
366 1.35 gwr }
367 1.35 gwr
368 1.35 gwr static int
369 1.50 gwr zs_print(aux, name)
370 1.35 gwr void *aux;
371 1.39 cgd const char *name;
372 1.35 gwr {
373 1.35 gwr struct zsc_attach_args *args = aux;
374 1.35 gwr
375 1.35 gwr if (name != NULL)
376 1.41 christos printf("%s: ", name);
377 1.35 gwr
378 1.35 gwr if (args->channel != -1)
379 1.41 christos printf(" channel %d", args->channel);
380 1.35 gwr
381 1.35 gwr return UNCONF;
382 1.24 gwr }
383 1.24 gwr
384 1.48 gwr static volatile int zssoftpending;
385 1.43 gwr
386 1.43 gwr /*
387 1.43 gwr * Our ZS chips all share a common, autovectored interrupt,
388 1.43 gwr * so we have to look at all of them on each interrupt.
389 1.43 gwr */
390 1.31 gwr static int
391 1.31 gwr zshard(arg)
392 1.31 gwr void *arg;
393 1.1 glass {
394 1.43 gwr register struct zsc_softc *zsc;
395 1.48 gwr register int unit, rval, softreq;
396 1.43 gwr
397 1.48 gwr rval = softreq = 0;
398 1.48 gwr for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
399 1.34 thorpej zsc = zsc_cd.cd_devs[unit];
400 1.43 gwr if (zsc == NULL)
401 1.43 gwr continue;
402 1.43 gwr rval |= zsc_intr_hard(zsc);
403 1.48 gwr softreq |= zsc->zsc_cs[0]->cs_softreq;
404 1.48 gwr softreq |= zsc->zsc_cs[1]->cs_softreq;
405 1.48 gwr }
406 1.48 gwr
407 1.48 gwr /* We are at splzs here, so no need to lock. */
408 1.48 gwr if (softreq && (zssoftpending == 0)) {
409 1.48 gwr zssoftpending = ZSSOFT_PRI;
410 1.48 gwr isr_soft_request(ZSSOFT_PRI);
411 1.31 gwr }
412 1.31 gwr return (rval);
413 1.1 glass }
414 1.1 glass
415 1.43 gwr /*
416 1.43 gwr * Similar scheme as for zshard (look at all of them)
417 1.43 gwr */
418 1.3 gwr static int
419 1.31 gwr zssoft(arg)
420 1.31 gwr void *arg;
421 1.3 gwr {
422 1.43 gwr register struct zsc_softc *zsc;
423 1.48 gwr register int s, unit;
424 1.31 gwr
425 1.31 gwr /* This is not the only ISR on this IPL. */
426 1.31 gwr if (zssoftpending == 0)
427 1.31 gwr return (0);
428 1.3 gwr
429 1.31 gwr /*
430 1.31 gwr * The soft intr. bit will be set by zshard only if
431 1.31 gwr * the variable zssoftpending is zero. The order of
432 1.31 gwr * these next two statements prevents our clearing
433 1.31 gwr * the soft intr bit just after zshard has set it.
434 1.31 gwr */
435 1.31 gwr isr_soft_clear(ZSSOFT_PRI);
436 1.31 gwr zssoftpending = 0;
437 1.2 glass
438 1.48 gwr /* Make sure we call the tty layer at spltty. */
439 1.48 gwr s = spltty();
440 1.48 gwr for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
441 1.34 thorpej zsc = zsc_cd.cd_devs[unit];
442 1.43 gwr if (zsc == NULL)
443 1.43 gwr continue;
444 1.43 gwr (void) zsc_intr_soft(zsc);
445 1.3 gwr }
446 1.48 gwr splx(s);
447 1.31 gwr return (1);
448 1.2 glass }
449 1.2 glass
450 1.2 glass
451 1.31 gwr /*
452 1.50 gwr * Compute the current baud rate given a ZS channel.
453 1.43 gwr */
454 1.43 gwr static int
455 1.43 gwr zs_get_speed(cs)
456 1.43 gwr struct zs_chanstate *cs;
457 1.43 gwr {
458 1.43 gwr int tconst;
459 1.43 gwr
460 1.43 gwr tconst = zs_read_reg(cs, 12);
461 1.43 gwr tconst |= zs_read_reg(cs, 13) << 8;
462 1.43 gwr return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
463 1.43 gwr }
464 1.43 gwr
465 1.43 gwr /*
466 1.43 gwr * MD functions for setting the baud rate and control modes.
467 1.43 gwr */
468 1.43 gwr int
469 1.43 gwr zs_set_speed(cs, bps)
470 1.43 gwr struct zs_chanstate *cs;
471 1.43 gwr int bps; /* bits per second */
472 1.43 gwr {
473 1.43 gwr int tconst, real_bps;
474 1.43 gwr
475 1.43 gwr if (bps == 0)
476 1.43 gwr return (0);
477 1.43 gwr
478 1.43 gwr #ifdef DIAGNOSTIC
479 1.43 gwr if (cs->cs_brg_clk == 0)
480 1.43 gwr panic("zs_set_speed");
481 1.43 gwr #endif
482 1.43 gwr
483 1.43 gwr tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
484 1.43 gwr if (tconst < 0)
485 1.43 gwr return (EINVAL);
486 1.43 gwr
487 1.43 gwr /* Convert back to make sure we can do it. */
488 1.43 gwr real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
489 1.43 gwr
490 1.43 gwr /* XXX - Allow some tolerance here? */
491 1.43 gwr if (real_bps != bps)
492 1.43 gwr return (EINVAL);
493 1.43 gwr
494 1.43 gwr cs->cs_preg[12] = tconst;
495 1.43 gwr cs->cs_preg[13] = tconst >> 8;
496 1.43 gwr
497 1.43 gwr /* Caller will stuff the pending registers. */
498 1.43 gwr return (0);
499 1.43 gwr }
500 1.43 gwr
501 1.43 gwr int
502 1.43 gwr zs_set_modes(cs, cflag)
503 1.43 gwr struct zs_chanstate *cs;
504 1.43 gwr int cflag; /* bits per second */
505 1.43 gwr {
506 1.43 gwr int s;
507 1.43 gwr
508 1.43 gwr /*
509 1.43 gwr * Output hardware flow control on the chip is horrendous:
510 1.43 gwr * if carrier detect drops, the receiver is disabled, and if
511 1.43 gwr * CTS drops, the transmitter is stoped IN MID CHARACTER!
512 1.43 gwr * Therefore, NEVER set the HFC bit, and instead use the
513 1.43 gwr * status interrupt to detect CTS changes.
514 1.43 gwr */
515 1.43 gwr s = splzs();
516 1.51 mycroft if ((cflag & (CLOCAL | MDMBUF)) != 0)
517 1.43 gwr cs->cs_rr0_dcd = 0;
518 1.51 mycroft else
519 1.43 gwr cs->cs_rr0_dcd = ZSRR0_DCD;
520 1.51 mycroft if ((cflag & CRTSCTS) != 0) {
521 1.43 gwr cs->cs_wr5_dtr = ZSWR5_DTR;
522 1.43 gwr cs->cs_wr5_rts = ZSWR5_RTS;
523 1.43 gwr cs->cs_rr0_cts = ZSRR0_CTS;
524 1.51 mycroft } else if ((cflag & MDMBUF) != 0) {
525 1.51 mycroft cs->cs_wr5_dtr = 0;
526 1.51 mycroft cs->cs_wr5_rts = ZSWR5_DTR;
527 1.51 mycroft cs->cs_rr0_cts = ZSRR0_DCD;
528 1.43 gwr } else {
529 1.43 gwr cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
530 1.43 gwr cs->cs_wr5_rts = 0;
531 1.43 gwr cs->cs_rr0_cts = 0;
532 1.43 gwr }
533 1.43 gwr splx(s);
534 1.43 gwr
535 1.43 gwr /* Caller will stuff the pending registers. */
536 1.43 gwr return (0);
537 1.43 gwr }
538 1.43 gwr
539 1.43 gwr
540 1.43 gwr /*
541 1.31 gwr * Read or write the chip with suitable delays.
542 1.31 gwr */
543 1.2 glass
544 1.31 gwr u_char
545 1.31 gwr zs_read_reg(cs, reg)
546 1.31 gwr struct zs_chanstate *cs;
547 1.31 gwr u_char reg;
548 1.1 glass {
549 1.31 gwr u_char val;
550 1.1 glass
551 1.31 gwr *cs->cs_reg_csr = reg;
552 1.31 gwr ZS_DELAY();
553 1.31 gwr val = *cs->cs_reg_csr;
554 1.31 gwr ZS_DELAY();
555 1.31 gwr return val;
556 1.17 gwr }
557 1.3 gwr
558 1.31 gwr void
559 1.31 gwr zs_write_reg(cs, reg, val)
560 1.31 gwr struct zs_chanstate *cs;
561 1.31 gwr u_char reg, val;
562 1.17 gwr {
563 1.31 gwr *cs->cs_reg_csr = reg;
564 1.31 gwr ZS_DELAY();
565 1.31 gwr *cs->cs_reg_csr = val;
566 1.32 gwr ZS_DELAY();
567 1.32 gwr }
568 1.32 gwr
569 1.32 gwr u_char zs_read_csr(cs)
570 1.32 gwr struct zs_chanstate *cs;
571 1.32 gwr {
572 1.43 gwr register u_char val;
573 1.32 gwr
574 1.43 gwr val = *cs->cs_reg_csr;
575 1.32 gwr ZS_DELAY();
576 1.43 gwr return val;
577 1.32 gwr }
578 1.32 gwr
579 1.43 gwr void zs_write_csr(cs, val)
580 1.32 gwr struct zs_chanstate *cs;
581 1.43 gwr u_char val;
582 1.32 gwr {
583 1.43 gwr *cs->cs_reg_csr = val;
584 1.32 gwr ZS_DELAY();
585 1.32 gwr }
586 1.32 gwr
587 1.43 gwr u_char zs_read_data(cs)
588 1.32 gwr struct zs_chanstate *cs;
589 1.32 gwr {
590 1.43 gwr register u_char val;
591 1.43 gwr
592 1.43 gwr val = *cs->cs_reg_data;
593 1.32 gwr ZS_DELAY();
594 1.43 gwr return val;
595 1.32 gwr }
596 1.32 gwr
597 1.32 gwr void zs_write_data(cs, val)
598 1.32 gwr struct zs_chanstate *cs;
599 1.32 gwr u_char val;
600 1.32 gwr {
601 1.32 gwr *cs->cs_reg_data = val;
602 1.31 gwr ZS_DELAY();
603 1.1 glass }
604 1.3 gwr
605 1.31 gwr /****************************************************************
606 1.31 gwr * Console support functions (Sun3 specific!)
607 1.43 gwr * Note: this code is allowed to know about the layout of
608 1.43 gwr * the chip registers, and uses that to keep things simple.
609 1.43 gwr * XXX - I think I like the mvme167 code better. -gwr
610 1.31 gwr ****************************************************************/
611 1.1 glass
612 1.43 gwr void *zs_conschan;
613 1.43 gwr
614 1.2 glass /*
615 1.47 gwr * Handle user request to enter kernel debugger.
616 1.47 gwr */
617 1.47 gwr void
618 1.47 gwr zs_abort(cs)
619 1.47 gwr struct zs_chanstate *cs;
620 1.47 gwr {
621 1.47 gwr register volatile struct zschan *zc = zs_conschan;
622 1.47 gwr int rr0;
623 1.47 gwr
624 1.47 gwr /* Wait for end of break to avoid PROM abort. */
625 1.47 gwr /* XXX - Limit the wait? */
626 1.47 gwr do {
627 1.47 gwr rr0 = zc->zc_csr;
628 1.47 gwr ZS_DELAY();
629 1.47 gwr } while (rr0 & ZSRR0_BREAK);
630 1.47 gwr
631 1.50 gwr /* This is always available on the Sun3. */
632 1.47 gwr Debugger();
633 1.47 gwr }
634 1.47 gwr
635 1.47 gwr /*
636 1.31 gwr * Polled input char.
637 1.2 glass */
638 1.2 glass int
639 1.31 gwr zs_getc(arg)
640 1.31 gwr void *arg;
641 1.2 glass {
642 1.31 gwr register volatile struct zschan *zc = arg;
643 1.25 gwr register int s, c, rr0;
644 1.2 glass
645 1.2 glass s = splhigh();
646 1.9 gwr /* Wait for a character to arrive. */
647 1.25 gwr do {
648 1.25 gwr rr0 = zc->zc_csr;
649 1.3 gwr ZS_DELAY();
650 1.25 gwr } while ((rr0 & ZSRR0_RX_READY) == 0);
651 1.9 gwr
652 1.2 glass c = zc->zc_data;
653 1.9 gwr ZS_DELAY();
654 1.2 glass splx(s);
655 1.17 gwr
656 1.17 gwr /*
657 1.17 gwr * This is used by the kd driver to read scan codes,
658 1.17 gwr * so don't translate '\r' ==> '\n' here...
659 1.17 gwr */
660 1.2 glass return (c);
661 1.2 glass }
662 1.1 glass
663 1.1 glass /*
664 1.31 gwr * Polled output char.
665 1.1 glass */
666 1.31 gwr void
667 1.31 gwr zs_putc(arg, c)
668 1.31 gwr void *arg;
669 1.1 glass int c;
670 1.1 glass {
671 1.31 gwr register volatile struct zschan *zc = arg;
672 1.25 gwr register int s, rr0;
673 1.1 glass
674 1.9 gwr s = splhigh();
675 1.9 gwr /* Wait for transmitter to become ready. */
676 1.25 gwr do {
677 1.25 gwr rr0 = zc->zc_csr;
678 1.3 gwr ZS_DELAY();
679 1.25 gwr } while ((rr0 & ZSRR0_TX_READY) == 0);
680 1.9 gwr
681 1.1 glass zc->zc_data = c;
682 1.3 gwr ZS_DELAY();
683 1.1 glass splx(s);
684 1.1 glass }
685 1.2 glass
686 1.50 gwr /*****************************************************************/
687 1.50 gwr
688 1.50 gwr static void zscninit __P((struct consdev *));
689 1.50 gwr static int zscngetc __P((dev_t));
690 1.50 gwr static void zscnputc __P((dev_t, int));
691 1.50 gwr
692 1.50 gwr /*
693 1.50 gwr * Console table shared by ttya, ttyb
694 1.50 gwr */
695 1.50 gwr struct consdev consdev_tty = {
696 1.50 gwr nullcnprobe,
697 1.50 gwr zscninit,
698 1.50 gwr zscngetc,
699 1.50 gwr zscnputc,
700 1.50 gwr nullcnpollc,
701 1.50 gwr };
702 1.50 gwr
703 1.50 gwr static void
704 1.50 gwr zscninit(cn)
705 1.50 gwr struct consdev *cn;
706 1.50 gwr {
707 1.50 gwr }
708 1.50 gwr
709 1.50 gwr /*
710 1.50 gwr * Polled console input putchar.
711 1.50 gwr */
712 1.50 gwr static int
713 1.50 gwr zscngetc(dev)
714 1.50 gwr dev_t dev;
715 1.50 gwr {
716 1.50 gwr return (zs_getc(zs_conschan));
717 1.50 gwr }
718 1.50 gwr
719 1.50 gwr /*
720 1.50 gwr * Polled console output putchar.
721 1.50 gwr */
722 1.50 gwr static void
723 1.50 gwr zscnputc(dev, c)
724 1.50 gwr dev_t dev;
725 1.50 gwr int c;
726 1.50 gwr {
727 1.50 gwr zs_putc(zs_conschan, c);
728 1.50 gwr }
729 1.50 gwr
730 1.50 gwr /*****************************************************************/
731 1.50 gwr
732 1.50 gwr static void prom_cninit __P((struct consdev *));
733 1.50 gwr static int prom_cngetc __P((dev_t));
734 1.50 gwr static void prom_cnputc __P((dev_t, int));
735 1.50 gwr
736 1.50 gwr /*
737 1.50 gwr * The console is set to this one initially,
738 1.50 gwr * which lets us use the PROM until consinit()
739 1.50 gwr * is called to select a real console.
740 1.50 gwr */
741 1.50 gwr struct consdev consdev_prom = {
742 1.50 gwr nullcnprobe,
743 1.50 gwr prom_cninit,
744 1.50 gwr prom_cngetc,
745 1.50 gwr prom_cnputc,
746 1.50 gwr nullcnpollc,
747 1.50 gwr };
748 1.50 gwr
749 1.50 gwr /*
750 1.50 gwr * The console table pointer is statically initialized
751 1.50 gwr * to point to the PROM (output only) table, so that
752 1.50 gwr * early calls to printf will work.
753 1.50 gwr */
754 1.50 gwr struct consdev *cn_tab = &consdev_prom;
755 1.50 gwr
756 1.50 gwr void
757 1.50 gwr nullcnprobe(cn)
758 1.50 gwr struct consdev *cn;
759 1.50 gwr {
760 1.50 gwr }
761 1.50 gwr
762 1.50 gwr static void
763 1.50 gwr prom_cninit(cn)
764 1.50 gwr struct consdev *cn;
765 1.50 gwr {
766 1.50 gwr }
767 1.50 gwr
768 1.50 gwr /*
769 1.50 gwr * PROM console input putchar.
770 1.50 gwr * (dummy - this is output only)
771 1.50 gwr */
772 1.50 gwr static int
773 1.50 gwr prom_cngetc(dev)
774 1.50 gwr dev_t dev;
775 1.50 gwr {
776 1.50 gwr return (0);
777 1.50 gwr }
778 1.50 gwr
779 1.50 gwr /*
780 1.50 gwr * PROM console output putchar.
781 1.50 gwr */
782 1.50 gwr static void
783 1.50 gwr prom_cnputc(dev, c)
784 1.50 gwr dev_t dev;
785 1.50 gwr int c;
786 1.50 gwr {
787 1.50 gwr (*romVectorPtr->putChar)(c & 0x7f);
788 1.50 gwr }
789 1.50 gwr
790 1.50 gwr /*****************************************************************/
791 1.50 gwr
792 1.50 gwr extern struct consdev consdev_kd;
793 1.31 gwr
794 1.43 gwr static struct {
795 1.50 gwr int zs_unit, channel;
796 1.50 gwr } zstty_conf[NZS*2] = {
797 1.43 gwr /* XXX: knowledge from the config file here... */
798 1.43 gwr { 1, 0 }, /* ttya */
799 1.43 gwr { 1, 1 }, /* ttyb */
800 1.43 gwr { 0, 0 }, /* ttyc */
801 1.43 gwr { 0, 1 }, /* ttyd */
802 1.43 gwr };
803 1.31 gwr
804 1.47 gwr static char *prom_inSrc_name[] = {
805 1.47 gwr "keyboard/display",
806 1.47 gwr "ttya", "ttyb",
807 1.47 gwr "ttyc", "ttyd" };
808 1.47 gwr
809 1.1 glass /*
810 1.31 gwr * This function replaces sys/dev/cninit.c
811 1.31 gwr * Determine which device is the console using
812 1.38 gwr * the PROM "input source" and "output sink".
813 1.1 glass */
814 1.31 gwr void
815 1.31 gwr cninit()
816 1.1 glass {
817 1.38 gwr MachMonRomVector *v;
818 1.31 gwr struct zschan *zc;
819 1.31 gwr struct consdev *cn;
820 1.50 gwr int channel, zs_unit, zstty_unit;
821 1.50 gwr u_char inSource, outSink;
822 1.31 gwr
823 1.38 gwr v = romVectorPtr;
824 1.50 gwr inSource = *v->inSource;
825 1.50 gwr outSink = *v->outSink;
826 1.50 gwr if (inSource != outSink) {
827 1.38 gwr mon_printf("cninit: mismatched PROM output selector\n");
828 1.38 gwr }
829 1.38 gwr
830 1.38 gwr switch (inSource) {
831 1.47 gwr default:
832 1.47 gwr mon_printf("cninit: invalid inSource=%d\n", inSource);
833 1.47 gwr sunmon_abort();
834 1.47 gwr inSource = 0;
835 1.47 gwr /* fall through */
836 1.47 gwr
837 1.47 gwr case 0: /* keyboard/display */
838 1.47 gwr #if NKBD > 0
839 1.50 gwr zs_unit = 0;
840 1.47 gwr channel = 0;
841 1.47 gwr cn = &consdev_kd;
842 1.47 gwr /* Set cn_dev, cn_pri in kd.c */
843 1.47 gwr break;
844 1.47 gwr #else /* NKBD */
845 1.47 gwr mon_printf("cninit: kdb/display not configured\n");
846 1.47 gwr sunmon_abort();
847 1.47 gwr inSource = 1;
848 1.47 gwr /* fall through */
849 1.47 gwr #endif /* NKBD */
850 1.47 gwr
851 1.38 gwr case 1: /* ttya */
852 1.38 gwr case 2: /* ttyb */
853 1.38 gwr case 3: /* ttyc (rewired keyboard connector) */
854 1.38 gwr case 4: /* ttyd (rewired mouse connector) */
855 1.43 gwr zstty_unit = inSource - 1;
856 1.50 gwr zs_unit = zstty_conf[zstty_unit].zs_unit;
857 1.50 gwr channel = zstty_conf[zstty_unit].channel;
858 1.38 gwr cn = &consdev_tty;
859 1.43 gwr cn->cn_dev = makedev(zs_major, zstty_unit);
860 1.38 gwr cn->cn_pri = CN_REMOTE;
861 1.38 gwr break;
862 1.38 gwr
863 1.1 glass }
864 1.47 gwr /* Now that inSource has been validated, print it. */
865 1.47 gwr mon_printf("console is %s\n", prom_inSrc_name[inSource]);
866 1.1 glass
867 1.50 gwr zc = zs_get_chan_addr(zs_unit, channel);
868 1.31 gwr if (zc == NULL) {
869 1.31 gwr mon_printf("cninit: zs not mapped.\n");
870 1.31 gwr return;
871 1.31 gwr }
872 1.31 gwr zs_conschan = zc;
873 1.50 gwr zs_hwflags[zs_unit][channel] = ZS_HWFLAG_CONSOLE;
874 1.31 gwr cn_tab = cn;
875 1.31 gwr (*cn->cn_init)(cn);
876 1.47 gwr #ifdef KGDB
877 1.47 gwr zs_kgdb_init();
878 1.47 gwr #endif
879 1.1 glass }
880