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zs.c revision 1.55
      1  1.55   mycroft /*	$NetBSD: zs.c,v 1.55 1999/02/03 20:25:07 mycroft Exp $	*/
      2  1.10       cgd 
      3  1.42       gwr /*-
      4  1.42       gwr  * Copyright (c) 1996 The NetBSD Foundation, Inc.
      5  1.31       gwr  * All rights reserved.
      6   1.1     glass  *
      7  1.42       gwr  * This code is derived from software contributed to The NetBSD Foundation
      8  1.42       gwr  * by Gordon W. Ross.
      9  1.42       gwr  *
     10   1.1     glass  * Redistribution and use in source and binary forms, with or without
     11   1.1     glass  * modification, are permitted provided that the following conditions
     12   1.1     glass  * are met:
     13   1.1     glass  * 1. Redistributions of source code must retain the above copyright
     14   1.1     glass  *    notice, this list of conditions and the following disclaimer.
     15   1.1     glass  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1     glass  *    notice, this list of conditions and the following disclaimer in the
     17   1.1     glass  *    documentation and/or other materials provided with the distribution.
     18  1.42       gwr  * 3. All advertising materials mentioning features or use of this software
     19   1.1     glass  *    must display the following acknowledgement:
     20  1.42       gwr  *        This product includes software developed by the NetBSD
     21  1.42       gwr  *        Foundation, Inc. and its contributors.
     22  1.42       gwr  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.42       gwr  *    contributors may be used to endorse or promote products derived
     24  1.42       gwr  *    from this software without specific prior written permission.
     25   1.1     glass  *
     26  1.42       gwr  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.42       gwr  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.42       gwr  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.44       gwr  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.44       gwr  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.42       gwr  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.42       gwr  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.42       gwr  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.42       gwr  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.42       gwr  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.42       gwr  * POSSIBILITY OF SUCH DAMAGE.
     37   1.1     glass  */
     38   1.1     glass 
     39   1.1     glass /*
     40  1.31       gwr  * Zilog Z8530 Dual UART driver (machine-dependent part)
     41   1.1     glass  *
     42  1.31       gwr  * Runs two serial lines per chip using slave drivers.
     43  1.31       gwr  * Plain tty/async lines use the zs_async slave.
     44  1.31       gwr  * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
     45   1.1     glass  */
     46   1.1     glass 
     47   1.5       gwr #include <sys/param.h>
     48   1.1     glass #include <sys/systm.h>
     49  1.43       gwr #include <sys/conf.h>
     50   1.1     glass #include <sys/device.h>
     51   1.1     glass #include <sys/file.h>
     52   1.1     glass #include <sys/ioctl.h>
     53  1.43       gwr #include <sys/kernel.h>
     54  1.43       gwr #include <sys/proc.h>
     55   1.1     glass #include <sys/tty.h>
     56   1.1     glass #include <sys/time.h>
     57   1.1     glass #include <sys/syslog.h>
     58   1.1     glass 
     59   1.1     glass #include <machine/autoconf.h>
     60   1.1     glass #include <machine/cpu.h>
     61   1.3       gwr #include <machine/mon.h>
     62  1.49       gwr #include <machine/z8530var.h>
     63  1.49       gwr 
     64  1.53       gwr #include <sun3/sun3/machdep.h>
     65  1.53       gwr #ifdef	_SUN3X_
     66  1.53       gwr #include <sun3/sun3x/obio.h>
     67  1.53       gwr #else
     68  1.53       gwr #include <sun3/sun3/obio.h>
     69  1.53       gwr #endif
     70  1.53       gwr #include <sun3/dev/zs_cons.h>
     71  1.53       gwr 
     72  1.49       gwr #include <dev/cons.h>
     73  1.49       gwr #include <dev/ic/z8530reg.h>
     74   1.1     glass 
     75  1.50       gwr #include "kbd.h"	/* NKBD */
     76  1.50       gwr #include "zsc.h"	/* NZSC */
     77  1.50       gwr #define NZS NZSC
     78  1.50       gwr 
     79  1.50       gwr /* Make life easier for the initialized arrays here. */
     80  1.50       gwr #if NZS < 2
     81  1.50       gwr #undef  NZS
     82  1.50       gwr #define NZS 2
     83  1.50       gwr #endif
     84  1.47       gwr 
     85  1.47       gwr extern void Debugger __P((void));
     86  1.43       gwr 
     87  1.16       gwr /*
     88  1.43       gwr  * Some warts needed by z8530tty.c -
     89  1.43       gwr  * The default parity REALLY needs to be the same as the PROM uses,
     90  1.43       gwr  * or you can not see messages done with printf during boot-up...
     91  1.43       gwr  */
     92  1.43       gwr int zs_def_cflag = (CREAD | CS8 | HUPCL);
     93  1.43       gwr int zs_major = 12;
     94   1.1     glass 
     95  1.43       gwr /*
     96  1.43       gwr  * The Sun3 provides a 4.9152 MHz clock to the ZS chips.
     97  1.43       gwr  */
     98   1.2     glass #define PCLK	(9600 * 512)	/* PCLK pin input clock rate */
     99   1.2     glass 
    100   1.2     glass /*
    101  1.22       gwr  * Define interrupt levels.
    102   1.2     glass  */
    103   1.2     glass #define ZSHARD_PRI	6	/* Wired on the CPU board... */
    104  1.22       gwr #define ZSSOFT_PRI	3	/* Want tty pri (4) but this is OK. */
    105   1.1     glass 
    106  1.33       gwr #define ZS_DELAY()			delay(2)
    107  1.31       gwr 
    108  1.31       gwr /* The layout of this is hardware-dependent (padding, order). */
    109  1.31       gwr struct zschan {
    110  1.31       gwr 	volatile u_char	zc_csr;		/* ctrl,status, and indirect access */
    111  1.31       gwr 	u_char		zc_xxx0;
    112  1.31       gwr 	volatile u_char	zc_data;	/* data */
    113  1.31       gwr 	u_char		zc_xxx1;
    114  1.31       gwr };
    115  1.31       gwr struct zsdevice {
    116  1.31       gwr 	/* Yes, they are backwards. */
    117  1.31       gwr 	struct	zschan zs_chan_b;
    118  1.31       gwr 	struct	zschan zs_chan_a;
    119   1.1     glass };
    120   1.1     glass 
    121   1.1     glass 
    122  1.31       gwr /* Default OBIO addresses. */
    123  1.50       gwr static int zs_physaddr[NZS] = {
    124  1.44       gwr 	OBIO_ZS_KBD_MS,
    125  1.44       gwr 	OBIO_ZS_TTY_AB };
    126  1.43       gwr 
    127  1.31       gwr /* Saved PROM mappings */
    128  1.50       gwr static struct zsdevice *zsaddr[NZS];
    129  1.43       gwr 
    130  1.31       gwr /* Flags from cninit() */
    131  1.50       gwr static int zs_hwflags[NZS][2];
    132  1.43       gwr 
    133  1.31       gwr /* Default speed for each channel */
    134  1.50       gwr static int zs_defspeed[NZS][2] = {
    135  1.31       gwr 	{ 1200, 	/* keyboard */
    136  1.31       gwr 	  1200 },	/* mouse */
    137  1.31       gwr 	{ 9600, 	/* ttya */
    138  1.31       gwr 	  9600 },	/* ttyb */
    139  1.31       gwr };
    140  1.13       gwr 
    141  1.43       gwr static u_char zs_init_reg[16] = {
    142  1.43       gwr 	0,	/* 0: CMD (reset, etc.) */
    143  1.43       gwr 	0,	/* 1: No interrupts yet. */
    144  1.43       gwr 	0x18 + ZSHARD_PRI,	/* IVECT */
    145  1.43       gwr 	ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
    146  1.43       gwr 	ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
    147  1.43       gwr 	ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
    148  1.43       gwr 	0,	/* 6: TXSYNC/SYNCLO */
    149  1.43       gwr 	0,	/* 7: RXSYNC/SYNCHI */
    150  1.43       gwr 	0,	/* 8: alias for data port */
    151  1.43       gwr 	ZSWR9_MASTER_IE,
    152  1.43       gwr 	0,	/*10: Misc. TX/RX control bits */
    153  1.43       gwr 	ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
    154  1.43       gwr 	14,	/*12: BAUDLO (default=9600) */
    155  1.43       gwr 	0,	/*13: BAUDHI (default=9600) */
    156  1.43       gwr 	ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
    157  1.55   mycroft 	ZSWR15_BREAK_IE,
    158  1.43       gwr };
    159  1.43       gwr 
    160   1.1     glass 
    161  1.31       gwr /* Find PROM mappings (for console support). */
    162  1.43       gwr void
    163  1.43       gwr zs_init()
    164  1.31       gwr {
    165  1.31       gwr 	int i;
    166   1.1     glass 
    167  1.50       gwr 	for (i = 0; i < NZS; i++) {
    168  1.31       gwr 		zsaddr[i] = (struct zsdevice *)
    169  1.44       gwr 			obio_find_mapping(zs_physaddr[i], sizeof(struct zschan));
    170  1.31       gwr 	}
    171  1.43       gwr }
    172  1.13       gwr 
    173  1.47       gwr struct zschan *
    174  1.50       gwr zs_get_chan_addr(zs_unit, channel)
    175  1.50       gwr 	int zs_unit, channel;
    176  1.31       gwr {
    177  1.31       gwr 	struct zsdevice *addr;
    178  1.31       gwr 	struct zschan *zc;
    179  1.31       gwr 
    180  1.50       gwr 	if (zs_unit >= NZS)
    181  1.31       gwr 		return NULL;
    182  1.50       gwr 	addr = zsaddr[zs_unit];
    183  1.31       gwr 	if (addr == NULL)
    184  1.31       gwr 		return NULL;
    185  1.31       gwr 	if (channel == 0) {
    186  1.31       gwr 		zc = &addr->zs_chan_a;
    187  1.31       gwr 	} else {
    188  1.31       gwr 		zc = &addr->zs_chan_b;
    189  1.31       gwr 	}
    190  1.31       gwr 	return (zc);
    191  1.31       gwr }
    192  1.13       gwr 
    193  1.18       gwr 
    194  1.31       gwr /****************************************************************
    195  1.31       gwr  * Autoconfig
    196  1.31       gwr  ****************************************************************/
    197  1.31       gwr 
    198  1.31       gwr /* Definition of the driver for autoconfig. */
    199  1.50       gwr static int	zs_match __P((struct device *, struct cfdata *, void *));
    200  1.50       gwr static void	zs_attach __P((struct device *, struct device *, void *));
    201  1.50       gwr static int  zs_print __P((void *, const char *name));
    202  1.31       gwr 
    203  1.34   thorpej struct cfattach zsc_ca = {
    204  1.50       gwr 	sizeof(struct zsc_softc), zs_match, zs_attach
    205  1.34   thorpej };
    206  1.34   thorpej 
    207  1.52   thorpej extern struct cfdriver zsc_cd;
    208  1.31       gwr 
    209  1.43       gwr static int zshard __P((void *));
    210  1.43       gwr static int zssoft __P((void *));
    211  1.43       gwr static int zs_get_speed __P((struct zs_chanstate *));
    212  1.31       gwr 
    213   1.9       gwr 
    214   1.1     glass /*
    215  1.31       gwr  * Is the zs chip present?
    216   1.1     glass  */
    217   1.1     glass static int
    218  1.50       gwr zs_match(parent, cf, aux)
    219  1.31       gwr 	struct device *parent;
    220  1.43       gwr 	struct cfdata *cf;
    221  1.43       gwr 	void *aux;
    222   1.1     glass {
    223  1.31       gwr 	struct confargs *ca = aux;
    224  1.50       gwr 	int unit = cf->cf_unit;
    225  1.35       gwr 	void *va;
    226  1.13       gwr 
    227  1.35       gwr 	/*
    228  1.43       gwr 	 * This driver only supports its wired-in mappings,
    229  1.43       gwr 	 * because the console support depends on those.
    230  1.35       gwr 	 */
    231  1.43       gwr 	if (ca->ca_paddr != zs_physaddr[unit])
    232  1.35       gwr 		return (0);
    233  1.35       gwr 
    234  1.31       gwr 	/* Make sure zs_init() found mappings. */
    235  1.35       gwr 	va = zsaddr[unit];
    236  1.35       gwr 	if (va == NULL)
    237  1.21       gwr 		return (0);
    238  1.21       gwr 
    239  1.21       gwr 	/* This returns -1 on a fault (bus error). */
    240  1.43       gwr 	if (peek_byte(va) == -1)
    241  1.43       gwr 		return (0);
    242  1.43       gwr 
    243  1.43       gwr 	/* Default interrupt priority (always splbio==2) */
    244  1.43       gwr 	if (ca->ca_intpri == -1)
    245  1.43       gwr 		ca->ca_intpri = ZSHARD_PRI;
    246  1.43       gwr 
    247  1.43       gwr 	return (1);
    248   1.1     glass }
    249   1.1     glass 
    250   1.1     glass /*
    251   1.1     glass  * Attach a found zs.
    252   1.1     glass  *
    253  1.31       gwr  * Match slave number to zs unit number, so that misconfiguration will
    254  1.31       gwr  * not set up the keyboard as ttya, etc.
    255   1.1     glass  */
    256   1.1     glass static void
    257  1.50       gwr zs_attach(parent, self, aux)
    258  1.31       gwr 	struct device *parent;
    259  1.31       gwr 	struct device *self;
    260  1.31       gwr 	void *aux;
    261  1.31       gwr {
    262  1.31       gwr 	struct zsc_softc *zsc = (void *) self;
    263  1.31       gwr 	struct confargs *ca = aux;
    264  1.31       gwr 	struct zsc_attach_args zsc_args;
    265  1.31       gwr 	volatile struct zschan *zc;
    266  1.31       gwr 	struct zs_chanstate *cs;
    267  1.50       gwr 	int s, zs_unit, channel;
    268  1.50       gwr 	static int didintr;
    269   1.2     glass 
    270  1.50       gwr 	zs_unit = zsc->zsc_dev.dv_unit;
    271  1.13       gwr 
    272  1.43       gwr 	printf(": (softpri %d)\n", ZSSOFT_PRI);
    273   1.1     glass 
    274  1.31       gwr 	/* Use the mapping setup by the Sun PROM. */
    275  1.50       gwr 	if (zsaddr[zs_unit] == NULL)
    276  1.50       gwr 		panic("zs_attach: zs%d not mapped\n", zs_unit);
    277  1.31       gwr 
    278  1.31       gwr 	/*
    279  1.31       gwr 	 * Initialize software state for each channel.
    280  1.31       gwr 	 */
    281  1.31       gwr 	for (channel = 0; channel < 2; channel++) {
    282  1.43       gwr 		zsc_args.channel = channel;
    283  1.50       gwr 		zsc_args.hwflags = zs_hwflags[zs_unit][channel];
    284  1.43       gwr 		cs = &zsc->zsc_cs_store[channel];
    285  1.43       gwr 		zsc->zsc_cs[channel] = cs;
    286   1.1     glass 
    287  1.31       gwr 		cs->cs_channel = channel;
    288  1.31       gwr 		cs->cs_private = NULL;
    289  1.31       gwr 		cs->cs_ops = &zsops_null;
    290  1.37       gwr 		cs->cs_brg_clk = PCLK / 16;
    291  1.31       gwr 
    292  1.50       gwr 		zc = zs_get_chan_addr(zs_unit, channel);
    293  1.43       gwr 		cs->cs_reg_csr  = &zc->zc_csr;
    294  1.43       gwr 		cs->cs_reg_data = &zc->zc_data;
    295   1.2     glass 
    296  1.31       gwr 		bcopy(zs_init_reg, cs->cs_creg, 16);
    297  1.31       gwr 		bcopy(zs_init_reg, cs->cs_preg, 16);
    298  1.15       gwr 
    299  1.43       gwr 		/* XXX: Get these from the EEPROM instead? */
    300  1.43       gwr 		/* XXX: See the mvme167 code.  Better. */
    301  1.43       gwr 		if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
    302  1.43       gwr 			cs->cs_defspeed = zs_get_speed(cs);
    303  1.43       gwr 		else
    304  1.50       gwr 			cs->cs_defspeed = zs_defspeed[zs_unit][channel];
    305  1.43       gwr 		cs->cs_defcflag = zs_def_cflag;
    306  1.43       gwr 
    307  1.47       gwr 		/* Make these correspond to cs_defcflag (-crtscts) */
    308  1.46       gwr 		cs->cs_rr0_dcd = ZSRR0_DCD;
    309  1.47       gwr 		cs->cs_rr0_cts = 0;
    310  1.47       gwr 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
    311  1.47       gwr 		cs->cs_wr5_rts = 0;
    312  1.46       gwr 
    313   1.1     glass 		/*
    314  1.31       gwr 		 * Clear the master interrupt enable.
    315  1.31       gwr 		 * The INTENA is common to both channels,
    316  1.31       gwr 		 * so just do it on the A channel.
    317   1.1     glass 		 */
    318  1.31       gwr 		if (channel == 0) {
    319  1.32       gwr 			zs_write_reg(cs, 9, 0);
    320  1.31       gwr 		}
    321  1.15       gwr 
    322   1.1     glass 		/*
    323  1.31       gwr 		 * Look for a child driver for this channel.
    324  1.31       gwr 		 * The child attach will setup the hardware.
    325   1.1     glass 		 */
    326  1.50       gwr 		if (!config_found(self, (void *)&zsc_args, zs_print)) {
    327  1.31       gwr 			/* No sub-driver.  Just reset it. */
    328  1.43       gwr 			u_char reset = (channel == 0) ?
    329  1.31       gwr 				ZSWR9_A_RESET : ZSWR9_B_RESET;
    330  1.45       gwr 			s = splhigh();
    331  1.32       gwr 			zs_write_reg(cs,  9, reset);
    332  1.31       gwr 			splx(s);
    333  1.31       gwr 		}
    334   1.1     glass 	}
    335   1.1     glass 
    336  1.43       gwr 	/*
    337  1.43       gwr 	 * Now safe to install interrupt handlers.  Note the arguments
    338  1.43       gwr 	 * to the interrupt handlers aren't used.  Note, we only do this
    339  1.43       gwr 	 * once since both SCCs interrupt at the same level and vector.
    340  1.43       gwr 	 */
    341  1.50       gwr 	if (!didintr) {
    342  1.50       gwr 		didintr = 1;
    343  1.31       gwr 		isr_add_autovect(zssoft, NULL, ZSSOFT_PRI);
    344  1.43       gwr 		isr_add_autovect(zshard, NULL, ca->ca_intpri);
    345  1.31       gwr 	}
    346  1.50       gwr 	/* XXX; evcnt_attach() ? */
    347  1.24       gwr 
    348  1.31       gwr 	/*
    349  1.31       gwr 	 * Set the master interrupt enable and interrupt vector.
    350  1.31       gwr 	 * (common to both channels, do it on A)
    351  1.31       gwr 	 */
    352  1.43       gwr 	cs = zsc->zsc_cs[0];
    353  1.45       gwr 	s = splhigh();
    354  1.31       gwr 	/* interrupt vector */
    355  1.32       gwr 	zs_write_reg(cs, 2, zs_init_reg[2]);
    356  1.31       gwr 	/* master interrupt control (enable) */
    357  1.32       gwr 	zs_write_reg(cs, 9, zs_init_reg[9]);
    358  1.31       gwr 	splx(s);
    359  1.45       gwr 
    360  1.45       gwr 	/*
    361  1.45       gwr 	 * XXX: L1A hack - We would like to be able to break into
    362  1.45       gwr 	 * the debugger during the rest of autoconfiguration, so
    363  1.45       gwr 	 * lower interrupts just enough to let zs interrupts in.
    364  1.50       gwr 	 * This is done after both zs devices are attached.
    365  1.45       gwr 	 */
    366  1.50       gwr 	if (zs_unit == 1) {
    367  1.45       gwr 		(void)spl5(); /* splzs - 1 */
    368  1.45       gwr 	}
    369  1.35       gwr }
    370  1.35       gwr 
    371  1.35       gwr static int
    372  1.50       gwr zs_print(aux, name)
    373  1.35       gwr 	void *aux;
    374  1.39       cgd 	const char *name;
    375  1.35       gwr {
    376  1.35       gwr 	struct zsc_attach_args *args = aux;
    377  1.35       gwr 
    378  1.35       gwr 	if (name != NULL)
    379  1.41  christos 		printf("%s: ", name);
    380  1.35       gwr 
    381  1.35       gwr 	if (args->channel != -1)
    382  1.41  christos 		printf(" channel %d", args->channel);
    383  1.35       gwr 
    384  1.35       gwr 	return UNCONF;
    385  1.24       gwr }
    386  1.24       gwr 
    387  1.48       gwr static volatile int zssoftpending;
    388  1.43       gwr 
    389  1.43       gwr /*
    390  1.43       gwr  * Our ZS chips all share a common, autovectored interrupt,
    391  1.43       gwr  * so we have to look at all of them on each interrupt.
    392  1.43       gwr  */
    393  1.31       gwr static int
    394  1.31       gwr zshard(arg)
    395  1.31       gwr 	void *arg;
    396   1.1     glass {
    397  1.43       gwr 	register struct zsc_softc *zsc;
    398  1.48       gwr 	register int unit, rval, softreq;
    399  1.43       gwr 
    400  1.48       gwr 	rval = softreq = 0;
    401  1.48       gwr 	for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
    402  1.34   thorpej 		zsc = zsc_cd.cd_devs[unit];
    403  1.43       gwr 		if (zsc == NULL)
    404  1.43       gwr 			continue;
    405  1.43       gwr 		rval |= zsc_intr_hard(zsc);
    406  1.48       gwr 		softreq |= zsc->zsc_cs[0]->cs_softreq;
    407  1.48       gwr 		softreq |= zsc->zsc_cs[1]->cs_softreq;
    408  1.48       gwr 	}
    409  1.48       gwr 
    410  1.48       gwr 	/* We are at splzs here, so no need to lock. */
    411  1.48       gwr 	if (softreq && (zssoftpending == 0)) {
    412  1.48       gwr 		zssoftpending = ZSSOFT_PRI;
    413  1.48       gwr 		isr_soft_request(ZSSOFT_PRI);
    414  1.31       gwr 	}
    415  1.31       gwr 	return (rval);
    416   1.1     glass }
    417   1.1     glass 
    418  1.43       gwr /*
    419  1.43       gwr  * Similar scheme as for zshard (look at all of them)
    420  1.43       gwr  */
    421   1.3       gwr static int
    422  1.31       gwr zssoft(arg)
    423  1.31       gwr 	void *arg;
    424   1.3       gwr {
    425  1.43       gwr 	register struct zsc_softc *zsc;
    426  1.48       gwr 	register int s, unit;
    427  1.31       gwr 
    428  1.31       gwr 	/* This is not the only ISR on this IPL. */
    429  1.31       gwr 	if (zssoftpending == 0)
    430  1.31       gwr 		return (0);
    431   1.3       gwr 
    432  1.31       gwr 	/*
    433  1.31       gwr 	 * The soft intr. bit will be set by zshard only if
    434  1.31       gwr 	 * the variable zssoftpending is zero.  The order of
    435  1.31       gwr 	 * these next two statements prevents our clearing
    436  1.31       gwr 	 * the soft intr bit just after zshard has set it.
    437  1.31       gwr 	 */
    438  1.31       gwr 	isr_soft_clear(ZSSOFT_PRI);
    439  1.31       gwr 	zssoftpending = 0;
    440   1.2     glass 
    441  1.48       gwr 	/* Make sure we call the tty layer at spltty. */
    442  1.48       gwr 	s = spltty();
    443  1.48       gwr 	for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
    444  1.34   thorpej 		zsc = zsc_cd.cd_devs[unit];
    445  1.43       gwr 		if (zsc == NULL)
    446  1.43       gwr 			continue;
    447  1.43       gwr 		(void) zsc_intr_soft(zsc);
    448   1.3       gwr 	}
    449  1.48       gwr 	splx(s);
    450  1.31       gwr 	return (1);
    451   1.2     glass }
    452   1.2     glass 
    453   1.2     glass 
    454  1.31       gwr /*
    455  1.50       gwr  * Compute the current baud rate given a ZS channel.
    456  1.43       gwr  */
    457  1.43       gwr static int
    458  1.43       gwr zs_get_speed(cs)
    459  1.43       gwr 	struct zs_chanstate *cs;
    460  1.43       gwr {
    461  1.43       gwr 	int tconst;
    462  1.43       gwr 
    463  1.43       gwr 	tconst = zs_read_reg(cs, 12);
    464  1.43       gwr 	tconst |= zs_read_reg(cs, 13) << 8;
    465  1.43       gwr 	return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
    466  1.43       gwr }
    467  1.43       gwr 
    468  1.43       gwr /*
    469  1.43       gwr  * MD functions for setting the baud rate and control modes.
    470  1.43       gwr  */
    471  1.43       gwr int
    472  1.43       gwr zs_set_speed(cs, bps)
    473  1.43       gwr 	struct zs_chanstate *cs;
    474  1.43       gwr 	int bps;	/* bits per second */
    475  1.43       gwr {
    476  1.43       gwr 	int tconst, real_bps;
    477  1.43       gwr 
    478  1.43       gwr 	if (bps == 0)
    479  1.43       gwr 		return (0);
    480  1.43       gwr 
    481  1.43       gwr #ifdef	DIAGNOSTIC
    482  1.43       gwr 	if (cs->cs_brg_clk == 0)
    483  1.43       gwr 		panic("zs_set_speed");
    484  1.43       gwr #endif
    485  1.43       gwr 
    486  1.43       gwr 	tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
    487  1.43       gwr 	if (tconst < 0)
    488  1.43       gwr 		return (EINVAL);
    489  1.43       gwr 
    490  1.43       gwr 	/* Convert back to make sure we can do it. */
    491  1.43       gwr 	real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
    492  1.43       gwr 
    493  1.43       gwr 	/* XXX - Allow some tolerance here? */
    494  1.43       gwr 	if (real_bps != bps)
    495  1.43       gwr 		return (EINVAL);
    496  1.43       gwr 
    497  1.43       gwr 	cs->cs_preg[12] = tconst;
    498  1.43       gwr 	cs->cs_preg[13] = tconst >> 8;
    499  1.43       gwr 
    500  1.43       gwr 	/* Caller will stuff the pending registers. */
    501  1.43       gwr 	return (0);
    502  1.43       gwr }
    503  1.43       gwr 
    504  1.43       gwr int
    505  1.43       gwr zs_set_modes(cs, cflag)
    506  1.43       gwr 	struct zs_chanstate *cs;
    507  1.43       gwr 	int cflag;	/* bits per second */
    508  1.43       gwr {
    509  1.43       gwr 	int s;
    510  1.43       gwr 
    511  1.43       gwr 	/*
    512  1.43       gwr 	 * Output hardware flow control on the chip is horrendous:
    513  1.43       gwr 	 * if carrier detect drops, the receiver is disabled, and if
    514  1.43       gwr 	 * CTS drops, the transmitter is stoped IN MID CHARACTER!
    515  1.43       gwr 	 * Therefore, NEVER set the HFC bit, and instead use the
    516  1.43       gwr 	 * status interrupt to detect CTS changes.
    517  1.43       gwr 	 */
    518  1.43       gwr 	s = splzs();
    519  1.51   mycroft 	if ((cflag & (CLOCAL | MDMBUF)) != 0)
    520  1.43       gwr 		cs->cs_rr0_dcd = 0;
    521  1.51   mycroft 	else
    522  1.43       gwr 		cs->cs_rr0_dcd = ZSRR0_DCD;
    523  1.51   mycroft 	if ((cflag & CRTSCTS) != 0) {
    524  1.43       gwr 		cs->cs_wr5_dtr = ZSWR5_DTR;
    525  1.43       gwr 		cs->cs_wr5_rts = ZSWR5_RTS;
    526  1.43       gwr 		cs->cs_rr0_cts = ZSRR0_CTS;
    527  1.51   mycroft 	} else if ((cflag & MDMBUF) != 0) {
    528  1.51   mycroft 		cs->cs_wr5_dtr = 0;
    529  1.51   mycroft 		cs->cs_wr5_rts = ZSWR5_DTR;
    530  1.51   mycroft 		cs->cs_rr0_cts = ZSRR0_DCD;
    531  1.43       gwr 	} else {
    532  1.43       gwr 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
    533  1.43       gwr 		cs->cs_wr5_rts = 0;
    534  1.43       gwr 		cs->cs_rr0_cts = 0;
    535  1.43       gwr 	}
    536  1.43       gwr 	splx(s);
    537  1.43       gwr 
    538  1.43       gwr 	/* Caller will stuff the pending registers. */
    539  1.43       gwr 	return (0);
    540  1.43       gwr }
    541  1.43       gwr 
    542  1.43       gwr 
    543  1.43       gwr /*
    544  1.31       gwr  * Read or write the chip with suitable delays.
    545  1.31       gwr  */
    546   1.2     glass 
    547  1.31       gwr u_char
    548  1.31       gwr zs_read_reg(cs, reg)
    549  1.31       gwr 	struct zs_chanstate *cs;
    550  1.31       gwr 	u_char reg;
    551   1.1     glass {
    552  1.31       gwr 	u_char val;
    553   1.1     glass 
    554  1.31       gwr 	*cs->cs_reg_csr = reg;
    555  1.31       gwr 	ZS_DELAY();
    556  1.31       gwr 	val = *cs->cs_reg_csr;
    557  1.31       gwr 	ZS_DELAY();
    558  1.31       gwr 	return val;
    559  1.17       gwr }
    560   1.3       gwr 
    561  1.31       gwr void
    562  1.31       gwr zs_write_reg(cs, reg, val)
    563  1.31       gwr 	struct zs_chanstate *cs;
    564  1.31       gwr 	u_char reg, val;
    565  1.17       gwr {
    566  1.31       gwr 	*cs->cs_reg_csr = reg;
    567  1.31       gwr 	ZS_DELAY();
    568  1.31       gwr 	*cs->cs_reg_csr = val;
    569  1.32       gwr 	ZS_DELAY();
    570  1.32       gwr }
    571  1.32       gwr 
    572  1.32       gwr u_char zs_read_csr(cs)
    573  1.32       gwr 	struct zs_chanstate *cs;
    574  1.32       gwr {
    575  1.43       gwr 	register u_char val;
    576  1.32       gwr 
    577  1.43       gwr 	val = *cs->cs_reg_csr;
    578  1.32       gwr 	ZS_DELAY();
    579  1.43       gwr 	return val;
    580  1.32       gwr }
    581  1.32       gwr 
    582  1.43       gwr void  zs_write_csr(cs, val)
    583  1.32       gwr 	struct zs_chanstate *cs;
    584  1.43       gwr 	u_char val;
    585  1.32       gwr {
    586  1.43       gwr 	*cs->cs_reg_csr = val;
    587  1.32       gwr 	ZS_DELAY();
    588  1.32       gwr }
    589  1.32       gwr 
    590  1.43       gwr u_char zs_read_data(cs)
    591  1.32       gwr 	struct zs_chanstate *cs;
    592  1.32       gwr {
    593  1.43       gwr 	register u_char val;
    594  1.43       gwr 
    595  1.43       gwr 	val = *cs->cs_reg_data;
    596  1.32       gwr 	ZS_DELAY();
    597  1.43       gwr 	return val;
    598  1.32       gwr }
    599  1.32       gwr 
    600  1.32       gwr void  zs_write_data(cs, val)
    601  1.32       gwr 	struct zs_chanstate *cs;
    602  1.32       gwr 	u_char val;
    603  1.32       gwr {
    604  1.32       gwr 	*cs->cs_reg_data = val;
    605  1.31       gwr 	ZS_DELAY();
    606   1.1     glass }
    607   1.3       gwr 
    608  1.31       gwr /****************************************************************
    609  1.31       gwr  * Console support functions (Sun3 specific!)
    610  1.43       gwr  * Note: this code is allowed to know about the layout of
    611  1.43       gwr  * the chip registers, and uses that to keep things simple.
    612  1.43       gwr  * XXX - I think I like the mvme167 code better. -gwr
    613  1.31       gwr  ****************************************************************/
    614   1.1     glass 
    615  1.43       gwr void *zs_conschan;
    616  1.43       gwr 
    617   1.2     glass /*
    618  1.47       gwr  * Handle user request to enter kernel debugger.
    619  1.47       gwr  */
    620  1.47       gwr void
    621  1.47       gwr zs_abort(cs)
    622  1.47       gwr 	struct zs_chanstate *cs;
    623  1.47       gwr {
    624  1.47       gwr 	register volatile struct zschan *zc = zs_conschan;
    625  1.47       gwr 	int rr0;
    626  1.47       gwr 
    627  1.47       gwr 	/* Wait for end of break to avoid PROM abort. */
    628  1.47       gwr 	/* XXX - Limit the wait? */
    629  1.47       gwr 	do {
    630  1.47       gwr 		rr0 = zc->zc_csr;
    631  1.47       gwr 		ZS_DELAY();
    632  1.47       gwr 	} while (rr0 & ZSRR0_BREAK);
    633  1.47       gwr 
    634  1.50       gwr 	/* This is always available on the Sun3. */
    635  1.47       gwr 	Debugger();
    636  1.47       gwr }
    637  1.47       gwr 
    638  1.47       gwr /*
    639  1.31       gwr  * Polled input char.
    640   1.2     glass  */
    641   1.2     glass int
    642  1.31       gwr zs_getc(arg)
    643  1.31       gwr 	void *arg;
    644   1.2     glass {
    645  1.31       gwr 	register volatile struct zschan *zc = arg;
    646  1.25       gwr 	register int s, c, rr0;
    647   1.2     glass 
    648   1.2     glass 	s = splhigh();
    649   1.9       gwr 	/* Wait for a character to arrive. */
    650  1.25       gwr 	do {
    651  1.25       gwr 		rr0 = zc->zc_csr;
    652   1.3       gwr 		ZS_DELAY();
    653  1.25       gwr 	} while ((rr0 & ZSRR0_RX_READY) == 0);
    654   1.9       gwr 
    655   1.2     glass 	c = zc->zc_data;
    656   1.9       gwr 	ZS_DELAY();
    657   1.2     glass 	splx(s);
    658  1.17       gwr 
    659  1.17       gwr 	/*
    660  1.17       gwr 	 * This is used by the kd driver to read scan codes,
    661  1.17       gwr 	 * so don't translate '\r' ==> '\n' here...
    662  1.17       gwr 	 */
    663   1.2     glass 	return (c);
    664   1.2     glass }
    665   1.1     glass 
    666   1.1     glass /*
    667  1.31       gwr  * Polled output char.
    668   1.1     glass  */
    669  1.31       gwr void
    670  1.31       gwr zs_putc(arg, c)
    671  1.31       gwr 	void *arg;
    672   1.1     glass 	int c;
    673   1.1     glass {
    674  1.31       gwr 	register volatile struct zschan *zc = arg;
    675  1.25       gwr 	register int s, rr0;
    676   1.1     glass 
    677   1.9       gwr 	s = splhigh();
    678   1.9       gwr 	/* Wait for transmitter to become ready. */
    679  1.25       gwr 	do {
    680  1.25       gwr 		rr0 = zc->zc_csr;
    681   1.3       gwr 		ZS_DELAY();
    682  1.25       gwr 	} while ((rr0 & ZSRR0_TX_READY) == 0);
    683   1.9       gwr 
    684   1.1     glass 	zc->zc_data = c;
    685   1.3       gwr 	ZS_DELAY();
    686   1.1     glass 	splx(s);
    687   1.1     glass }
    688   1.2     glass 
    689  1.50       gwr /*****************************************************************/
    690  1.50       gwr 
    691  1.50       gwr static void zscninit __P((struct consdev *));
    692  1.50       gwr static int  zscngetc __P((dev_t));
    693  1.50       gwr static void zscnputc __P((dev_t, int));
    694  1.50       gwr 
    695  1.50       gwr /*
    696  1.50       gwr  * Console table shared by ttya, ttyb
    697  1.50       gwr  */
    698  1.50       gwr struct consdev consdev_tty = {
    699  1.50       gwr 	nullcnprobe,
    700  1.50       gwr 	zscninit,
    701  1.50       gwr 	zscngetc,
    702  1.50       gwr 	zscnputc,
    703  1.50       gwr 	nullcnpollc,
    704  1.50       gwr };
    705  1.50       gwr 
    706  1.50       gwr static void
    707  1.50       gwr zscninit(cn)
    708  1.50       gwr 	struct consdev *cn;
    709  1.50       gwr {
    710  1.50       gwr }
    711  1.50       gwr 
    712  1.50       gwr /*
    713  1.50       gwr  * Polled console input putchar.
    714  1.50       gwr  */
    715  1.50       gwr static int
    716  1.50       gwr zscngetc(dev)
    717  1.50       gwr 	dev_t dev;
    718  1.50       gwr {
    719  1.50       gwr 	return (zs_getc(zs_conschan));
    720  1.50       gwr }
    721  1.50       gwr 
    722  1.50       gwr /*
    723  1.50       gwr  * Polled console output putchar.
    724  1.50       gwr  */
    725  1.50       gwr static void
    726  1.50       gwr zscnputc(dev, c)
    727  1.50       gwr 	dev_t dev;
    728  1.50       gwr 	int c;
    729  1.50       gwr {
    730  1.50       gwr 	zs_putc(zs_conschan, c);
    731  1.50       gwr }
    732  1.50       gwr 
    733  1.50       gwr /*****************************************************************/
    734  1.50       gwr 
    735  1.50       gwr static void prom_cninit __P((struct consdev *));
    736  1.50       gwr static int  prom_cngetc __P((dev_t));
    737  1.50       gwr static void prom_cnputc __P((dev_t, int));
    738  1.50       gwr 
    739  1.50       gwr /*
    740  1.50       gwr  * The console is set to this one initially,
    741  1.50       gwr  * which lets us use the PROM until consinit()
    742  1.50       gwr  * is called to select a real console.
    743  1.50       gwr  */
    744  1.50       gwr struct consdev consdev_prom = {
    745  1.50       gwr 	nullcnprobe,
    746  1.50       gwr 	prom_cninit,
    747  1.50       gwr 	prom_cngetc,
    748  1.50       gwr 	prom_cnputc,
    749  1.50       gwr 	nullcnpollc,
    750  1.50       gwr };
    751  1.50       gwr 
    752  1.50       gwr /*
    753  1.50       gwr  * The console table pointer is statically initialized
    754  1.50       gwr  * to point to the PROM (output only) table, so that
    755  1.50       gwr  * early calls to printf will work.
    756  1.50       gwr  */
    757  1.50       gwr struct consdev *cn_tab = &consdev_prom;
    758  1.50       gwr 
    759  1.50       gwr void
    760  1.50       gwr nullcnprobe(cn)
    761  1.50       gwr 	struct consdev *cn;
    762  1.50       gwr {
    763  1.50       gwr }
    764  1.50       gwr 
    765  1.50       gwr static void
    766  1.50       gwr prom_cninit(cn)
    767  1.50       gwr 	struct consdev *cn;
    768  1.50       gwr {
    769  1.50       gwr }
    770  1.50       gwr 
    771  1.50       gwr /*
    772  1.50       gwr  * PROM console input putchar.
    773  1.50       gwr  * (dummy - this is output only)
    774  1.50       gwr  */
    775  1.50       gwr static int
    776  1.50       gwr prom_cngetc(dev)
    777  1.50       gwr 	dev_t dev;
    778  1.50       gwr {
    779  1.50       gwr 	return (0);
    780  1.50       gwr }
    781  1.50       gwr 
    782  1.50       gwr /*
    783  1.50       gwr  * PROM console output putchar.
    784  1.50       gwr  */
    785  1.50       gwr static void
    786  1.50       gwr prom_cnputc(dev, c)
    787  1.50       gwr 	dev_t dev;
    788  1.50       gwr 	int c;
    789  1.50       gwr {
    790  1.50       gwr 	(*romVectorPtr->putChar)(c & 0x7f);
    791  1.50       gwr }
    792  1.50       gwr 
    793  1.50       gwr /*****************************************************************/
    794  1.50       gwr 
    795  1.50       gwr extern struct consdev consdev_kd;
    796  1.31       gwr 
    797  1.43       gwr static struct {
    798  1.50       gwr 	int zs_unit, channel;
    799  1.50       gwr } zstty_conf[NZS*2] = {
    800  1.43       gwr 	/* XXX: knowledge from the config file here... */
    801  1.43       gwr 	{ 1, 0 },	/* ttya */
    802  1.43       gwr 	{ 1, 1 },	/* ttyb */
    803  1.43       gwr 	{ 0, 0 },	/* ttyc */
    804  1.43       gwr 	{ 0, 1 },	/* ttyd */
    805  1.43       gwr };
    806  1.31       gwr 
    807  1.47       gwr static char *prom_inSrc_name[] = {
    808  1.47       gwr 	"keyboard/display",
    809  1.47       gwr 	"ttya", "ttyb",
    810  1.47       gwr 	"ttyc", "ttyd" };
    811  1.47       gwr 
    812   1.1     glass /*
    813  1.31       gwr  * This function replaces sys/dev/cninit.c
    814  1.31       gwr  * Determine which device is the console using
    815  1.38       gwr  * the PROM "input source" and "output sink".
    816   1.1     glass  */
    817  1.31       gwr void
    818  1.31       gwr cninit()
    819   1.1     glass {
    820  1.53       gwr 	struct sunromvec *v;
    821  1.31       gwr 	struct zschan *zc;
    822  1.31       gwr 	struct consdev *cn;
    823  1.50       gwr 	int channel, zs_unit, zstty_unit;
    824  1.50       gwr 	u_char inSource, outSink;
    825  1.53       gwr 
    826  1.53       gwr 	/* Get the zs driver ready for console duty. */
    827  1.53       gwr 	zs_init();
    828  1.31       gwr 
    829  1.38       gwr 	v = romVectorPtr;
    830  1.50       gwr 	inSource = *v->inSource;
    831  1.50       gwr 	outSink  = *v->outSink;
    832  1.50       gwr 	if (inSource != outSink) {
    833  1.38       gwr 		mon_printf("cninit: mismatched PROM output selector\n");
    834  1.38       gwr 	}
    835  1.38       gwr 
    836  1.38       gwr 	switch (inSource) {
    837  1.47       gwr 	default:
    838  1.47       gwr 		mon_printf("cninit: invalid inSource=%d\n", inSource);
    839  1.47       gwr 		sunmon_abort();
    840  1.47       gwr 		inSource = 0;
    841  1.47       gwr 		/* fall through */
    842  1.47       gwr 
    843  1.47       gwr 	case 0:	/* keyboard/display */
    844  1.47       gwr #if NKBD > 0
    845  1.50       gwr 		zs_unit = 0;
    846  1.47       gwr 		channel = 0;
    847  1.47       gwr 		cn = &consdev_kd;
    848  1.47       gwr 		/* Set cn_dev, cn_pri in kd.c */
    849  1.47       gwr 		break;
    850  1.47       gwr #else	/* NKBD */
    851  1.47       gwr 		mon_printf("cninit: kdb/display not configured\n");
    852  1.47       gwr 		sunmon_abort();
    853  1.47       gwr 		inSource = 1;
    854  1.47       gwr 		/* fall through */
    855  1.47       gwr #endif	/* NKBD */
    856  1.47       gwr 
    857  1.38       gwr 	case 1:	/* ttya */
    858  1.38       gwr 	case 2:	/* ttyb */
    859  1.38       gwr 	case 3:	/* ttyc (rewired keyboard connector) */
    860  1.38       gwr 	case 4:	/* ttyd (rewired mouse connector)   */
    861  1.43       gwr 		zstty_unit = inSource - 1;
    862  1.50       gwr 		zs_unit = zstty_conf[zstty_unit].zs_unit;
    863  1.50       gwr 		channel = zstty_conf[zstty_unit].channel;
    864  1.38       gwr 		cn = &consdev_tty;
    865  1.43       gwr 		cn->cn_dev = makedev(zs_major, zstty_unit);
    866  1.38       gwr 		cn->cn_pri = CN_REMOTE;
    867  1.38       gwr 		break;
    868  1.38       gwr 
    869   1.1     glass 	}
    870  1.47       gwr 	/* Now that inSource has been validated, print it. */
    871  1.47       gwr 	mon_printf("console is %s\n", prom_inSrc_name[inSource]);
    872   1.1     glass 
    873  1.50       gwr 	zc = zs_get_chan_addr(zs_unit, channel);
    874  1.31       gwr 	if (zc == NULL) {
    875  1.31       gwr 		mon_printf("cninit: zs not mapped.\n");
    876  1.31       gwr 		return;
    877  1.31       gwr 	}
    878  1.31       gwr 	zs_conschan = zc;
    879  1.50       gwr 	zs_hwflags[zs_unit][channel] = ZS_HWFLAG_CONSOLE;
    880  1.31       gwr 	cn_tab = cn;
    881  1.31       gwr 	(*cn->cn_init)(cn);
    882  1.47       gwr #ifdef	KGDB
    883  1.47       gwr 	zs_kgdb_init();
    884  1.47       gwr #endif
    885   1.1     glass }
    886