zs.c revision 1.61 1 1.61 chs /* $NetBSD: zs.c,v 1.61 2001/05/28 20:52:34 chs Exp $ */
2 1.10 cgd
3 1.42 gwr /*-
4 1.42 gwr * Copyright (c) 1996 The NetBSD Foundation, Inc.
5 1.31 gwr * All rights reserved.
6 1.1 glass *
7 1.42 gwr * This code is derived from software contributed to The NetBSD Foundation
8 1.42 gwr * by Gordon W. Ross.
9 1.42 gwr *
10 1.1 glass * Redistribution and use in source and binary forms, with or without
11 1.1 glass * modification, are permitted provided that the following conditions
12 1.1 glass * are met:
13 1.1 glass * 1. Redistributions of source code must retain the above copyright
14 1.1 glass * notice, this list of conditions and the following disclaimer.
15 1.1 glass * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 glass * notice, this list of conditions and the following disclaimer in the
17 1.1 glass * documentation and/or other materials provided with the distribution.
18 1.42 gwr * 3. All advertising materials mentioning features or use of this software
19 1.1 glass * must display the following acknowledgement:
20 1.42 gwr * This product includes software developed by the NetBSD
21 1.42 gwr * Foundation, Inc. and its contributors.
22 1.42 gwr * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.42 gwr * contributors may be used to endorse or promote products derived
24 1.42 gwr * from this software without specific prior written permission.
25 1.1 glass *
26 1.42 gwr * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.42 gwr * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.42 gwr * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.44 gwr * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.44 gwr * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.42 gwr * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.42 gwr * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.42 gwr * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.42 gwr * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.42 gwr * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.42 gwr * POSSIBILITY OF SUCH DAMAGE.
37 1.1 glass */
38 1.1 glass
39 1.1 glass /*
40 1.31 gwr * Zilog Z8530 Dual UART driver (machine-dependent part)
41 1.1 glass *
42 1.31 gwr * Runs two serial lines per chip using slave drivers.
43 1.31 gwr * Plain tty/async lines use the zs_async slave.
44 1.31 gwr * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
45 1.1 glass */
46 1.1 glass
47 1.5 gwr #include <sys/param.h>
48 1.1 glass #include <sys/systm.h>
49 1.43 gwr #include <sys/conf.h>
50 1.1 glass #include <sys/device.h>
51 1.1 glass #include <sys/file.h>
52 1.1 glass #include <sys/ioctl.h>
53 1.43 gwr #include <sys/kernel.h>
54 1.43 gwr #include <sys/proc.h>
55 1.1 glass #include <sys/tty.h>
56 1.1 glass #include <sys/time.h>
57 1.1 glass #include <sys/syslog.h>
58 1.1 glass
59 1.1 glass #include <machine/autoconf.h>
60 1.1 glass #include <machine/cpu.h>
61 1.3 gwr #include <machine/mon.h>
62 1.49 gwr #include <machine/z8530var.h>
63 1.49 gwr
64 1.53 gwr #include <sun3/sun3/machdep.h>
65 1.53 gwr #ifdef _SUN3X_
66 1.53 gwr #include <sun3/sun3x/obio.h>
67 1.53 gwr #else
68 1.53 gwr #include <sun3/sun3/obio.h>
69 1.53 gwr #endif
70 1.53 gwr #include <sun3/dev/zs_cons.h>
71 1.53 gwr
72 1.49 gwr #include <dev/cons.h>
73 1.49 gwr #include <dev/ic/z8530reg.h>
74 1.1 glass
75 1.50 gwr #include "kbd.h" /* NKBD */
76 1.50 gwr #include "zsc.h" /* NZSC */
77 1.50 gwr #define NZS NZSC
78 1.50 gwr
79 1.50 gwr /* Make life easier for the initialized arrays here. */
80 1.50 gwr #if NZS < 2
81 1.50 gwr #undef NZS
82 1.50 gwr #define NZS 2
83 1.50 gwr #endif
84 1.47 gwr
85 1.16 gwr /*
86 1.43 gwr * Some warts needed by z8530tty.c -
87 1.43 gwr * The default parity REALLY needs to be the same as the PROM uses,
88 1.43 gwr * or you can not see messages done with printf during boot-up...
89 1.43 gwr */
90 1.43 gwr int zs_def_cflag = (CREAD | CS8 | HUPCL);
91 1.43 gwr int zs_major = 12;
92 1.1 glass
93 1.43 gwr /*
94 1.43 gwr * The Sun3 provides a 4.9152 MHz clock to the ZS chips.
95 1.43 gwr */
96 1.2 glass #define PCLK (9600 * 512) /* PCLK pin input clock rate */
97 1.2 glass
98 1.2 glass /*
99 1.22 gwr * Define interrupt levels.
100 1.2 glass */
101 1.2 glass #define ZSHARD_PRI 6 /* Wired on the CPU board... */
102 1.22 gwr #define ZSSOFT_PRI 3 /* Want tty pri (4) but this is OK. */
103 1.1 glass
104 1.33 gwr #define ZS_DELAY() delay(2)
105 1.31 gwr
106 1.31 gwr /* The layout of this is hardware-dependent (padding, order). */
107 1.31 gwr struct zschan {
108 1.31 gwr volatile u_char zc_csr; /* ctrl,status, and indirect access */
109 1.31 gwr u_char zc_xxx0;
110 1.31 gwr volatile u_char zc_data; /* data */
111 1.31 gwr u_char zc_xxx1;
112 1.31 gwr };
113 1.31 gwr struct zsdevice {
114 1.31 gwr /* Yes, they are backwards. */
115 1.31 gwr struct zschan zs_chan_b;
116 1.31 gwr struct zschan zs_chan_a;
117 1.1 glass };
118 1.1 glass
119 1.1 glass
120 1.31 gwr /* Default OBIO addresses. */
121 1.50 gwr static int zs_physaddr[NZS] = {
122 1.44 gwr OBIO_ZS_KBD_MS,
123 1.44 gwr OBIO_ZS_TTY_AB };
124 1.43 gwr
125 1.31 gwr /* Saved PROM mappings */
126 1.50 gwr static struct zsdevice *zsaddr[NZS];
127 1.43 gwr
128 1.31 gwr /* Flags from cninit() */
129 1.50 gwr static int zs_hwflags[NZS][2];
130 1.43 gwr
131 1.31 gwr /* Default speed for each channel */
132 1.50 gwr static int zs_defspeed[NZS][2] = {
133 1.31 gwr { 1200, /* keyboard */
134 1.31 gwr 1200 }, /* mouse */
135 1.31 gwr { 9600, /* ttya */
136 1.31 gwr 9600 }, /* ttyb */
137 1.31 gwr };
138 1.13 gwr
139 1.43 gwr static u_char zs_init_reg[16] = {
140 1.43 gwr 0, /* 0: CMD (reset, etc.) */
141 1.43 gwr 0, /* 1: No interrupts yet. */
142 1.43 gwr 0x18 + ZSHARD_PRI, /* IVECT */
143 1.43 gwr ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
144 1.43 gwr ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
145 1.43 gwr ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
146 1.43 gwr 0, /* 6: TXSYNC/SYNCLO */
147 1.43 gwr 0, /* 7: RXSYNC/SYNCHI */
148 1.43 gwr 0, /* 8: alias for data port */
149 1.43 gwr ZSWR9_MASTER_IE,
150 1.43 gwr 0, /*10: Misc. TX/RX control bits */
151 1.43 gwr ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
152 1.56 mycroft ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */
153 1.56 mycroft 0, /*13: BAUDHI (default=9600) */
154 1.43 gwr ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
155 1.55 mycroft ZSWR15_BREAK_IE,
156 1.43 gwr };
157 1.43 gwr
158 1.1 glass
159 1.31 gwr /* Find PROM mappings (for console support). */
160 1.43 gwr void
161 1.43 gwr zs_init()
162 1.31 gwr {
163 1.31 gwr int i;
164 1.1 glass
165 1.50 gwr for (i = 0; i < NZS; i++) {
166 1.31 gwr zsaddr[i] = (struct zsdevice *)
167 1.44 gwr obio_find_mapping(zs_physaddr[i], sizeof(struct zschan));
168 1.31 gwr }
169 1.43 gwr }
170 1.13 gwr
171 1.47 gwr struct zschan *
172 1.50 gwr zs_get_chan_addr(zs_unit, channel)
173 1.50 gwr int zs_unit, channel;
174 1.31 gwr {
175 1.31 gwr struct zsdevice *addr;
176 1.31 gwr struct zschan *zc;
177 1.31 gwr
178 1.50 gwr if (zs_unit >= NZS)
179 1.31 gwr return NULL;
180 1.50 gwr addr = zsaddr[zs_unit];
181 1.31 gwr if (addr == NULL)
182 1.31 gwr return NULL;
183 1.31 gwr if (channel == 0) {
184 1.31 gwr zc = &addr->zs_chan_a;
185 1.31 gwr } else {
186 1.31 gwr zc = &addr->zs_chan_b;
187 1.31 gwr }
188 1.31 gwr return (zc);
189 1.31 gwr }
190 1.13 gwr
191 1.18 gwr
192 1.31 gwr /****************************************************************
193 1.31 gwr * Autoconfig
194 1.31 gwr ****************************************************************/
195 1.31 gwr
196 1.31 gwr /* Definition of the driver for autoconfig. */
197 1.50 gwr static int zs_match __P((struct device *, struct cfdata *, void *));
198 1.50 gwr static void zs_attach __P((struct device *, struct device *, void *));
199 1.50 gwr static int zs_print __P((void *, const char *name));
200 1.31 gwr
201 1.34 thorpej struct cfattach zsc_ca = {
202 1.50 gwr sizeof(struct zsc_softc), zs_match, zs_attach
203 1.34 thorpej };
204 1.34 thorpej
205 1.52 thorpej extern struct cfdriver zsc_cd;
206 1.31 gwr
207 1.43 gwr static int zshard __P((void *));
208 1.43 gwr static int zssoft __P((void *));
209 1.43 gwr static int zs_get_speed __P((struct zs_chanstate *));
210 1.31 gwr
211 1.9 gwr
212 1.1 glass /*
213 1.31 gwr * Is the zs chip present?
214 1.1 glass */
215 1.1 glass static int
216 1.50 gwr zs_match(parent, cf, aux)
217 1.31 gwr struct device *parent;
218 1.43 gwr struct cfdata *cf;
219 1.43 gwr void *aux;
220 1.1 glass {
221 1.31 gwr struct confargs *ca = aux;
222 1.61 chs int unit;
223 1.35 gwr void *va;
224 1.13 gwr
225 1.35 gwr /*
226 1.43 gwr * This driver only supports its wired-in mappings,
227 1.43 gwr * because the console support depends on those.
228 1.35 gwr */
229 1.61 chs if (ca->ca_paddr == zs_physaddr[0]) {
230 1.61 chs unit = 0;
231 1.61 chs } else if (ca->ca_paddr == zs_physaddr[1]) {
232 1.61 chs unit = 1;
233 1.61 chs } else {
234 1.35 gwr return (0);
235 1.61 chs }
236 1.35 gwr
237 1.31 gwr /* Make sure zs_init() found mappings. */
238 1.35 gwr va = zsaddr[unit];
239 1.35 gwr if (va == NULL)
240 1.21 gwr return (0);
241 1.21 gwr
242 1.21 gwr /* This returns -1 on a fault (bus error). */
243 1.43 gwr if (peek_byte(va) == -1)
244 1.43 gwr return (0);
245 1.43 gwr
246 1.43 gwr /* Default interrupt priority (always splbio==2) */
247 1.43 gwr if (ca->ca_intpri == -1)
248 1.43 gwr ca->ca_intpri = ZSHARD_PRI;
249 1.43 gwr
250 1.43 gwr return (1);
251 1.1 glass }
252 1.1 glass
253 1.1 glass /*
254 1.1 glass * Attach a found zs.
255 1.1 glass *
256 1.31 gwr * Match slave number to zs unit number, so that misconfiguration will
257 1.31 gwr * not set up the keyboard as ttya, etc.
258 1.1 glass */
259 1.1 glass static void
260 1.50 gwr zs_attach(parent, self, aux)
261 1.31 gwr struct device *parent;
262 1.31 gwr struct device *self;
263 1.31 gwr void *aux;
264 1.31 gwr {
265 1.31 gwr struct zsc_softc *zsc = (void *) self;
266 1.31 gwr struct confargs *ca = aux;
267 1.31 gwr struct zsc_attach_args zsc_args;
268 1.31 gwr volatile struct zschan *zc;
269 1.31 gwr struct zs_chanstate *cs;
270 1.50 gwr int s, zs_unit, channel;
271 1.50 gwr static int didintr;
272 1.2 glass
273 1.50 gwr zs_unit = zsc->zsc_dev.dv_unit;
274 1.13 gwr
275 1.43 gwr printf(": (softpri %d)\n", ZSSOFT_PRI);
276 1.1 glass
277 1.31 gwr /* Use the mapping setup by the Sun PROM. */
278 1.50 gwr if (zsaddr[zs_unit] == NULL)
279 1.50 gwr panic("zs_attach: zs%d not mapped\n", zs_unit);
280 1.31 gwr
281 1.31 gwr /*
282 1.31 gwr * Initialize software state for each channel.
283 1.31 gwr */
284 1.31 gwr for (channel = 0; channel < 2; channel++) {
285 1.43 gwr zsc_args.channel = channel;
286 1.50 gwr zsc_args.hwflags = zs_hwflags[zs_unit][channel];
287 1.43 gwr cs = &zsc->zsc_cs_store[channel];
288 1.43 gwr zsc->zsc_cs[channel] = cs;
289 1.1 glass
290 1.31 gwr cs->cs_channel = channel;
291 1.31 gwr cs->cs_private = NULL;
292 1.31 gwr cs->cs_ops = &zsops_null;
293 1.37 gwr cs->cs_brg_clk = PCLK / 16;
294 1.31 gwr
295 1.50 gwr zc = zs_get_chan_addr(zs_unit, channel);
296 1.43 gwr cs->cs_reg_csr = &zc->zc_csr;
297 1.43 gwr cs->cs_reg_data = &zc->zc_data;
298 1.2 glass
299 1.31 gwr bcopy(zs_init_reg, cs->cs_creg, 16);
300 1.31 gwr bcopy(zs_init_reg, cs->cs_preg, 16);
301 1.15 gwr
302 1.43 gwr /* XXX: Get these from the EEPROM instead? */
303 1.43 gwr /* XXX: See the mvme167 code. Better. */
304 1.43 gwr if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
305 1.43 gwr cs->cs_defspeed = zs_get_speed(cs);
306 1.43 gwr else
307 1.50 gwr cs->cs_defspeed = zs_defspeed[zs_unit][channel];
308 1.43 gwr cs->cs_defcflag = zs_def_cflag;
309 1.43 gwr
310 1.47 gwr /* Make these correspond to cs_defcflag (-crtscts) */
311 1.46 gwr cs->cs_rr0_dcd = ZSRR0_DCD;
312 1.47 gwr cs->cs_rr0_cts = 0;
313 1.47 gwr cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
314 1.47 gwr cs->cs_wr5_rts = 0;
315 1.46 gwr
316 1.1 glass /*
317 1.31 gwr * Clear the master interrupt enable.
318 1.31 gwr * The INTENA is common to both channels,
319 1.31 gwr * so just do it on the A channel.
320 1.1 glass */
321 1.31 gwr if (channel == 0) {
322 1.32 gwr zs_write_reg(cs, 9, 0);
323 1.31 gwr }
324 1.15 gwr
325 1.1 glass /*
326 1.31 gwr * Look for a child driver for this channel.
327 1.31 gwr * The child attach will setup the hardware.
328 1.1 glass */
329 1.50 gwr if (!config_found(self, (void *)&zsc_args, zs_print)) {
330 1.31 gwr /* No sub-driver. Just reset it. */
331 1.43 gwr u_char reset = (channel == 0) ?
332 1.31 gwr ZSWR9_A_RESET : ZSWR9_B_RESET;
333 1.45 gwr s = splhigh();
334 1.32 gwr zs_write_reg(cs, 9, reset);
335 1.31 gwr splx(s);
336 1.31 gwr }
337 1.1 glass }
338 1.1 glass
339 1.43 gwr /*
340 1.43 gwr * Now safe to install interrupt handlers. Note the arguments
341 1.43 gwr * to the interrupt handlers aren't used. Note, we only do this
342 1.43 gwr * once since both SCCs interrupt at the same level and vector.
343 1.43 gwr */
344 1.50 gwr if (!didintr) {
345 1.50 gwr didintr = 1;
346 1.31 gwr isr_add_autovect(zssoft, NULL, ZSSOFT_PRI);
347 1.43 gwr isr_add_autovect(zshard, NULL, ca->ca_intpri);
348 1.31 gwr }
349 1.50 gwr /* XXX; evcnt_attach() ? */
350 1.24 gwr
351 1.31 gwr /*
352 1.31 gwr * Set the master interrupt enable and interrupt vector.
353 1.31 gwr * (common to both channels, do it on A)
354 1.31 gwr */
355 1.43 gwr cs = zsc->zsc_cs[0];
356 1.45 gwr s = splhigh();
357 1.31 gwr /* interrupt vector */
358 1.32 gwr zs_write_reg(cs, 2, zs_init_reg[2]);
359 1.31 gwr /* master interrupt control (enable) */
360 1.32 gwr zs_write_reg(cs, 9, zs_init_reg[9]);
361 1.31 gwr splx(s);
362 1.45 gwr
363 1.45 gwr /*
364 1.45 gwr * XXX: L1A hack - We would like to be able to break into
365 1.45 gwr * the debugger during the rest of autoconfiguration, so
366 1.45 gwr * lower interrupts just enough to let zs interrupts in.
367 1.50 gwr * This is done after both zs devices are attached.
368 1.45 gwr */
369 1.50 gwr if (zs_unit == 1) {
370 1.45 gwr (void)spl5(); /* splzs - 1 */
371 1.45 gwr }
372 1.35 gwr }
373 1.35 gwr
374 1.35 gwr static int
375 1.50 gwr zs_print(aux, name)
376 1.35 gwr void *aux;
377 1.39 cgd const char *name;
378 1.35 gwr {
379 1.35 gwr struct zsc_attach_args *args = aux;
380 1.35 gwr
381 1.35 gwr if (name != NULL)
382 1.41 christos printf("%s: ", name);
383 1.35 gwr
384 1.35 gwr if (args->channel != -1)
385 1.41 christos printf(" channel %d", args->channel);
386 1.35 gwr
387 1.35 gwr return UNCONF;
388 1.24 gwr }
389 1.24 gwr
390 1.48 gwr static volatile int zssoftpending;
391 1.43 gwr
392 1.43 gwr /*
393 1.43 gwr * Our ZS chips all share a common, autovectored interrupt,
394 1.43 gwr * so we have to look at all of them on each interrupt.
395 1.43 gwr */
396 1.31 gwr static int
397 1.31 gwr zshard(arg)
398 1.31 gwr void *arg;
399 1.1 glass {
400 1.43 gwr register struct zsc_softc *zsc;
401 1.48 gwr register int unit, rval, softreq;
402 1.43 gwr
403 1.48 gwr rval = softreq = 0;
404 1.48 gwr for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
405 1.34 thorpej zsc = zsc_cd.cd_devs[unit];
406 1.43 gwr if (zsc == NULL)
407 1.43 gwr continue;
408 1.43 gwr rval |= zsc_intr_hard(zsc);
409 1.48 gwr softreq |= zsc->zsc_cs[0]->cs_softreq;
410 1.48 gwr softreq |= zsc->zsc_cs[1]->cs_softreq;
411 1.48 gwr }
412 1.48 gwr
413 1.48 gwr /* We are at splzs here, so no need to lock. */
414 1.48 gwr if (softreq && (zssoftpending == 0)) {
415 1.48 gwr zssoftpending = ZSSOFT_PRI;
416 1.48 gwr isr_soft_request(ZSSOFT_PRI);
417 1.31 gwr }
418 1.31 gwr return (rval);
419 1.1 glass }
420 1.1 glass
421 1.43 gwr /*
422 1.43 gwr * Similar scheme as for zshard (look at all of them)
423 1.43 gwr */
424 1.3 gwr static int
425 1.31 gwr zssoft(arg)
426 1.31 gwr void *arg;
427 1.3 gwr {
428 1.43 gwr register struct zsc_softc *zsc;
429 1.48 gwr register int s, unit;
430 1.31 gwr
431 1.31 gwr /* This is not the only ISR on this IPL. */
432 1.31 gwr if (zssoftpending == 0)
433 1.31 gwr return (0);
434 1.3 gwr
435 1.31 gwr /*
436 1.31 gwr * The soft intr. bit will be set by zshard only if
437 1.31 gwr * the variable zssoftpending is zero. The order of
438 1.31 gwr * these next two statements prevents our clearing
439 1.31 gwr * the soft intr bit just after zshard has set it.
440 1.31 gwr */
441 1.31 gwr isr_soft_clear(ZSSOFT_PRI);
442 1.31 gwr zssoftpending = 0;
443 1.2 glass
444 1.48 gwr /* Make sure we call the tty layer at spltty. */
445 1.48 gwr s = spltty();
446 1.48 gwr for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
447 1.34 thorpej zsc = zsc_cd.cd_devs[unit];
448 1.43 gwr if (zsc == NULL)
449 1.43 gwr continue;
450 1.43 gwr (void) zsc_intr_soft(zsc);
451 1.3 gwr }
452 1.48 gwr splx(s);
453 1.31 gwr return (1);
454 1.2 glass }
455 1.2 glass
456 1.2 glass
457 1.31 gwr /*
458 1.50 gwr * Compute the current baud rate given a ZS channel.
459 1.43 gwr */
460 1.43 gwr static int
461 1.43 gwr zs_get_speed(cs)
462 1.43 gwr struct zs_chanstate *cs;
463 1.43 gwr {
464 1.43 gwr int tconst;
465 1.43 gwr
466 1.43 gwr tconst = zs_read_reg(cs, 12);
467 1.43 gwr tconst |= zs_read_reg(cs, 13) << 8;
468 1.43 gwr return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
469 1.43 gwr }
470 1.43 gwr
471 1.43 gwr /*
472 1.43 gwr * MD functions for setting the baud rate and control modes.
473 1.43 gwr */
474 1.43 gwr int
475 1.43 gwr zs_set_speed(cs, bps)
476 1.43 gwr struct zs_chanstate *cs;
477 1.43 gwr int bps; /* bits per second */
478 1.43 gwr {
479 1.43 gwr int tconst, real_bps;
480 1.43 gwr
481 1.43 gwr if (bps == 0)
482 1.43 gwr return (0);
483 1.43 gwr
484 1.43 gwr #ifdef DIAGNOSTIC
485 1.43 gwr if (cs->cs_brg_clk == 0)
486 1.43 gwr panic("zs_set_speed");
487 1.43 gwr #endif
488 1.43 gwr
489 1.43 gwr tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
490 1.43 gwr if (tconst < 0)
491 1.43 gwr return (EINVAL);
492 1.43 gwr
493 1.43 gwr /* Convert back to make sure we can do it. */
494 1.43 gwr real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
495 1.43 gwr
496 1.43 gwr /* XXX - Allow some tolerance here? */
497 1.43 gwr if (real_bps != bps)
498 1.43 gwr return (EINVAL);
499 1.43 gwr
500 1.43 gwr cs->cs_preg[12] = tconst;
501 1.43 gwr cs->cs_preg[13] = tconst >> 8;
502 1.43 gwr
503 1.43 gwr /* Caller will stuff the pending registers. */
504 1.43 gwr return (0);
505 1.43 gwr }
506 1.43 gwr
507 1.43 gwr int
508 1.43 gwr zs_set_modes(cs, cflag)
509 1.43 gwr struct zs_chanstate *cs;
510 1.43 gwr int cflag; /* bits per second */
511 1.43 gwr {
512 1.43 gwr int s;
513 1.43 gwr
514 1.43 gwr /*
515 1.43 gwr * Output hardware flow control on the chip is horrendous:
516 1.43 gwr * if carrier detect drops, the receiver is disabled, and if
517 1.43 gwr * CTS drops, the transmitter is stoped IN MID CHARACTER!
518 1.43 gwr * Therefore, NEVER set the HFC bit, and instead use the
519 1.43 gwr * status interrupt to detect CTS changes.
520 1.43 gwr */
521 1.43 gwr s = splzs();
522 1.57 wrstuden cs->cs_rr0_pps = 0;
523 1.57 wrstuden if ((cflag & (CLOCAL | MDMBUF)) != 0) {
524 1.43 gwr cs->cs_rr0_dcd = 0;
525 1.57 wrstuden if ((cflag & MDMBUF) == 0)
526 1.57 wrstuden cs->cs_rr0_pps = ZSRR0_DCD;
527 1.57 wrstuden } else
528 1.43 gwr cs->cs_rr0_dcd = ZSRR0_DCD;
529 1.51 mycroft if ((cflag & CRTSCTS) != 0) {
530 1.43 gwr cs->cs_wr5_dtr = ZSWR5_DTR;
531 1.43 gwr cs->cs_wr5_rts = ZSWR5_RTS;
532 1.43 gwr cs->cs_rr0_cts = ZSRR0_CTS;
533 1.51 mycroft } else if ((cflag & MDMBUF) != 0) {
534 1.51 mycroft cs->cs_wr5_dtr = 0;
535 1.51 mycroft cs->cs_wr5_rts = ZSWR5_DTR;
536 1.51 mycroft cs->cs_rr0_cts = ZSRR0_DCD;
537 1.43 gwr } else {
538 1.43 gwr cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
539 1.43 gwr cs->cs_wr5_rts = 0;
540 1.43 gwr cs->cs_rr0_cts = 0;
541 1.43 gwr }
542 1.43 gwr splx(s);
543 1.43 gwr
544 1.43 gwr /* Caller will stuff the pending registers. */
545 1.43 gwr return (0);
546 1.43 gwr }
547 1.43 gwr
548 1.43 gwr
549 1.43 gwr /*
550 1.31 gwr * Read or write the chip with suitable delays.
551 1.31 gwr */
552 1.2 glass
553 1.31 gwr u_char
554 1.31 gwr zs_read_reg(cs, reg)
555 1.31 gwr struct zs_chanstate *cs;
556 1.31 gwr u_char reg;
557 1.1 glass {
558 1.31 gwr u_char val;
559 1.1 glass
560 1.31 gwr *cs->cs_reg_csr = reg;
561 1.31 gwr ZS_DELAY();
562 1.31 gwr val = *cs->cs_reg_csr;
563 1.31 gwr ZS_DELAY();
564 1.31 gwr return val;
565 1.17 gwr }
566 1.3 gwr
567 1.31 gwr void
568 1.31 gwr zs_write_reg(cs, reg, val)
569 1.31 gwr struct zs_chanstate *cs;
570 1.31 gwr u_char reg, val;
571 1.17 gwr {
572 1.31 gwr *cs->cs_reg_csr = reg;
573 1.31 gwr ZS_DELAY();
574 1.31 gwr *cs->cs_reg_csr = val;
575 1.32 gwr ZS_DELAY();
576 1.32 gwr }
577 1.32 gwr
578 1.32 gwr u_char zs_read_csr(cs)
579 1.32 gwr struct zs_chanstate *cs;
580 1.32 gwr {
581 1.43 gwr register u_char val;
582 1.32 gwr
583 1.43 gwr val = *cs->cs_reg_csr;
584 1.32 gwr ZS_DELAY();
585 1.43 gwr return val;
586 1.32 gwr }
587 1.32 gwr
588 1.43 gwr void zs_write_csr(cs, val)
589 1.32 gwr struct zs_chanstate *cs;
590 1.43 gwr u_char val;
591 1.32 gwr {
592 1.43 gwr *cs->cs_reg_csr = val;
593 1.32 gwr ZS_DELAY();
594 1.32 gwr }
595 1.32 gwr
596 1.43 gwr u_char zs_read_data(cs)
597 1.32 gwr struct zs_chanstate *cs;
598 1.32 gwr {
599 1.43 gwr register u_char val;
600 1.43 gwr
601 1.43 gwr val = *cs->cs_reg_data;
602 1.32 gwr ZS_DELAY();
603 1.43 gwr return val;
604 1.32 gwr }
605 1.32 gwr
606 1.32 gwr void zs_write_data(cs, val)
607 1.32 gwr struct zs_chanstate *cs;
608 1.32 gwr u_char val;
609 1.32 gwr {
610 1.32 gwr *cs->cs_reg_data = val;
611 1.31 gwr ZS_DELAY();
612 1.1 glass }
613 1.3 gwr
614 1.31 gwr /****************************************************************
615 1.31 gwr * Console support functions (Sun3 specific!)
616 1.43 gwr * Note: this code is allowed to know about the layout of
617 1.43 gwr * the chip registers, and uses that to keep things simple.
618 1.43 gwr * XXX - I think I like the mvme167 code better. -gwr
619 1.31 gwr ****************************************************************/
620 1.1 glass
621 1.43 gwr void *zs_conschan;
622 1.43 gwr
623 1.2 glass /*
624 1.47 gwr * Handle user request to enter kernel debugger.
625 1.47 gwr */
626 1.47 gwr void
627 1.47 gwr zs_abort(cs)
628 1.47 gwr struct zs_chanstate *cs;
629 1.47 gwr {
630 1.47 gwr register volatile struct zschan *zc = zs_conschan;
631 1.47 gwr int rr0;
632 1.47 gwr
633 1.47 gwr /* Wait for end of break to avoid PROM abort. */
634 1.47 gwr /* XXX - Limit the wait? */
635 1.47 gwr do {
636 1.47 gwr rr0 = zc->zc_csr;
637 1.47 gwr ZS_DELAY();
638 1.47 gwr } while (rr0 & ZSRR0_BREAK);
639 1.47 gwr
640 1.59 jdolecek /* This is always available on the Sun3. */
641 1.47 gwr Debugger();
642 1.47 gwr }
643 1.47 gwr
644 1.47 gwr /*
645 1.31 gwr * Polled input char.
646 1.2 glass */
647 1.2 glass int
648 1.31 gwr zs_getc(arg)
649 1.31 gwr void *arg;
650 1.2 glass {
651 1.31 gwr register volatile struct zschan *zc = arg;
652 1.25 gwr register int s, c, rr0;
653 1.2 glass
654 1.2 glass s = splhigh();
655 1.9 gwr /* Wait for a character to arrive. */
656 1.25 gwr do {
657 1.25 gwr rr0 = zc->zc_csr;
658 1.3 gwr ZS_DELAY();
659 1.25 gwr } while ((rr0 & ZSRR0_RX_READY) == 0);
660 1.9 gwr
661 1.2 glass c = zc->zc_data;
662 1.9 gwr ZS_DELAY();
663 1.2 glass splx(s);
664 1.17 gwr
665 1.17 gwr /*
666 1.17 gwr * This is used by the kd driver to read scan codes,
667 1.17 gwr * so don't translate '\r' ==> '\n' here...
668 1.17 gwr */
669 1.2 glass return (c);
670 1.2 glass }
671 1.1 glass
672 1.1 glass /*
673 1.31 gwr * Polled output char.
674 1.1 glass */
675 1.31 gwr void
676 1.31 gwr zs_putc(arg, c)
677 1.31 gwr void *arg;
678 1.1 glass int c;
679 1.1 glass {
680 1.31 gwr register volatile struct zschan *zc = arg;
681 1.25 gwr register int s, rr0;
682 1.1 glass
683 1.9 gwr s = splhigh();
684 1.9 gwr /* Wait for transmitter to become ready. */
685 1.25 gwr do {
686 1.25 gwr rr0 = zc->zc_csr;
687 1.3 gwr ZS_DELAY();
688 1.25 gwr } while ((rr0 & ZSRR0_TX_READY) == 0);
689 1.9 gwr
690 1.1 glass zc->zc_data = c;
691 1.3 gwr ZS_DELAY();
692 1.1 glass splx(s);
693 1.1 glass }
694 1.2 glass
695 1.50 gwr /*****************************************************************/
696 1.50 gwr
697 1.50 gwr static void zscninit __P((struct consdev *));
698 1.50 gwr static int zscngetc __P((dev_t));
699 1.50 gwr static void zscnputc __P((dev_t, int));
700 1.50 gwr
701 1.50 gwr /*
702 1.50 gwr * Console table shared by ttya, ttyb
703 1.50 gwr */
704 1.50 gwr struct consdev consdev_tty = {
705 1.50 gwr nullcnprobe,
706 1.50 gwr zscninit,
707 1.50 gwr zscngetc,
708 1.50 gwr zscnputc,
709 1.50 gwr nullcnpollc,
710 1.60 thorpej NULL,
711 1.50 gwr };
712 1.50 gwr
713 1.50 gwr static void
714 1.50 gwr zscninit(cn)
715 1.50 gwr struct consdev *cn;
716 1.50 gwr {
717 1.50 gwr }
718 1.50 gwr
719 1.50 gwr /*
720 1.50 gwr * Polled console input putchar.
721 1.50 gwr */
722 1.50 gwr static int
723 1.50 gwr zscngetc(dev)
724 1.50 gwr dev_t dev;
725 1.50 gwr {
726 1.50 gwr return (zs_getc(zs_conschan));
727 1.50 gwr }
728 1.50 gwr
729 1.50 gwr /*
730 1.50 gwr * Polled console output putchar.
731 1.50 gwr */
732 1.50 gwr static void
733 1.50 gwr zscnputc(dev, c)
734 1.50 gwr dev_t dev;
735 1.50 gwr int c;
736 1.50 gwr {
737 1.50 gwr zs_putc(zs_conschan, c);
738 1.50 gwr }
739 1.50 gwr
740 1.50 gwr /*****************************************************************/
741 1.50 gwr
742 1.50 gwr static void prom_cninit __P((struct consdev *));
743 1.50 gwr static int prom_cngetc __P((dev_t));
744 1.50 gwr static void prom_cnputc __P((dev_t, int));
745 1.50 gwr
746 1.50 gwr /*
747 1.50 gwr * The console is set to this one initially,
748 1.50 gwr * which lets us use the PROM until consinit()
749 1.50 gwr * is called to select a real console.
750 1.50 gwr */
751 1.50 gwr struct consdev consdev_prom = {
752 1.50 gwr nullcnprobe,
753 1.50 gwr prom_cninit,
754 1.50 gwr prom_cngetc,
755 1.50 gwr prom_cnputc,
756 1.50 gwr nullcnpollc,
757 1.50 gwr };
758 1.50 gwr
759 1.50 gwr /*
760 1.50 gwr * The console table pointer is statically initialized
761 1.50 gwr * to point to the PROM (output only) table, so that
762 1.50 gwr * early calls to printf will work.
763 1.50 gwr */
764 1.50 gwr struct consdev *cn_tab = &consdev_prom;
765 1.50 gwr
766 1.50 gwr void
767 1.50 gwr nullcnprobe(cn)
768 1.50 gwr struct consdev *cn;
769 1.50 gwr {
770 1.50 gwr }
771 1.50 gwr
772 1.50 gwr static void
773 1.50 gwr prom_cninit(cn)
774 1.50 gwr struct consdev *cn;
775 1.50 gwr {
776 1.50 gwr }
777 1.50 gwr
778 1.50 gwr /*
779 1.50 gwr * PROM console input putchar.
780 1.50 gwr * (dummy - this is output only)
781 1.50 gwr */
782 1.50 gwr static int
783 1.50 gwr prom_cngetc(dev)
784 1.50 gwr dev_t dev;
785 1.50 gwr {
786 1.50 gwr return (0);
787 1.50 gwr }
788 1.50 gwr
789 1.50 gwr /*
790 1.50 gwr * PROM console output putchar.
791 1.50 gwr */
792 1.50 gwr static void
793 1.50 gwr prom_cnputc(dev, c)
794 1.50 gwr dev_t dev;
795 1.50 gwr int c;
796 1.50 gwr {
797 1.50 gwr (*romVectorPtr->putChar)(c & 0x7f);
798 1.50 gwr }
799 1.50 gwr
800 1.50 gwr /*****************************************************************/
801 1.50 gwr
802 1.50 gwr extern struct consdev consdev_kd;
803 1.31 gwr
804 1.43 gwr static struct {
805 1.50 gwr int zs_unit, channel;
806 1.50 gwr } zstty_conf[NZS*2] = {
807 1.43 gwr /* XXX: knowledge from the config file here... */
808 1.43 gwr { 1, 0 }, /* ttya */
809 1.43 gwr { 1, 1 }, /* ttyb */
810 1.43 gwr { 0, 0 }, /* ttyc */
811 1.43 gwr { 0, 1 }, /* ttyd */
812 1.43 gwr };
813 1.31 gwr
814 1.47 gwr static char *prom_inSrc_name[] = {
815 1.47 gwr "keyboard/display",
816 1.47 gwr "ttya", "ttyb",
817 1.47 gwr "ttyc", "ttyd" };
818 1.47 gwr
819 1.1 glass /*
820 1.31 gwr * This function replaces sys/dev/cninit.c
821 1.31 gwr * Determine which device is the console using
822 1.38 gwr * the PROM "input source" and "output sink".
823 1.1 glass */
824 1.31 gwr void
825 1.31 gwr cninit()
826 1.1 glass {
827 1.53 gwr struct sunromvec *v;
828 1.31 gwr struct zschan *zc;
829 1.31 gwr struct consdev *cn;
830 1.50 gwr int channel, zs_unit, zstty_unit;
831 1.50 gwr u_char inSource, outSink;
832 1.53 gwr
833 1.53 gwr /* Get the zs driver ready for console duty. */
834 1.53 gwr zs_init();
835 1.31 gwr
836 1.38 gwr v = romVectorPtr;
837 1.50 gwr inSource = *v->inSource;
838 1.50 gwr outSink = *v->outSink;
839 1.50 gwr if (inSource != outSink) {
840 1.38 gwr mon_printf("cninit: mismatched PROM output selector\n");
841 1.38 gwr }
842 1.38 gwr
843 1.38 gwr switch (inSource) {
844 1.47 gwr default:
845 1.47 gwr mon_printf("cninit: invalid inSource=%d\n", inSource);
846 1.47 gwr sunmon_abort();
847 1.47 gwr inSource = 0;
848 1.47 gwr /* fall through */
849 1.47 gwr
850 1.47 gwr case 0: /* keyboard/display */
851 1.47 gwr #if NKBD > 0
852 1.50 gwr zs_unit = 0;
853 1.47 gwr channel = 0;
854 1.47 gwr cn = &consdev_kd;
855 1.47 gwr /* Set cn_dev, cn_pri in kd.c */
856 1.47 gwr break;
857 1.47 gwr #else /* NKBD */
858 1.47 gwr mon_printf("cninit: kdb/display not configured\n");
859 1.47 gwr sunmon_abort();
860 1.47 gwr inSource = 1;
861 1.47 gwr /* fall through */
862 1.47 gwr #endif /* NKBD */
863 1.47 gwr
864 1.38 gwr case 1: /* ttya */
865 1.38 gwr case 2: /* ttyb */
866 1.38 gwr case 3: /* ttyc (rewired keyboard connector) */
867 1.38 gwr case 4: /* ttyd (rewired mouse connector) */
868 1.43 gwr zstty_unit = inSource - 1;
869 1.50 gwr zs_unit = zstty_conf[zstty_unit].zs_unit;
870 1.50 gwr channel = zstty_conf[zstty_unit].channel;
871 1.38 gwr cn = &consdev_tty;
872 1.43 gwr cn->cn_dev = makedev(zs_major, zstty_unit);
873 1.38 gwr cn->cn_pri = CN_REMOTE;
874 1.38 gwr break;
875 1.38 gwr
876 1.1 glass }
877 1.47 gwr /* Now that inSource has been validated, print it. */
878 1.47 gwr mon_printf("console is %s\n", prom_inSrc_name[inSource]);
879 1.1 glass
880 1.50 gwr zc = zs_get_chan_addr(zs_unit, channel);
881 1.31 gwr if (zc == NULL) {
882 1.31 gwr mon_printf("cninit: zs not mapped.\n");
883 1.31 gwr return;
884 1.31 gwr }
885 1.31 gwr zs_conschan = zc;
886 1.50 gwr zs_hwflags[zs_unit][channel] = ZS_HWFLAG_CONSOLE;
887 1.31 gwr cn_tab = cn;
888 1.31 gwr (*cn->cn_init)(cn);
889 1.47 gwr #ifdef KGDB
890 1.47 gwr zs_kgdb_init();
891 1.47 gwr #endif
892 1.1 glass }
893