zs.c revision 1.66 1 1.66 provos /* $NetBSD: zs.c,v 1.66 2002/09/27 15:36:54 provos Exp $ */
2 1.10 cgd
3 1.42 gwr /*-
4 1.42 gwr * Copyright (c) 1996 The NetBSD Foundation, Inc.
5 1.31 gwr * All rights reserved.
6 1.1 glass *
7 1.42 gwr * This code is derived from software contributed to The NetBSD Foundation
8 1.42 gwr * by Gordon W. Ross.
9 1.42 gwr *
10 1.1 glass * Redistribution and use in source and binary forms, with or without
11 1.1 glass * modification, are permitted provided that the following conditions
12 1.1 glass * are met:
13 1.1 glass * 1. Redistributions of source code must retain the above copyright
14 1.1 glass * notice, this list of conditions and the following disclaimer.
15 1.1 glass * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 glass * notice, this list of conditions and the following disclaimer in the
17 1.1 glass * documentation and/or other materials provided with the distribution.
18 1.42 gwr * 3. All advertising materials mentioning features or use of this software
19 1.1 glass * must display the following acknowledgement:
20 1.42 gwr * This product includes software developed by the NetBSD
21 1.42 gwr * Foundation, Inc. and its contributors.
22 1.42 gwr * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.42 gwr * contributors may be used to endorse or promote products derived
24 1.42 gwr * from this software without specific prior written permission.
25 1.1 glass *
26 1.42 gwr * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.42 gwr * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.42 gwr * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.44 gwr * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.44 gwr * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.42 gwr * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.42 gwr * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.42 gwr * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.42 gwr * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.42 gwr * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.42 gwr * POSSIBILITY OF SUCH DAMAGE.
37 1.1 glass */
38 1.1 glass
39 1.1 glass /*
40 1.31 gwr * Zilog Z8530 Dual UART driver (machine-dependent part)
41 1.1 glass *
42 1.31 gwr * Runs two serial lines per chip using slave drivers.
43 1.31 gwr * Plain tty/async lines use the zs_async slave.
44 1.31 gwr * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
45 1.1 glass */
46 1.62 lukem
47 1.62 lukem #include "opt_kgdb.h"
48 1.1 glass
49 1.5 gwr #include <sys/param.h>
50 1.1 glass #include <sys/systm.h>
51 1.43 gwr #include <sys/conf.h>
52 1.1 glass #include <sys/device.h>
53 1.1 glass #include <sys/file.h>
54 1.1 glass #include <sys/ioctl.h>
55 1.43 gwr #include <sys/kernel.h>
56 1.43 gwr #include <sys/proc.h>
57 1.1 glass #include <sys/tty.h>
58 1.1 glass #include <sys/time.h>
59 1.1 glass #include <sys/syslog.h>
60 1.1 glass
61 1.1 glass #include <machine/autoconf.h>
62 1.1 glass #include <machine/cpu.h>
63 1.3 gwr #include <machine/mon.h>
64 1.49 gwr #include <machine/z8530var.h>
65 1.49 gwr
66 1.53 gwr #include <sun3/sun3/machdep.h>
67 1.53 gwr #ifdef _SUN3X_
68 1.53 gwr #include <sun3/sun3x/obio.h>
69 1.53 gwr #else
70 1.53 gwr #include <sun3/sun3/obio.h>
71 1.53 gwr #endif
72 1.53 gwr #include <sun3/dev/zs_cons.h>
73 1.53 gwr
74 1.49 gwr #include <dev/cons.h>
75 1.49 gwr #include <dev/ic/z8530reg.h>
76 1.1 glass
77 1.50 gwr #include "kbd.h" /* NKBD */
78 1.50 gwr #include "zsc.h" /* NZSC */
79 1.50 gwr #define NZS NZSC
80 1.50 gwr
81 1.50 gwr /* Make life easier for the initialized arrays here. */
82 1.50 gwr #if NZS < 2
83 1.50 gwr #undef NZS
84 1.50 gwr #define NZS 2
85 1.50 gwr #endif
86 1.47 gwr
87 1.16 gwr /*
88 1.43 gwr * Some warts needed by z8530tty.c -
89 1.43 gwr * The default parity REALLY needs to be the same as the PROM uses,
90 1.43 gwr * or you can not see messages done with printf during boot-up...
91 1.43 gwr */
92 1.43 gwr int zs_def_cflag = (CREAD | CS8 | HUPCL);
93 1.1 glass
94 1.43 gwr /*
95 1.43 gwr * The Sun3 provides a 4.9152 MHz clock to the ZS chips.
96 1.43 gwr */
97 1.2 glass #define PCLK (9600 * 512) /* PCLK pin input clock rate */
98 1.2 glass
99 1.2 glass /*
100 1.22 gwr * Define interrupt levels.
101 1.2 glass */
102 1.2 glass #define ZSHARD_PRI 6 /* Wired on the CPU board... */
103 1.22 gwr #define ZSSOFT_PRI 3 /* Want tty pri (4) but this is OK. */
104 1.1 glass
105 1.33 gwr #define ZS_DELAY() delay(2)
106 1.31 gwr
107 1.31 gwr /* The layout of this is hardware-dependent (padding, order). */
108 1.31 gwr struct zschan {
109 1.31 gwr volatile u_char zc_csr; /* ctrl,status, and indirect access */
110 1.31 gwr u_char zc_xxx0;
111 1.31 gwr volatile u_char zc_data; /* data */
112 1.31 gwr u_char zc_xxx1;
113 1.31 gwr };
114 1.31 gwr struct zsdevice {
115 1.31 gwr /* Yes, they are backwards. */
116 1.31 gwr struct zschan zs_chan_b;
117 1.31 gwr struct zschan zs_chan_a;
118 1.1 glass };
119 1.1 glass
120 1.1 glass
121 1.31 gwr /* Default OBIO addresses. */
122 1.50 gwr static int zs_physaddr[NZS] = {
123 1.44 gwr OBIO_ZS_KBD_MS,
124 1.44 gwr OBIO_ZS_TTY_AB };
125 1.43 gwr
126 1.31 gwr /* Saved PROM mappings */
127 1.50 gwr static struct zsdevice *zsaddr[NZS];
128 1.43 gwr
129 1.31 gwr /* Flags from cninit() */
130 1.50 gwr static int zs_hwflags[NZS][2];
131 1.43 gwr
132 1.31 gwr /* Default speed for each channel */
133 1.50 gwr static int zs_defspeed[NZS][2] = {
134 1.31 gwr { 1200, /* keyboard */
135 1.31 gwr 1200 }, /* mouse */
136 1.31 gwr { 9600, /* ttya */
137 1.31 gwr 9600 }, /* ttyb */
138 1.31 gwr };
139 1.13 gwr
140 1.43 gwr static u_char zs_init_reg[16] = {
141 1.43 gwr 0, /* 0: CMD (reset, etc.) */
142 1.43 gwr 0, /* 1: No interrupts yet. */
143 1.43 gwr 0x18 + ZSHARD_PRI, /* IVECT */
144 1.43 gwr ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
145 1.43 gwr ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
146 1.43 gwr ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
147 1.43 gwr 0, /* 6: TXSYNC/SYNCLO */
148 1.43 gwr 0, /* 7: RXSYNC/SYNCHI */
149 1.43 gwr 0, /* 8: alias for data port */
150 1.43 gwr ZSWR9_MASTER_IE,
151 1.43 gwr 0, /*10: Misc. TX/RX control bits */
152 1.43 gwr ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
153 1.56 mycroft ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */
154 1.56 mycroft 0, /*13: BAUDHI (default=9600) */
155 1.43 gwr ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
156 1.55 mycroft ZSWR15_BREAK_IE,
157 1.43 gwr };
158 1.43 gwr
159 1.1 glass
160 1.31 gwr /* Find PROM mappings (for console support). */
161 1.43 gwr void
162 1.43 gwr zs_init()
163 1.31 gwr {
164 1.31 gwr int i;
165 1.1 glass
166 1.50 gwr for (i = 0; i < NZS; i++) {
167 1.31 gwr zsaddr[i] = (struct zsdevice *)
168 1.44 gwr obio_find_mapping(zs_physaddr[i], sizeof(struct zschan));
169 1.31 gwr }
170 1.43 gwr }
171 1.13 gwr
172 1.47 gwr struct zschan *
173 1.50 gwr zs_get_chan_addr(zs_unit, channel)
174 1.50 gwr int zs_unit, channel;
175 1.31 gwr {
176 1.31 gwr struct zsdevice *addr;
177 1.31 gwr struct zschan *zc;
178 1.31 gwr
179 1.50 gwr if (zs_unit >= NZS)
180 1.31 gwr return NULL;
181 1.50 gwr addr = zsaddr[zs_unit];
182 1.31 gwr if (addr == NULL)
183 1.31 gwr return NULL;
184 1.31 gwr if (channel == 0) {
185 1.31 gwr zc = &addr->zs_chan_a;
186 1.31 gwr } else {
187 1.31 gwr zc = &addr->zs_chan_b;
188 1.31 gwr }
189 1.31 gwr return (zc);
190 1.31 gwr }
191 1.13 gwr
192 1.18 gwr
193 1.31 gwr /****************************************************************
194 1.31 gwr * Autoconfig
195 1.31 gwr ****************************************************************/
196 1.31 gwr
197 1.31 gwr /* Definition of the driver for autoconfig. */
198 1.50 gwr static int zs_match __P((struct device *, struct cfdata *, void *));
199 1.50 gwr static void zs_attach __P((struct device *, struct device *, void *));
200 1.50 gwr static int zs_print __P((void *, const char *name));
201 1.31 gwr
202 1.34 thorpej struct cfattach zsc_ca = {
203 1.50 gwr sizeof(struct zsc_softc), zs_match, zs_attach
204 1.34 thorpej };
205 1.34 thorpej
206 1.52 thorpej extern struct cfdriver zsc_cd;
207 1.31 gwr
208 1.43 gwr static int zshard __P((void *));
209 1.43 gwr static int zssoft __P((void *));
210 1.43 gwr static int zs_get_speed __P((struct zs_chanstate *));
211 1.31 gwr
212 1.9 gwr
213 1.1 glass /*
214 1.31 gwr * Is the zs chip present?
215 1.1 glass */
216 1.1 glass static int
217 1.50 gwr zs_match(parent, cf, aux)
218 1.31 gwr struct device *parent;
219 1.43 gwr struct cfdata *cf;
220 1.43 gwr void *aux;
221 1.1 glass {
222 1.31 gwr struct confargs *ca = aux;
223 1.61 chs int unit;
224 1.35 gwr void *va;
225 1.13 gwr
226 1.35 gwr /*
227 1.43 gwr * This driver only supports its wired-in mappings,
228 1.43 gwr * because the console support depends on those.
229 1.35 gwr */
230 1.61 chs if (ca->ca_paddr == zs_physaddr[0]) {
231 1.61 chs unit = 0;
232 1.61 chs } else if (ca->ca_paddr == zs_physaddr[1]) {
233 1.61 chs unit = 1;
234 1.61 chs } else {
235 1.35 gwr return (0);
236 1.61 chs }
237 1.35 gwr
238 1.31 gwr /* Make sure zs_init() found mappings. */
239 1.35 gwr va = zsaddr[unit];
240 1.35 gwr if (va == NULL)
241 1.21 gwr return (0);
242 1.21 gwr
243 1.21 gwr /* This returns -1 on a fault (bus error). */
244 1.43 gwr if (peek_byte(va) == -1)
245 1.43 gwr return (0);
246 1.43 gwr
247 1.43 gwr /* Default interrupt priority (always splbio==2) */
248 1.43 gwr if (ca->ca_intpri == -1)
249 1.43 gwr ca->ca_intpri = ZSHARD_PRI;
250 1.43 gwr
251 1.43 gwr return (1);
252 1.1 glass }
253 1.1 glass
254 1.1 glass /*
255 1.1 glass * Attach a found zs.
256 1.1 glass *
257 1.31 gwr * Match slave number to zs unit number, so that misconfiguration will
258 1.31 gwr * not set up the keyboard as ttya, etc.
259 1.1 glass */
260 1.1 glass static void
261 1.50 gwr zs_attach(parent, self, aux)
262 1.31 gwr struct device *parent;
263 1.31 gwr struct device *self;
264 1.31 gwr void *aux;
265 1.31 gwr {
266 1.31 gwr struct zsc_softc *zsc = (void *) self;
267 1.31 gwr struct confargs *ca = aux;
268 1.31 gwr struct zsc_attach_args zsc_args;
269 1.31 gwr volatile struct zschan *zc;
270 1.31 gwr struct zs_chanstate *cs;
271 1.50 gwr int s, zs_unit, channel;
272 1.50 gwr static int didintr;
273 1.2 glass
274 1.50 gwr zs_unit = zsc->zsc_dev.dv_unit;
275 1.13 gwr
276 1.43 gwr printf(": (softpri %d)\n", ZSSOFT_PRI);
277 1.1 glass
278 1.31 gwr /* Use the mapping setup by the Sun PROM. */
279 1.50 gwr if (zsaddr[zs_unit] == NULL)
280 1.66 provos panic("zs_attach: zs%d not mapped", zs_unit);
281 1.31 gwr
282 1.31 gwr /*
283 1.31 gwr * Initialize software state for each channel.
284 1.31 gwr */
285 1.31 gwr for (channel = 0; channel < 2; channel++) {
286 1.43 gwr zsc_args.channel = channel;
287 1.50 gwr zsc_args.hwflags = zs_hwflags[zs_unit][channel];
288 1.43 gwr cs = &zsc->zsc_cs_store[channel];
289 1.43 gwr zsc->zsc_cs[channel] = cs;
290 1.1 glass
291 1.31 gwr cs->cs_channel = channel;
292 1.31 gwr cs->cs_private = NULL;
293 1.31 gwr cs->cs_ops = &zsops_null;
294 1.37 gwr cs->cs_brg_clk = PCLK / 16;
295 1.31 gwr
296 1.50 gwr zc = zs_get_chan_addr(zs_unit, channel);
297 1.43 gwr cs->cs_reg_csr = &zc->zc_csr;
298 1.43 gwr cs->cs_reg_data = &zc->zc_data;
299 1.2 glass
300 1.64 tsutsui memcpy(cs->cs_creg, zs_init_reg, 16);
301 1.64 tsutsui memcpy(cs->cs_preg, zs_init_reg, 16);
302 1.15 gwr
303 1.43 gwr /* XXX: Get these from the EEPROM instead? */
304 1.43 gwr /* XXX: See the mvme167 code. Better. */
305 1.43 gwr if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
306 1.43 gwr cs->cs_defspeed = zs_get_speed(cs);
307 1.43 gwr else
308 1.50 gwr cs->cs_defspeed = zs_defspeed[zs_unit][channel];
309 1.43 gwr cs->cs_defcflag = zs_def_cflag;
310 1.43 gwr
311 1.47 gwr /* Make these correspond to cs_defcflag (-crtscts) */
312 1.46 gwr cs->cs_rr0_dcd = ZSRR0_DCD;
313 1.47 gwr cs->cs_rr0_cts = 0;
314 1.47 gwr cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
315 1.47 gwr cs->cs_wr5_rts = 0;
316 1.46 gwr
317 1.1 glass /*
318 1.31 gwr * Clear the master interrupt enable.
319 1.31 gwr * The INTENA is common to both channels,
320 1.31 gwr * so just do it on the A channel.
321 1.1 glass */
322 1.31 gwr if (channel == 0) {
323 1.32 gwr zs_write_reg(cs, 9, 0);
324 1.31 gwr }
325 1.15 gwr
326 1.1 glass /*
327 1.31 gwr * Look for a child driver for this channel.
328 1.31 gwr * The child attach will setup the hardware.
329 1.1 glass */
330 1.50 gwr if (!config_found(self, (void *)&zsc_args, zs_print)) {
331 1.31 gwr /* No sub-driver. Just reset it. */
332 1.43 gwr u_char reset = (channel == 0) ?
333 1.31 gwr ZSWR9_A_RESET : ZSWR9_B_RESET;
334 1.45 gwr s = splhigh();
335 1.32 gwr zs_write_reg(cs, 9, reset);
336 1.31 gwr splx(s);
337 1.31 gwr }
338 1.1 glass }
339 1.1 glass
340 1.43 gwr /*
341 1.43 gwr * Now safe to install interrupt handlers. Note the arguments
342 1.43 gwr * to the interrupt handlers aren't used. Note, we only do this
343 1.43 gwr * once since both SCCs interrupt at the same level and vector.
344 1.43 gwr */
345 1.50 gwr if (!didintr) {
346 1.50 gwr didintr = 1;
347 1.31 gwr isr_add_autovect(zssoft, NULL, ZSSOFT_PRI);
348 1.43 gwr isr_add_autovect(zshard, NULL, ca->ca_intpri);
349 1.31 gwr }
350 1.50 gwr /* XXX; evcnt_attach() ? */
351 1.24 gwr
352 1.31 gwr /*
353 1.31 gwr * Set the master interrupt enable and interrupt vector.
354 1.31 gwr * (common to both channels, do it on A)
355 1.31 gwr */
356 1.43 gwr cs = zsc->zsc_cs[0];
357 1.45 gwr s = splhigh();
358 1.31 gwr /* interrupt vector */
359 1.32 gwr zs_write_reg(cs, 2, zs_init_reg[2]);
360 1.31 gwr /* master interrupt control (enable) */
361 1.32 gwr zs_write_reg(cs, 9, zs_init_reg[9]);
362 1.31 gwr splx(s);
363 1.45 gwr
364 1.45 gwr /*
365 1.45 gwr * XXX: L1A hack - We would like to be able to break into
366 1.45 gwr * the debugger during the rest of autoconfiguration, so
367 1.45 gwr * lower interrupts just enough to let zs interrupts in.
368 1.50 gwr * This is done after both zs devices are attached.
369 1.45 gwr */
370 1.50 gwr if (zs_unit == 1) {
371 1.45 gwr (void)spl5(); /* splzs - 1 */
372 1.45 gwr }
373 1.35 gwr }
374 1.35 gwr
375 1.35 gwr static int
376 1.50 gwr zs_print(aux, name)
377 1.35 gwr void *aux;
378 1.39 cgd const char *name;
379 1.35 gwr {
380 1.35 gwr struct zsc_attach_args *args = aux;
381 1.35 gwr
382 1.35 gwr if (name != NULL)
383 1.41 christos printf("%s: ", name);
384 1.35 gwr
385 1.35 gwr if (args->channel != -1)
386 1.41 christos printf(" channel %d", args->channel);
387 1.35 gwr
388 1.35 gwr return UNCONF;
389 1.24 gwr }
390 1.24 gwr
391 1.48 gwr static volatile int zssoftpending;
392 1.43 gwr
393 1.43 gwr /*
394 1.43 gwr * Our ZS chips all share a common, autovectored interrupt,
395 1.43 gwr * so we have to look at all of them on each interrupt.
396 1.43 gwr */
397 1.31 gwr static int
398 1.31 gwr zshard(arg)
399 1.31 gwr void *arg;
400 1.1 glass {
401 1.63 tsutsui struct zsc_softc *zsc;
402 1.63 tsutsui int unit, rval, softreq;
403 1.43 gwr
404 1.48 gwr rval = softreq = 0;
405 1.48 gwr for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
406 1.34 thorpej zsc = zsc_cd.cd_devs[unit];
407 1.43 gwr if (zsc == NULL)
408 1.43 gwr continue;
409 1.43 gwr rval |= zsc_intr_hard(zsc);
410 1.48 gwr softreq |= zsc->zsc_cs[0]->cs_softreq;
411 1.48 gwr softreq |= zsc->zsc_cs[1]->cs_softreq;
412 1.48 gwr }
413 1.48 gwr
414 1.48 gwr /* We are at splzs here, so no need to lock. */
415 1.48 gwr if (softreq && (zssoftpending == 0)) {
416 1.48 gwr zssoftpending = ZSSOFT_PRI;
417 1.48 gwr isr_soft_request(ZSSOFT_PRI);
418 1.31 gwr }
419 1.31 gwr return (rval);
420 1.1 glass }
421 1.1 glass
422 1.43 gwr /*
423 1.43 gwr * Similar scheme as for zshard (look at all of them)
424 1.43 gwr */
425 1.3 gwr static int
426 1.31 gwr zssoft(arg)
427 1.31 gwr void *arg;
428 1.3 gwr {
429 1.63 tsutsui struct zsc_softc *zsc;
430 1.63 tsutsui int s, unit;
431 1.31 gwr
432 1.31 gwr /* This is not the only ISR on this IPL. */
433 1.31 gwr if (zssoftpending == 0)
434 1.31 gwr return (0);
435 1.3 gwr
436 1.31 gwr /*
437 1.31 gwr * The soft intr. bit will be set by zshard only if
438 1.31 gwr * the variable zssoftpending is zero. The order of
439 1.31 gwr * these next two statements prevents our clearing
440 1.31 gwr * the soft intr bit just after zshard has set it.
441 1.31 gwr */
442 1.31 gwr isr_soft_clear(ZSSOFT_PRI);
443 1.31 gwr zssoftpending = 0;
444 1.2 glass
445 1.48 gwr /* Make sure we call the tty layer at spltty. */
446 1.48 gwr s = spltty();
447 1.48 gwr for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
448 1.34 thorpej zsc = zsc_cd.cd_devs[unit];
449 1.43 gwr if (zsc == NULL)
450 1.43 gwr continue;
451 1.43 gwr (void) zsc_intr_soft(zsc);
452 1.3 gwr }
453 1.48 gwr splx(s);
454 1.31 gwr return (1);
455 1.2 glass }
456 1.2 glass
457 1.2 glass
458 1.31 gwr /*
459 1.50 gwr * Compute the current baud rate given a ZS channel.
460 1.43 gwr */
461 1.43 gwr static int
462 1.43 gwr zs_get_speed(cs)
463 1.43 gwr struct zs_chanstate *cs;
464 1.43 gwr {
465 1.43 gwr int tconst;
466 1.43 gwr
467 1.43 gwr tconst = zs_read_reg(cs, 12);
468 1.43 gwr tconst |= zs_read_reg(cs, 13) << 8;
469 1.43 gwr return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
470 1.43 gwr }
471 1.43 gwr
472 1.43 gwr /*
473 1.43 gwr * MD functions for setting the baud rate and control modes.
474 1.43 gwr */
475 1.43 gwr int
476 1.43 gwr zs_set_speed(cs, bps)
477 1.43 gwr struct zs_chanstate *cs;
478 1.43 gwr int bps; /* bits per second */
479 1.43 gwr {
480 1.43 gwr int tconst, real_bps;
481 1.43 gwr
482 1.43 gwr if (bps == 0)
483 1.43 gwr return (0);
484 1.43 gwr
485 1.43 gwr #ifdef DIAGNOSTIC
486 1.43 gwr if (cs->cs_brg_clk == 0)
487 1.43 gwr panic("zs_set_speed");
488 1.43 gwr #endif
489 1.43 gwr
490 1.43 gwr tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
491 1.43 gwr if (tconst < 0)
492 1.43 gwr return (EINVAL);
493 1.43 gwr
494 1.43 gwr /* Convert back to make sure we can do it. */
495 1.43 gwr real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
496 1.43 gwr
497 1.43 gwr /* XXX - Allow some tolerance here? */
498 1.43 gwr if (real_bps != bps)
499 1.43 gwr return (EINVAL);
500 1.43 gwr
501 1.43 gwr cs->cs_preg[12] = tconst;
502 1.43 gwr cs->cs_preg[13] = tconst >> 8;
503 1.43 gwr
504 1.43 gwr /* Caller will stuff the pending registers. */
505 1.43 gwr return (0);
506 1.43 gwr }
507 1.43 gwr
508 1.43 gwr int
509 1.43 gwr zs_set_modes(cs, cflag)
510 1.43 gwr struct zs_chanstate *cs;
511 1.43 gwr int cflag; /* bits per second */
512 1.43 gwr {
513 1.43 gwr int s;
514 1.43 gwr
515 1.43 gwr /*
516 1.43 gwr * Output hardware flow control on the chip is horrendous:
517 1.43 gwr * if carrier detect drops, the receiver is disabled, and if
518 1.43 gwr * CTS drops, the transmitter is stoped IN MID CHARACTER!
519 1.43 gwr * Therefore, NEVER set the HFC bit, and instead use the
520 1.43 gwr * status interrupt to detect CTS changes.
521 1.43 gwr */
522 1.43 gwr s = splzs();
523 1.57 wrstuden cs->cs_rr0_pps = 0;
524 1.57 wrstuden if ((cflag & (CLOCAL | MDMBUF)) != 0) {
525 1.43 gwr cs->cs_rr0_dcd = 0;
526 1.57 wrstuden if ((cflag & MDMBUF) == 0)
527 1.57 wrstuden cs->cs_rr0_pps = ZSRR0_DCD;
528 1.57 wrstuden } else
529 1.43 gwr cs->cs_rr0_dcd = ZSRR0_DCD;
530 1.51 mycroft if ((cflag & CRTSCTS) != 0) {
531 1.43 gwr cs->cs_wr5_dtr = ZSWR5_DTR;
532 1.43 gwr cs->cs_wr5_rts = ZSWR5_RTS;
533 1.43 gwr cs->cs_rr0_cts = ZSRR0_CTS;
534 1.51 mycroft } else if ((cflag & MDMBUF) != 0) {
535 1.51 mycroft cs->cs_wr5_dtr = 0;
536 1.51 mycroft cs->cs_wr5_rts = ZSWR5_DTR;
537 1.51 mycroft cs->cs_rr0_cts = ZSRR0_DCD;
538 1.43 gwr } else {
539 1.43 gwr cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
540 1.43 gwr cs->cs_wr5_rts = 0;
541 1.43 gwr cs->cs_rr0_cts = 0;
542 1.43 gwr }
543 1.43 gwr splx(s);
544 1.43 gwr
545 1.43 gwr /* Caller will stuff the pending registers. */
546 1.43 gwr return (0);
547 1.43 gwr }
548 1.43 gwr
549 1.43 gwr
550 1.43 gwr /*
551 1.31 gwr * Read or write the chip with suitable delays.
552 1.31 gwr */
553 1.2 glass
554 1.31 gwr u_char
555 1.31 gwr zs_read_reg(cs, reg)
556 1.31 gwr struct zs_chanstate *cs;
557 1.31 gwr u_char reg;
558 1.1 glass {
559 1.31 gwr u_char val;
560 1.1 glass
561 1.31 gwr *cs->cs_reg_csr = reg;
562 1.31 gwr ZS_DELAY();
563 1.31 gwr val = *cs->cs_reg_csr;
564 1.31 gwr ZS_DELAY();
565 1.31 gwr return val;
566 1.17 gwr }
567 1.3 gwr
568 1.31 gwr void
569 1.31 gwr zs_write_reg(cs, reg, val)
570 1.31 gwr struct zs_chanstate *cs;
571 1.31 gwr u_char reg, val;
572 1.17 gwr {
573 1.31 gwr *cs->cs_reg_csr = reg;
574 1.31 gwr ZS_DELAY();
575 1.31 gwr *cs->cs_reg_csr = val;
576 1.32 gwr ZS_DELAY();
577 1.32 gwr }
578 1.32 gwr
579 1.32 gwr u_char zs_read_csr(cs)
580 1.32 gwr struct zs_chanstate *cs;
581 1.32 gwr {
582 1.63 tsutsui u_char val;
583 1.32 gwr
584 1.43 gwr val = *cs->cs_reg_csr;
585 1.32 gwr ZS_DELAY();
586 1.43 gwr return val;
587 1.32 gwr }
588 1.32 gwr
589 1.43 gwr void zs_write_csr(cs, val)
590 1.32 gwr struct zs_chanstate *cs;
591 1.43 gwr u_char val;
592 1.32 gwr {
593 1.43 gwr *cs->cs_reg_csr = val;
594 1.32 gwr ZS_DELAY();
595 1.32 gwr }
596 1.32 gwr
597 1.43 gwr u_char zs_read_data(cs)
598 1.32 gwr struct zs_chanstate *cs;
599 1.32 gwr {
600 1.63 tsutsui u_char val;
601 1.43 gwr
602 1.43 gwr val = *cs->cs_reg_data;
603 1.32 gwr ZS_DELAY();
604 1.43 gwr return val;
605 1.32 gwr }
606 1.32 gwr
607 1.32 gwr void zs_write_data(cs, val)
608 1.32 gwr struct zs_chanstate *cs;
609 1.32 gwr u_char val;
610 1.32 gwr {
611 1.32 gwr *cs->cs_reg_data = val;
612 1.31 gwr ZS_DELAY();
613 1.1 glass }
614 1.3 gwr
615 1.31 gwr /****************************************************************
616 1.31 gwr * Console support functions (Sun3 specific!)
617 1.43 gwr * Note: this code is allowed to know about the layout of
618 1.43 gwr * the chip registers, and uses that to keep things simple.
619 1.43 gwr * XXX - I think I like the mvme167 code better. -gwr
620 1.31 gwr ****************************************************************/
621 1.1 glass
622 1.43 gwr void *zs_conschan;
623 1.43 gwr
624 1.2 glass /*
625 1.47 gwr * Handle user request to enter kernel debugger.
626 1.47 gwr */
627 1.47 gwr void
628 1.47 gwr zs_abort(cs)
629 1.47 gwr struct zs_chanstate *cs;
630 1.47 gwr {
631 1.63 tsutsui volatile struct zschan *zc = zs_conschan;
632 1.47 gwr int rr0;
633 1.47 gwr
634 1.47 gwr /* Wait for end of break to avoid PROM abort. */
635 1.47 gwr /* XXX - Limit the wait? */
636 1.47 gwr do {
637 1.47 gwr rr0 = zc->zc_csr;
638 1.47 gwr ZS_DELAY();
639 1.47 gwr } while (rr0 & ZSRR0_BREAK);
640 1.47 gwr
641 1.59 jdolecek /* This is always available on the Sun3. */
642 1.47 gwr Debugger();
643 1.47 gwr }
644 1.47 gwr
645 1.47 gwr /*
646 1.31 gwr * Polled input char.
647 1.2 glass */
648 1.2 glass int
649 1.31 gwr zs_getc(arg)
650 1.31 gwr void *arg;
651 1.2 glass {
652 1.63 tsutsui volatile struct zschan *zc = arg;
653 1.63 tsutsui int s, c, rr0;
654 1.2 glass
655 1.2 glass s = splhigh();
656 1.9 gwr /* Wait for a character to arrive. */
657 1.25 gwr do {
658 1.25 gwr rr0 = zc->zc_csr;
659 1.3 gwr ZS_DELAY();
660 1.25 gwr } while ((rr0 & ZSRR0_RX_READY) == 0);
661 1.9 gwr
662 1.2 glass c = zc->zc_data;
663 1.9 gwr ZS_DELAY();
664 1.2 glass splx(s);
665 1.17 gwr
666 1.17 gwr /*
667 1.17 gwr * This is used by the kd driver to read scan codes,
668 1.17 gwr * so don't translate '\r' ==> '\n' here...
669 1.17 gwr */
670 1.2 glass return (c);
671 1.2 glass }
672 1.1 glass
673 1.1 glass /*
674 1.31 gwr * Polled output char.
675 1.1 glass */
676 1.31 gwr void
677 1.31 gwr zs_putc(arg, c)
678 1.31 gwr void *arg;
679 1.1 glass int c;
680 1.1 glass {
681 1.63 tsutsui volatile struct zschan *zc = arg;
682 1.63 tsutsui int s, rr0;
683 1.1 glass
684 1.9 gwr s = splhigh();
685 1.9 gwr /* Wait for transmitter to become ready. */
686 1.25 gwr do {
687 1.25 gwr rr0 = zc->zc_csr;
688 1.3 gwr ZS_DELAY();
689 1.25 gwr } while ((rr0 & ZSRR0_TX_READY) == 0);
690 1.9 gwr
691 1.1 glass zc->zc_data = c;
692 1.3 gwr ZS_DELAY();
693 1.1 glass splx(s);
694 1.1 glass }
695 1.2 glass
696 1.50 gwr /*****************************************************************/
697 1.50 gwr
698 1.50 gwr static void zscninit __P((struct consdev *));
699 1.50 gwr static int zscngetc __P((dev_t));
700 1.50 gwr static void zscnputc __P((dev_t, int));
701 1.50 gwr
702 1.50 gwr /*
703 1.50 gwr * Console table shared by ttya, ttyb
704 1.50 gwr */
705 1.50 gwr struct consdev consdev_tty = {
706 1.50 gwr nullcnprobe,
707 1.50 gwr zscninit,
708 1.50 gwr zscngetc,
709 1.50 gwr zscnputc,
710 1.50 gwr nullcnpollc,
711 1.60 thorpej NULL,
712 1.50 gwr };
713 1.50 gwr
714 1.50 gwr static void
715 1.50 gwr zscninit(cn)
716 1.50 gwr struct consdev *cn;
717 1.50 gwr {
718 1.50 gwr }
719 1.50 gwr
720 1.50 gwr /*
721 1.50 gwr * Polled console input putchar.
722 1.50 gwr */
723 1.50 gwr static int
724 1.50 gwr zscngetc(dev)
725 1.50 gwr dev_t dev;
726 1.50 gwr {
727 1.50 gwr return (zs_getc(zs_conschan));
728 1.50 gwr }
729 1.50 gwr
730 1.50 gwr /*
731 1.50 gwr * Polled console output putchar.
732 1.50 gwr */
733 1.50 gwr static void
734 1.50 gwr zscnputc(dev, c)
735 1.50 gwr dev_t dev;
736 1.50 gwr int c;
737 1.50 gwr {
738 1.50 gwr zs_putc(zs_conschan, c);
739 1.50 gwr }
740 1.50 gwr
741 1.50 gwr /*****************************************************************/
742 1.50 gwr
743 1.50 gwr static void prom_cninit __P((struct consdev *));
744 1.50 gwr static int prom_cngetc __P((dev_t));
745 1.50 gwr static void prom_cnputc __P((dev_t, int));
746 1.50 gwr
747 1.50 gwr /*
748 1.50 gwr * The console is set to this one initially,
749 1.50 gwr * which lets us use the PROM until consinit()
750 1.50 gwr * is called to select a real console.
751 1.50 gwr */
752 1.50 gwr struct consdev consdev_prom = {
753 1.50 gwr nullcnprobe,
754 1.50 gwr prom_cninit,
755 1.50 gwr prom_cngetc,
756 1.50 gwr prom_cnputc,
757 1.50 gwr nullcnpollc,
758 1.50 gwr };
759 1.50 gwr
760 1.50 gwr /*
761 1.50 gwr * The console table pointer is statically initialized
762 1.50 gwr * to point to the PROM (output only) table, so that
763 1.50 gwr * early calls to printf will work.
764 1.50 gwr */
765 1.50 gwr struct consdev *cn_tab = &consdev_prom;
766 1.50 gwr
767 1.50 gwr void
768 1.50 gwr nullcnprobe(cn)
769 1.50 gwr struct consdev *cn;
770 1.50 gwr {
771 1.50 gwr }
772 1.50 gwr
773 1.50 gwr static void
774 1.50 gwr prom_cninit(cn)
775 1.50 gwr struct consdev *cn;
776 1.50 gwr {
777 1.50 gwr }
778 1.50 gwr
779 1.50 gwr /*
780 1.50 gwr * PROM console input putchar.
781 1.50 gwr * (dummy - this is output only)
782 1.50 gwr */
783 1.50 gwr static int
784 1.50 gwr prom_cngetc(dev)
785 1.50 gwr dev_t dev;
786 1.50 gwr {
787 1.50 gwr return (0);
788 1.50 gwr }
789 1.50 gwr
790 1.50 gwr /*
791 1.50 gwr * PROM console output putchar.
792 1.50 gwr */
793 1.50 gwr static void
794 1.50 gwr prom_cnputc(dev, c)
795 1.50 gwr dev_t dev;
796 1.50 gwr int c;
797 1.50 gwr {
798 1.50 gwr (*romVectorPtr->putChar)(c & 0x7f);
799 1.50 gwr }
800 1.50 gwr
801 1.50 gwr /*****************************************************************/
802 1.50 gwr
803 1.50 gwr extern struct consdev consdev_kd;
804 1.31 gwr
805 1.43 gwr static struct {
806 1.50 gwr int zs_unit, channel;
807 1.50 gwr } zstty_conf[NZS*2] = {
808 1.43 gwr /* XXX: knowledge from the config file here... */
809 1.43 gwr { 1, 0 }, /* ttya */
810 1.43 gwr { 1, 1 }, /* ttyb */
811 1.43 gwr { 0, 0 }, /* ttyc */
812 1.43 gwr { 0, 1 }, /* ttyd */
813 1.43 gwr };
814 1.31 gwr
815 1.47 gwr static char *prom_inSrc_name[] = {
816 1.47 gwr "keyboard/display",
817 1.47 gwr "ttya", "ttyb",
818 1.47 gwr "ttyc", "ttyd" };
819 1.47 gwr
820 1.1 glass /*
821 1.31 gwr * This function replaces sys/dev/cninit.c
822 1.31 gwr * Determine which device is the console using
823 1.38 gwr * the PROM "input source" and "output sink".
824 1.1 glass */
825 1.31 gwr void
826 1.31 gwr cninit()
827 1.1 glass {
828 1.53 gwr struct sunromvec *v;
829 1.31 gwr struct zschan *zc;
830 1.31 gwr struct consdev *cn;
831 1.50 gwr int channel, zs_unit, zstty_unit;
832 1.50 gwr u_char inSource, outSink;
833 1.65 gehenna extern const struct cdevsw zstty_cdevsw;
834 1.53 gwr
835 1.53 gwr /* Get the zs driver ready for console duty. */
836 1.53 gwr zs_init();
837 1.31 gwr
838 1.38 gwr v = romVectorPtr;
839 1.50 gwr inSource = *v->inSource;
840 1.50 gwr outSink = *v->outSink;
841 1.50 gwr if (inSource != outSink) {
842 1.38 gwr mon_printf("cninit: mismatched PROM output selector\n");
843 1.38 gwr }
844 1.38 gwr
845 1.38 gwr switch (inSource) {
846 1.47 gwr default:
847 1.47 gwr mon_printf("cninit: invalid inSource=%d\n", inSource);
848 1.47 gwr sunmon_abort();
849 1.47 gwr inSource = 0;
850 1.47 gwr /* fall through */
851 1.47 gwr
852 1.47 gwr case 0: /* keyboard/display */
853 1.47 gwr #if NKBD > 0
854 1.50 gwr zs_unit = 0;
855 1.47 gwr channel = 0;
856 1.47 gwr cn = &consdev_kd;
857 1.47 gwr /* Set cn_dev, cn_pri in kd.c */
858 1.47 gwr break;
859 1.47 gwr #else /* NKBD */
860 1.47 gwr mon_printf("cninit: kdb/display not configured\n");
861 1.47 gwr sunmon_abort();
862 1.47 gwr inSource = 1;
863 1.47 gwr /* fall through */
864 1.47 gwr #endif /* NKBD */
865 1.47 gwr
866 1.38 gwr case 1: /* ttya */
867 1.38 gwr case 2: /* ttyb */
868 1.38 gwr case 3: /* ttyc (rewired keyboard connector) */
869 1.38 gwr case 4: /* ttyd (rewired mouse connector) */
870 1.43 gwr zstty_unit = inSource - 1;
871 1.50 gwr zs_unit = zstty_conf[zstty_unit].zs_unit;
872 1.50 gwr channel = zstty_conf[zstty_unit].channel;
873 1.38 gwr cn = &consdev_tty;
874 1.65 gehenna cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw),
875 1.65 gehenna zstty_unit);
876 1.38 gwr cn->cn_pri = CN_REMOTE;
877 1.38 gwr break;
878 1.38 gwr
879 1.1 glass }
880 1.47 gwr /* Now that inSource has been validated, print it. */
881 1.47 gwr mon_printf("console is %s\n", prom_inSrc_name[inSource]);
882 1.1 glass
883 1.50 gwr zc = zs_get_chan_addr(zs_unit, channel);
884 1.31 gwr if (zc == NULL) {
885 1.31 gwr mon_printf("cninit: zs not mapped.\n");
886 1.31 gwr return;
887 1.31 gwr }
888 1.31 gwr zs_conschan = zc;
889 1.50 gwr zs_hwflags[zs_unit][channel] = ZS_HWFLAG_CONSOLE;
890 1.31 gwr cn_tab = cn;
891 1.31 gwr (*cn->cn_init)(cn);
892 1.47 gwr #ifdef KGDB
893 1.47 gwr zs_kgdb_init();
894 1.47 gwr #endif
895 1.1 glass }
896