zs.c revision 1.76 1 1.76 thorpej /* $NetBSD: zs.c,v 1.76 2006/03/28 17:38:28 thorpej Exp $ */
2 1.10 cgd
3 1.42 gwr /*-
4 1.42 gwr * Copyright (c) 1996 The NetBSD Foundation, Inc.
5 1.31 gwr * All rights reserved.
6 1.1 glass *
7 1.42 gwr * This code is derived from software contributed to The NetBSD Foundation
8 1.42 gwr * by Gordon W. Ross.
9 1.42 gwr *
10 1.1 glass * Redistribution and use in source and binary forms, with or without
11 1.1 glass * modification, are permitted provided that the following conditions
12 1.1 glass * are met:
13 1.1 glass * 1. Redistributions of source code must retain the above copyright
14 1.1 glass * notice, this list of conditions and the following disclaimer.
15 1.1 glass * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 glass * notice, this list of conditions and the following disclaimer in the
17 1.1 glass * documentation and/or other materials provided with the distribution.
18 1.42 gwr * 3. All advertising materials mentioning features or use of this software
19 1.1 glass * must display the following acknowledgement:
20 1.42 gwr * This product includes software developed by the NetBSD
21 1.42 gwr * Foundation, Inc. and its contributors.
22 1.42 gwr * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.42 gwr * contributors may be used to endorse or promote products derived
24 1.42 gwr * from this software without specific prior written permission.
25 1.1 glass *
26 1.42 gwr * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.42 gwr * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.42 gwr * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.44 gwr * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.44 gwr * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.42 gwr * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.42 gwr * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.42 gwr * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.42 gwr * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.42 gwr * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.42 gwr * POSSIBILITY OF SUCH DAMAGE.
37 1.1 glass */
38 1.1 glass
39 1.1 glass /*
40 1.31 gwr * Zilog Z8530 Dual UART driver (machine-dependent part)
41 1.1 glass *
42 1.31 gwr * Runs two serial lines per chip using slave drivers.
43 1.31 gwr * Plain tty/async lines use the zs_async slave.
44 1.31 gwr * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
45 1.1 glass */
46 1.72 lukem
47 1.72 lukem #include <sys/cdefs.h>
48 1.76 thorpej __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.76 2006/03/28 17:38:28 thorpej Exp $");
49 1.62 lukem
50 1.62 lukem #include "opt_kgdb.h"
51 1.1 glass
52 1.5 gwr #include <sys/param.h>
53 1.1 glass #include <sys/systm.h>
54 1.43 gwr #include <sys/conf.h>
55 1.1 glass #include <sys/device.h>
56 1.1 glass #include <sys/file.h>
57 1.1 glass #include <sys/ioctl.h>
58 1.43 gwr #include <sys/kernel.h>
59 1.43 gwr #include <sys/proc.h>
60 1.1 glass #include <sys/tty.h>
61 1.1 glass #include <sys/time.h>
62 1.1 glass #include <sys/syslog.h>
63 1.1 glass
64 1.1 glass #include <machine/autoconf.h>
65 1.1 glass #include <machine/cpu.h>
66 1.3 gwr #include <machine/mon.h>
67 1.49 gwr #include <machine/z8530var.h>
68 1.49 gwr
69 1.53 gwr #include <sun3/sun3/machdep.h>
70 1.53 gwr #ifdef _SUN3X_
71 1.53 gwr #include <sun3/sun3x/obio.h>
72 1.53 gwr #else
73 1.53 gwr #include <sun3/sun3/obio.h>
74 1.53 gwr #endif
75 1.53 gwr #include <sun3/dev/zs_cons.h>
76 1.53 gwr
77 1.49 gwr #include <dev/cons.h>
78 1.49 gwr #include <dev/ic/z8530reg.h>
79 1.1 glass
80 1.50 gwr #include "kbd.h" /* NKBD */
81 1.50 gwr #include "zsc.h" /* NZSC */
82 1.50 gwr #define NZS NZSC
83 1.50 gwr
84 1.50 gwr /* Make life easier for the initialized arrays here. */
85 1.50 gwr #if NZS < 2
86 1.50 gwr #undef NZS
87 1.50 gwr #define NZS 2
88 1.50 gwr #endif
89 1.47 gwr
90 1.16 gwr /*
91 1.43 gwr * Some warts needed by z8530tty.c -
92 1.43 gwr * The default parity REALLY needs to be the same as the PROM uses,
93 1.43 gwr * or you can not see messages done with printf during boot-up...
94 1.43 gwr */
95 1.43 gwr int zs_def_cflag = (CREAD | CS8 | HUPCL);
96 1.1 glass
97 1.43 gwr /*
98 1.43 gwr * The Sun3 provides a 4.9152 MHz clock to the ZS chips.
99 1.43 gwr */
100 1.2 glass #define PCLK (9600 * 512) /* PCLK pin input clock rate */
101 1.2 glass
102 1.2 glass /*
103 1.22 gwr * Define interrupt levels.
104 1.2 glass */
105 1.2 glass #define ZSHARD_PRI 6 /* Wired on the CPU board... */
106 1.22 gwr #define ZSSOFT_PRI 3 /* Want tty pri (4) but this is OK. */
107 1.1 glass
108 1.33 gwr #define ZS_DELAY() delay(2)
109 1.31 gwr
110 1.31 gwr /* The layout of this is hardware-dependent (padding, order). */
111 1.31 gwr struct zschan {
112 1.31 gwr volatile u_char zc_csr; /* ctrl,status, and indirect access */
113 1.31 gwr u_char zc_xxx0;
114 1.31 gwr volatile u_char zc_data; /* data */
115 1.31 gwr u_char zc_xxx1;
116 1.31 gwr };
117 1.31 gwr struct zsdevice {
118 1.31 gwr /* Yes, they are backwards. */
119 1.31 gwr struct zschan zs_chan_b;
120 1.31 gwr struct zschan zs_chan_a;
121 1.1 glass };
122 1.1 glass
123 1.1 glass
124 1.31 gwr /* Default OBIO addresses. */
125 1.50 gwr static int zs_physaddr[NZS] = {
126 1.44 gwr OBIO_ZS_KBD_MS,
127 1.44 gwr OBIO_ZS_TTY_AB };
128 1.43 gwr
129 1.31 gwr /* Saved PROM mappings */
130 1.50 gwr static struct zsdevice *zsaddr[NZS];
131 1.43 gwr
132 1.31 gwr /* Flags from cninit() */
133 1.50 gwr static int zs_hwflags[NZS][2];
134 1.43 gwr
135 1.31 gwr /* Default speed for each channel */
136 1.50 gwr static int zs_defspeed[NZS][2] = {
137 1.31 gwr { 1200, /* keyboard */
138 1.31 gwr 1200 }, /* mouse */
139 1.31 gwr { 9600, /* ttya */
140 1.31 gwr 9600 }, /* ttyb */
141 1.31 gwr };
142 1.13 gwr
143 1.43 gwr static u_char zs_init_reg[16] = {
144 1.43 gwr 0, /* 0: CMD (reset, etc.) */
145 1.43 gwr 0, /* 1: No interrupts yet. */
146 1.43 gwr 0x18 + ZSHARD_PRI, /* IVECT */
147 1.43 gwr ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
148 1.43 gwr ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
149 1.43 gwr ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
150 1.43 gwr 0, /* 6: TXSYNC/SYNCLO */
151 1.43 gwr 0, /* 7: RXSYNC/SYNCHI */
152 1.43 gwr 0, /* 8: alias for data port */
153 1.43 gwr ZSWR9_MASTER_IE,
154 1.43 gwr 0, /*10: Misc. TX/RX control bits */
155 1.43 gwr ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
156 1.56 mycroft ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */
157 1.56 mycroft 0, /*13: BAUDHI (default=9600) */
158 1.43 gwr ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
159 1.55 mycroft ZSWR15_BREAK_IE,
160 1.43 gwr };
161 1.43 gwr
162 1.1 glass
163 1.31 gwr /* Find PROM mappings (for console support). */
164 1.73 chs void
165 1.73 chs zs_init(void)
166 1.31 gwr {
167 1.31 gwr int i;
168 1.1 glass
169 1.50 gwr for (i = 0; i < NZS; i++) {
170 1.31 gwr zsaddr[i] = (struct zsdevice *)
171 1.44 gwr obio_find_mapping(zs_physaddr[i], sizeof(struct zschan));
172 1.31 gwr }
173 1.43 gwr }
174 1.13 gwr
175 1.47 gwr struct zschan *
176 1.73 chs zs_get_chan_addr(int zs_unit, int channel)
177 1.31 gwr {
178 1.31 gwr struct zsdevice *addr;
179 1.31 gwr struct zschan *zc;
180 1.31 gwr
181 1.50 gwr if (zs_unit >= NZS)
182 1.31 gwr return NULL;
183 1.50 gwr addr = zsaddr[zs_unit];
184 1.31 gwr if (addr == NULL)
185 1.31 gwr return NULL;
186 1.31 gwr if (channel == 0) {
187 1.31 gwr zc = &addr->zs_chan_a;
188 1.31 gwr } else {
189 1.31 gwr zc = &addr->zs_chan_b;
190 1.31 gwr }
191 1.31 gwr return (zc);
192 1.31 gwr }
193 1.13 gwr
194 1.18 gwr
195 1.31 gwr /****************************************************************
196 1.31 gwr * Autoconfig
197 1.31 gwr ****************************************************************/
198 1.31 gwr
199 1.31 gwr /* Definition of the driver for autoconfig. */
200 1.73 chs static int zs_match(struct device *, struct cfdata *, void *);
201 1.73 chs static void zs_attach(struct device *, struct device *, void *);
202 1.73 chs static int zs_print(void *, const char *);
203 1.31 gwr
204 1.68 thorpej CFATTACH_DECL(zsc, sizeof(struct zsc_softc),
205 1.69 thorpej zs_match, zs_attach, NULL, NULL);
206 1.34 thorpej
207 1.52 thorpej extern struct cfdriver zsc_cd;
208 1.31 gwr
209 1.73 chs static int zshard(void *);
210 1.73 chs static int zssoft(void *);
211 1.73 chs static int zs_get_speed(struct zs_chanstate *);
212 1.31 gwr
213 1.9 gwr
214 1.1 glass /*
215 1.31 gwr * Is the zs chip present?
216 1.1 glass */
217 1.73 chs static int
218 1.73 chs zs_match(struct device *parent, struct cfdata *cf, void *aux)
219 1.1 glass {
220 1.31 gwr struct confargs *ca = aux;
221 1.61 chs int unit;
222 1.35 gwr void *va;
223 1.13 gwr
224 1.35 gwr /*
225 1.43 gwr * This driver only supports its wired-in mappings,
226 1.43 gwr * because the console support depends on those.
227 1.35 gwr */
228 1.61 chs if (ca->ca_paddr == zs_physaddr[0]) {
229 1.61 chs unit = 0;
230 1.61 chs } else if (ca->ca_paddr == zs_physaddr[1]) {
231 1.61 chs unit = 1;
232 1.61 chs } else {
233 1.35 gwr return (0);
234 1.61 chs }
235 1.35 gwr
236 1.31 gwr /* Make sure zs_init() found mappings. */
237 1.35 gwr va = zsaddr[unit];
238 1.35 gwr if (va == NULL)
239 1.21 gwr return (0);
240 1.21 gwr
241 1.21 gwr /* This returns -1 on a fault (bus error). */
242 1.43 gwr if (peek_byte(va) == -1)
243 1.43 gwr return (0);
244 1.43 gwr
245 1.43 gwr /* Default interrupt priority (always splbio==2) */
246 1.43 gwr if (ca->ca_intpri == -1)
247 1.43 gwr ca->ca_intpri = ZSHARD_PRI;
248 1.43 gwr
249 1.43 gwr return (1);
250 1.1 glass }
251 1.1 glass
252 1.1 glass /*
253 1.1 glass * Attach a found zs.
254 1.1 glass *
255 1.31 gwr * Match slave number to zs unit number, so that misconfiguration will
256 1.31 gwr * not set up the keyboard as ttya, etc.
257 1.1 glass */
258 1.73 chs static void
259 1.73 chs zs_attach(struct device *parent, struct device *self, void *aux)
260 1.31 gwr {
261 1.31 gwr struct zsc_softc *zsc = (void *) self;
262 1.31 gwr struct confargs *ca = aux;
263 1.31 gwr struct zsc_attach_args zsc_args;
264 1.31 gwr volatile struct zschan *zc;
265 1.31 gwr struct zs_chanstate *cs;
266 1.50 gwr int s, zs_unit, channel;
267 1.50 gwr static int didintr;
268 1.2 glass
269 1.76 thorpej zs_unit = device_unit(&zsc->zsc_dev);
270 1.13 gwr
271 1.43 gwr printf(": (softpri %d)\n", ZSSOFT_PRI);
272 1.1 glass
273 1.31 gwr /* Use the mapping setup by the Sun PROM. */
274 1.50 gwr if (zsaddr[zs_unit] == NULL)
275 1.66 provos panic("zs_attach: zs%d not mapped", zs_unit);
276 1.31 gwr
277 1.31 gwr /*
278 1.31 gwr * Initialize software state for each channel.
279 1.31 gwr */
280 1.31 gwr for (channel = 0; channel < 2; channel++) {
281 1.43 gwr zsc_args.channel = channel;
282 1.50 gwr zsc_args.hwflags = zs_hwflags[zs_unit][channel];
283 1.43 gwr cs = &zsc->zsc_cs_store[channel];
284 1.43 gwr zsc->zsc_cs[channel] = cs;
285 1.1 glass
286 1.71 pk simple_lock_init(&cs->cs_lock);
287 1.31 gwr cs->cs_channel = channel;
288 1.31 gwr cs->cs_private = NULL;
289 1.31 gwr cs->cs_ops = &zsops_null;
290 1.37 gwr cs->cs_brg_clk = PCLK / 16;
291 1.31 gwr
292 1.50 gwr zc = zs_get_chan_addr(zs_unit, channel);
293 1.43 gwr cs->cs_reg_csr = &zc->zc_csr;
294 1.43 gwr cs->cs_reg_data = &zc->zc_data;
295 1.2 glass
296 1.64 tsutsui memcpy(cs->cs_creg, zs_init_reg, 16);
297 1.64 tsutsui memcpy(cs->cs_preg, zs_init_reg, 16);
298 1.15 gwr
299 1.43 gwr /* XXX: Get these from the EEPROM instead? */
300 1.43 gwr /* XXX: See the mvme167 code. Better. */
301 1.43 gwr if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
302 1.43 gwr cs->cs_defspeed = zs_get_speed(cs);
303 1.43 gwr else
304 1.50 gwr cs->cs_defspeed = zs_defspeed[zs_unit][channel];
305 1.43 gwr cs->cs_defcflag = zs_def_cflag;
306 1.43 gwr
307 1.47 gwr /* Make these correspond to cs_defcflag (-crtscts) */
308 1.46 gwr cs->cs_rr0_dcd = ZSRR0_DCD;
309 1.47 gwr cs->cs_rr0_cts = 0;
310 1.47 gwr cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
311 1.47 gwr cs->cs_wr5_rts = 0;
312 1.46 gwr
313 1.1 glass /*
314 1.31 gwr * Clear the master interrupt enable.
315 1.31 gwr * The INTENA is common to both channels,
316 1.31 gwr * so just do it on the A channel.
317 1.1 glass */
318 1.31 gwr if (channel == 0) {
319 1.32 gwr zs_write_reg(cs, 9, 0);
320 1.31 gwr }
321 1.15 gwr
322 1.1 glass /*
323 1.31 gwr * Look for a child driver for this channel.
324 1.31 gwr * The child attach will setup the hardware.
325 1.1 glass */
326 1.50 gwr if (!config_found(self, (void *)&zsc_args, zs_print)) {
327 1.31 gwr /* No sub-driver. Just reset it. */
328 1.43 gwr u_char reset = (channel == 0) ?
329 1.31 gwr ZSWR9_A_RESET : ZSWR9_B_RESET;
330 1.45 gwr s = splhigh();
331 1.32 gwr zs_write_reg(cs, 9, reset);
332 1.31 gwr splx(s);
333 1.31 gwr }
334 1.1 glass }
335 1.1 glass
336 1.43 gwr /*
337 1.43 gwr * Now safe to install interrupt handlers. Note the arguments
338 1.43 gwr * to the interrupt handlers aren't used. Note, we only do this
339 1.43 gwr * once since both SCCs interrupt at the same level and vector.
340 1.43 gwr */
341 1.50 gwr if (!didintr) {
342 1.50 gwr didintr = 1;
343 1.31 gwr isr_add_autovect(zssoft, NULL, ZSSOFT_PRI);
344 1.43 gwr isr_add_autovect(zshard, NULL, ca->ca_intpri);
345 1.31 gwr }
346 1.50 gwr /* XXX; evcnt_attach() ? */
347 1.24 gwr
348 1.31 gwr /*
349 1.31 gwr * Set the master interrupt enable and interrupt vector.
350 1.31 gwr * (common to both channels, do it on A)
351 1.31 gwr */
352 1.43 gwr cs = zsc->zsc_cs[0];
353 1.45 gwr s = splhigh();
354 1.31 gwr /* interrupt vector */
355 1.32 gwr zs_write_reg(cs, 2, zs_init_reg[2]);
356 1.31 gwr /* master interrupt control (enable) */
357 1.32 gwr zs_write_reg(cs, 9, zs_init_reg[9]);
358 1.31 gwr splx(s);
359 1.45 gwr
360 1.45 gwr /*
361 1.45 gwr * XXX: L1A hack - We would like to be able to break into
362 1.45 gwr * the debugger during the rest of autoconfiguration, so
363 1.45 gwr * lower interrupts just enough to let zs interrupts in.
364 1.50 gwr * This is done after both zs devices are attached.
365 1.45 gwr */
366 1.50 gwr if (zs_unit == 1) {
367 1.45 gwr (void)spl5(); /* splzs - 1 */
368 1.45 gwr }
369 1.35 gwr }
370 1.35 gwr
371 1.73 chs static int
372 1.73 chs zs_print(void *aux, const char *name)
373 1.35 gwr {
374 1.35 gwr struct zsc_attach_args *args = aux;
375 1.35 gwr
376 1.35 gwr if (name != NULL)
377 1.70 thorpej aprint_normal("%s: ", name);
378 1.35 gwr
379 1.35 gwr if (args->channel != -1)
380 1.70 thorpej aprint_normal(" channel %d", args->channel);
381 1.35 gwr
382 1.35 gwr return UNCONF;
383 1.24 gwr }
384 1.24 gwr
385 1.48 gwr static volatile int zssoftpending;
386 1.43 gwr
387 1.43 gwr /*
388 1.43 gwr * Our ZS chips all share a common, autovectored interrupt,
389 1.43 gwr * so we have to look at all of them on each interrupt.
390 1.43 gwr */
391 1.73 chs static int
392 1.73 chs zshard(void *arg)
393 1.1 glass {
394 1.63 tsutsui struct zsc_softc *zsc;
395 1.63 tsutsui int unit, rval, softreq;
396 1.43 gwr
397 1.48 gwr rval = softreq = 0;
398 1.48 gwr for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
399 1.34 thorpej zsc = zsc_cd.cd_devs[unit];
400 1.43 gwr if (zsc == NULL)
401 1.43 gwr continue;
402 1.43 gwr rval |= zsc_intr_hard(zsc);
403 1.48 gwr softreq |= zsc->zsc_cs[0]->cs_softreq;
404 1.48 gwr softreq |= zsc->zsc_cs[1]->cs_softreq;
405 1.48 gwr }
406 1.48 gwr
407 1.48 gwr /* We are at splzs here, so no need to lock. */
408 1.48 gwr if (softreq && (zssoftpending == 0)) {
409 1.48 gwr zssoftpending = ZSSOFT_PRI;
410 1.48 gwr isr_soft_request(ZSSOFT_PRI);
411 1.31 gwr }
412 1.31 gwr return (rval);
413 1.1 glass }
414 1.1 glass
415 1.43 gwr /*
416 1.43 gwr * Similar scheme as for zshard (look at all of them)
417 1.43 gwr */
418 1.73 chs static int
419 1.73 chs zssoft(void *arg)
420 1.3 gwr {
421 1.63 tsutsui struct zsc_softc *zsc;
422 1.63 tsutsui int s, unit;
423 1.31 gwr
424 1.31 gwr /* This is not the only ISR on this IPL. */
425 1.31 gwr if (zssoftpending == 0)
426 1.31 gwr return (0);
427 1.3 gwr
428 1.31 gwr /*
429 1.31 gwr * The soft intr. bit will be set by zshard only if
430 1.31 gwr * the variable zssoftpending is zero. The order of
431 1.31 gwr * these next two statements prevents our clearing
432 1.31 gwr * the soft intr bit just after zshard has set it.
433 1.31 gwr */
434 1.31 gwr isr_soft_clear(ZSSOFT_PRI);
435 1.31 gwr zssoftpending = 0;
436 1.2 glass
437 1.48 gwr /* Make sure we call the tty layer at spltty. */
438 1.48 gwr s = spltty();
439 1.48 gwr for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
440 1.34 thorpej zsc = zsc_cd.cd_devs[unit];
441 1.43 gwr if (zsc == NULL)
442 1.43 gwr continue;
443 1.43 gwr (void) zsc_intr_soft(zsc);
444 1.3 gwr }
445 1.48 gwr splx(s);
446 1.31 gwr return (1);
447 1.2 glass }
448 1.2 glass
449 1.2 glass
450 1.31 gwr /*
451 1.50 gwr * Compute the current baud rate given a ZS channel.
452 1.43 gwr */
453 1.73 chs static int
454 1.73 chs zs_get_speed(struct zs_chanstate *cs)
455 1.43 gwr {
456 1.43 gwr int tconst;
457 1.43 gwr
458 1.43 gwr tconst = zs_read_reg(cs, 12);
459 1.43 gwr tconst |= zs_read_reg(cs, 13) << 8;
460 1.43 gwr return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
461 1.43 gwr }
462 1.43 gwr
463 1.43 gwr /*
464 1.43 gwr * MD functions for setting the baud rate and control modes.
465 1.43 gwr */
466 1.73 chs int
467 1.73 chs zs_set_speed(struct zs_chanstate *cs, int bps)
468 1.43 gwr {
469 1.43 gwr int tconst, real_bps;
470 1.43 gwr
471 1.43 gwr if (bps == 0)
472 1.43 gwr return (0);
473 1.43 gwr
474 1.43 gwr #ifdef DIAGNOSTIC
475 1.43 gwr if (cs->cs_brg_clk == 0)
476 1.43 gwr panic("zs_set_speed");
477 1.43 gwr #endif
478 1.43 gwr
479 1.43 gwr tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
480 1.43 gwr if (tconst < 0)
481 1.43 gwr return (EINVAL);
482 1.43 gwr
483 1.43 gwr /* Convert back to make sure we can do it. */
484 1.43 gwr real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
485 1.43 gwr
486 1.43 gwr /* XXX - Allow some tolerance here? */
487 1.43 gwr if (real_bps != bps)
488 1.43 gwr return (EINVAL);
489 1.43 gwr
490 1.43 gwr cs->cs_preg[12] = tconst;
491 1.43 gwr cs->cs_preg[13] = tconst >> 8;
492 1.43 gwr
493 1.43 gwr /* Caller will stuff the pending registers. */
494 1.43 gwr return (0);
495 1.43 gwr }
496 1.43 gwr
497 1.73 chs int
498 1.73 chs zs_set_modes(struct zs_chanstate *cs, int cflag /* bits per second */)
499 1.43 gwr {
500 1.43 gwr int s;
501 1.43 gwr
502 1.43 gwr /*
503 1.43 gwr * Output hardware flow control on the chip is horrendous:
504 1.43 gwr * if carrier detect drops, the receiver is disabled, and if
505 1.43 gwr * CTS drops, the transmitter is stoped IN MID CHARACTER!
506 1.43 gwr * Therefore, NEVER set the HFC bit, and instead use the
507 1.43 gwr * status interrupt to detect CTS changes.
508 1.43 gwr */
509 1.43 gwr s = splzs();
510 1.57 wrstuden cs->cs_rr0_pps = 0;
511 1.57 wrstuden if ((cflag & (CLOCAL | MDMBUF)) != 0) {
512 1.43 gwr cs->cs_rr0_dcd = 0;
513 1.57 wrstuden if ((cflag & MDMBUF) == 0)
514 1.57 wrstuden cs->cs_rr0_pps = ZSRR0_DCD;
515 1.57 wrstuden } else
516 1.43 gwr cs->cs_rr0_dcd = ZSRR0_DCD;
517 1.51 mycroft if ((cflag & CRTSCTS) != 0) {
518 1.43 gwr cs->cs_wr5_dtr = ZSWR5_DTR;
519 1.43 gwr cs->cs_wr5_rts = ZSWR5_RTS;
520 1.43 gwr cs->cs_rr0_cts = ZSRR0_CTS;
521 1.51 mycroft } else if ((cflag & MDMBUF) != 0) {
522 1.51 mycroft cs->cs_wr5_dtr = 0;
523 1.51 mycroft cs->cs_wr5_rts = ZSWR5_DTR;
524 1.51 mycroft cs->cs_rr0_cts = ZSRR0_DCD;
525 1.43 gwr } else {
526 1.43 gwr cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
527 1.43 gwr cs->cs_wr5_rts = 0;
528 1.43 gwr cs->cs_rr0_cts = 0;
529 1.43 gwr }
530 1.43 gwr splx(s);
531 1.43 gwr
532 1.43 gwr /* Caller will stuff the pending registers. */
533 1.43 gwr return (0);
534 1.43 gwr }
535 1.43 gwr
536 1.43 gwr
537 1.43 gwr /*
538 1.31 gwr * Read or write the chip with suitable delays.
539 1.31 gwr */
540 1.2 glass
541 1.31 gwr u_char
542 1.73 chs zs_read_reg(struct zs_chanstate *cs, u_char reg)
543 1.1 glass {
544 1.31 gwr u_char val;
545 1.1 glass
546 1.31 gwr *cs->cs_reg_csr = reg;
547 1.31 gwr ZS_DELAY();
548 1.31 gwr val = *cs->cs_reg_csr;
549 1.31 gwr ZS_DELAY();
550 1.31 gwr return val;
551 1.17 gwr }
552 1.3 gwr
553 1.31 gwr void
554 1.73 chs zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val)
555 1.17 gwr {
556 1.31 gwr *cs->cs_reg_csr = reg;
557 1.31 gwr ZS_DELAY();
558 1.31 gwr *cs->cs_reg_csr = val;
559 1.32 gwr ZS_DELAY();
560 1.32 gwr }
561 1.32 gwr
562 1.73 chs u_char
563 1.73 chs zs_read_csr(struct zs_chanstate *cs)
564 1.32 gwr {
565 1.63 tsutsui u_char val;
566 1.32 gwr
567 1.43 gwr val = *cs->cs_reg_csr;
568 1.32 gwr ZS_DELAY();
569 1.43 gwr return val;
570 1.32 gwr }
571 1.32 gwr
572 1.73 chs void
573 1.73 chs zs_write_csr(struct zs_chanstate *cs, u_char val)
574 1.32 gwr {
575 1.43 gwr *cs->cs_reg_csr = val;
576 1.32 gwr ZS_DELAY();
577 1.32 gwr }
578 1.32 gwr
579 1.73 chs u_char
580 1.73 chs zs_read_data(struct zs_chanstate *cs)
581 1.32 gwr {
582 1.63 tsutsui u_char val;
583 1.43 gwr
584 1.43 gwr val = *cs->cs_reg_data;
585 1.32 gwr ZS_DELAY();
586 1.43 gwr return val;
587 1.32 gwr }
588 1.32 gwr
589 1.73 chs void
590 1.73 chs zs_write_data(struct zs_chanstate *cs, u_char val)
591 1.32 gwr {
592 1.32 gwr *cs->cs_reg_data = val;
593 1.31 gwr ZS_DELAY();
594 1.1 glass }
595 1.3 gwr
596 1.31 gwr /****************************************************************
597 1.31 gwr * Console support functions (Sun3 specific!)
598 1.43 gwr * Note: this code is allowed to know about the layout of
599 1.43 gwr * the chip registers, and uses that to keep things simple.
600 1.43 gwr * XXX - I think I like the mvme167 code better. -gwr
601 1.31 gwr ****************************************************************/
602 1.1 glass
603 1.43 gwr void *zs_conschan;
604 1.43 gwr
605 1.2 glass /*
606 1.47 gwr * Handle user request to enter kernel debugger.
607 1.47 gwr */
608 1.73 chs void
609 1.73 chs zs_abort(struct zs_chanstate *cs)
610 1.47 gwr {
611 1.63 tsutsui volatile struct zschan *zc = zs_conschan;
612 1.47 gwr int rr0;
613 1.47 gwr
614 1.47 gwr /* Wait for end of break to avoid PROM abort. */
615 1.47 gwr /* XXX - Limit the wait? */
616 1.47 gwr do {
617 1.47 gwr rr0 = zc->zc_csr;
618 1.47 gwr ZS_DELAY();
619 1.47 gwr } while (rr0 & ZSRR0_BREAK);
620 1.47 gwr
621 1.59 jdolecek /* This is always available on the Sun3. */
622 1.47 gwr Debugger();
623 1.47 gwr }
624 1.47 gwr
625 1.47 gwr /*
626 1.31 gwr * Polled input char.
627 1.2 glass */
628 1.73 chs int
629 1.73 chs zs_getc(void *arg)
630 1.2 glass {
631 1.63 tsutsui volatile struct zschan *zc = arg;
632 1.63 tsutsui int s, c, rr0;
633 1.2 glass
634 1.2 glass s = splhigh();
635 1.9 gwr /* Wait for a character to arrive. */
636 1.25 gwr do {
637 1.25 gwr rr0 = zc->zc_csr;
638 1.3 gwr ZS_DELAY();
639 1.25 gwr } while ((rr0 & ZSRR0_RX_READY) == 0);
640 1.9 gwr
641 1.2 glass c = zc->zc_data;
642 1.9 gwr ZS_DELAY();
643 1.2 glass splx(s);
644 1.17 gwr
645 1.17 gwr /*
646 1.17 gwr * This is used by the kd driver to read scan codes,
647 1.17 gwr * so don't translate '\r' ==> '\n' here...
648 1.17 gwr */
649 1.2 glass return (c);
650 1.2 glass }
651 1.1 glass
652 1.1 glass /*
653 1.31 gwr * Polled output char.
654 1.1 glass */
655 1.73 chs void
656 1.73 chs zs_putc(void *arg, int c)
657 1.1 glass {
658 1.63 tsutsui volatile struct zschan *zc = arg;
659 1.63 tsutsui int s, rr0;
660 1.1 glass
661 1.9 gwr s = splhigh();
662 1.9 gwr /* Wait for transmitter to become ready. */
663 1.25 gwr do {
664 1.25 gwr rr0 = zc->zc_csr;
665 1.3 gwr ZS_DELAY();
666 1.25 gwr } while ((rr0 & ZSRR0_TX_READY) == 0);
667 1.9 gwr
668 1.1 glass zc->zc_data = c;
669 1.3 gwr ZS_DELAY();
670 1.1 glass splx(s);
671 1.1 glass }
672 1.2 glass
673 1.50 gwr /*****************************************************************/
674 1.50 gwr
675 1.73 chs static void zscninit(struct consdev *);
676 1.73 chs static int zscngetc(dev_t);
677 1.73 chs static void zscnputc(dev_t, int);
678 1.50 gwr
679 1.50 gwr /*
680 1.50 gwr * Console table shared by ttya, ttyb
681 1.50 gwr */
682 1.50 gwr struct consdev consdev_tty = {
683 1.50 gwr nullcnprobe,
684 1.50 gwr zscninit,
685 1.50 gwr zscngetc,
686 1.50 gwr zscnputc,
687 1.50 gwr nullcnpollc,
688 1.60 thorpej NULL,
689 1.50 gwr };
690 1.50 gwr
691 1.73 chs static void
692 1.73 chs zscninit(struct consdev *cn)
693 1.50 gwr {
694 1.50 gwr }
695 1.50 gwr
696 1.50 gwr /*
697 1.50 gwr * Polled console input putchar.
698 1.50 gwr */
699 1.73 chs static int
700 1.73 chs zscngetc(dev_t dev)
701 1.50 gwr {
702 1.50 gwr return (zs_getc(zs_conschan));
703 1.50 gwr }
704 1.50 gwr
705 1.50 gwr /*
706 1.50 gwr * Polled console output putchar.
707 1.50 gwr */
708 1.73 chs static void
709 1.73 chs zscnputc(dev_t dev, int c)
710 1.50 gwr {
711 1.50 gwr zs_putc(zs_conschan, c);
712 1.50 gwr }
713 1.50 gwr
714 1.50 gwr /*****************************************************************/
715 1.50 gwr
716 1.73 chs static void prom_cninit(struct consdev *);
717 1.73 chs static int prom_cngetc(dev_t);
718 1.73 chs static void prom_cnputc(dev_t, int);
719 1.50 gwr
720 1.50 gwr /*
721 1.50 gwr * The console is set to this one initially,
722 1.50 gwr * which lets us use the PROM until consinit()
723 1.50 gwr * is called to select a real console.
724 1.50 gwr */
725 1.50 gwr struct consdev consdev_prom = {
726 1.50 gwr nullcnprobe,
727 1.50 gwr prom_cninit,
728 1.50 gwr prom_cngetc,
729 1.50 gwr prom_cnputc,
730 1.50 gwr nullcnpollc,
731 1.50 gwr };
732 1.50 gwr
733 1.50 gwr /*
734 1.50 gwr * The console table pointer is statically initialized
735 1.50 gwr * to point to the PROM (output only) table, so that
736 1.50 gwr * early calls to printf will work.
737 1.50 gwr */
738 1.50 gwr struct consdev *cn_tab = &consdev_prom;
739 1.50 gwr
740 1.73 chs void
741 1.73 chs nullcnprobe(struct consdev *cn)
742 1.50 gwr {
743 1.50 gwr }
744 1.50 gwr
745 1.73 chs static void
746 1.73 chs prom_cninit(struct consdev *cn)
747 1.50 gwr {
748 1.50 gwr }
749 1.50 gwr
750 1.50 gwr /*
751 1.50 gwr * PROM console input putchar.
752 1.50 gwr * (dummy - this is output only)
753 1.50 gwr */
754 1.73 chs static int
755 1.73 chs prom_cngetc(dev_t dev)
756 1.50 gwr {
757 1.50 gwr return (0);
758 1.50 gwr }
759 1.50 gwr
760 1.50 gwr /*
761 1.50 gwr * PROM console output putchar.
762 1.50 gwr */
763 1.73 chs static void
764 1.73 chs prom_cnputc(dev_t dev, int c)
765 1.50 gwr {
766 1.50 gwr (*romVectorPtr->putChar)(c & 0x7f);
767 1.50 gwr }
768 1.50 gwr
769 1.50 gwr /*****************************************************************/
770 1.50 gwr
771 1.50 gwr extern struct consdev consdev_kd;
772 1.31 gwr
773 1.43 gwr static struct {
774 1.50 gwr int zs_unit, channel;
775 1.50 gwr } zstty_conf[NZS*2] = {
776 1.43 gwr /* XXX: knowledge from the config file here... */
777 1.43 gwr { 1, 0 }, /* ttya */
778 1.43 gwr { 1, 1 }, /* ttyb */
779 1.43 gwr { 0, 0 }, /* ttyc */
780 1.43 gwr { 0, 1 }, /* ttyd */
781 1.43 gwr };
782 1.31 gwr
783 1.74 tsutsui static const char *prom_inSrc_name[] = {
784 1.47 gwr "keyboard/display",
785 1.47 gwr "ttya", "ttyb",
786 1.47 gwr "ttyc", "ttyd" };
787 1.47 gwr
788 1.1 glass /*
789 1.31 gwr * This function replaces sys/dev/cninit.c
790 1.31 gwr * Determine which device is the console using
791 1.38 gwr * the PROM "input source" and "output sink".
792 1.1 glass */
793 1.73 chs void
794 1.73 chs cninit(void)
795 1.1 glass {
796 1.53 gwr struct sunromvec *v;
797 1.31 gwr struct zschan *zc;
798 1.31 gwr struct consdev *cn;
799 1.50 gwr int channel, zs_unit, zstty_unit;
800 1.50 gwr u_char inSource, outSink;
801 1.65 gehenna extern const struct cdevsw zstty_cdevsw;
802 1.53 gwr
803 1.53 gwr /* Get the zs driver ready for console duty. */
804 1.53 gwr zs_init();
805 1.31 gwr
806 1.38 gwr v = romVectorPtr;
807 1.50 gwr inSource = *v->inSource;
808 1.50 gwr outSink = *v->outSink;
809 1.50 gwr if (inSource != outSink) {
810 1.38 gwr mon_printf("cninit: mismatched PROM output selector\n");
811 1.38 gwr }
812 1.38 gwr
813 1.38 gwr switch (inSource) {
814 1.47 gwr default:
815 1.47 gwr mon_printf("cninit: invalid inSource=%d\n", inSource);
816 1.47 gwr sunmon_abort();
817 1.47 gwr inSource = 0;
818 1.47 gwr /* fall through */
819 1.47 gwr
820 1.47 gwr case 0: /* keyboard/display */
821 1.47 gwr #if NKBD > 0
822 1.50 gwr zs_unit = 0;
823 1.47 gwr channel = 0;
824 1.47 gwr cn = &consdev_kd;
825 1.47 gwr /* Set cn_dev, cn_pri in kd.c */
826 1.47 gwr break;
827 1.47 gwr #else /* NKBD */
828 1.47 gwr mon_printf("cninit: kdb/display not configured\n");
829 1.47 gwr sunmon_abort();
830 1.47 gwr inSource = 1;
831 1.47 gwr /* fall through */
832 1.47 gwr #endif /* NKBD */
833 1.47 gwr
834 1.38 gwr case 1: /* ttya */
835 1.38 gwr case 2: /* ttyb */
836 1.38 gwr case 3: /* ttyc (rewired keyboard connector) */
837 1.38 gwr case 4: /* ttyd (rewired mouse connector) */
838 1.43 gwr zstty_unit = inSource - 1;
839 1.50 gwr zs_unit = zstty_conf[zstty_unit].zs_unit;
840 1.50 gwr channel = zstty_conf[zstty_unit].channel;
841 1.38 gwr cn = &consdev_tty;
842 1.65 gehenna cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw),
843 1.65 gehenna zstty_unit);
844 1.38 gwr cn->cn_pri = CN_REMOTE;
845 1.38 gwr break;
846 1.38 gwr
847 1.1 glass }
848 1.47 gwr /* Now that inSource has been validated, print it. */
849 1.47 gwr mon_printf("console is %s\n", prom_inSrc_name[inSource]);
850 1.1 glass
851 1.50 gwr zc = zs_get_chan_addr(zs_unit, channel);
852 1.31 gwr if (zc == NULL) {
853 1.31 gwr mon_printf("cninit: zs not mapped.\n");
854 1.31 gwr return;
855 1.31 gwr }
856 1.31 gwr zs_conschan = zc;
857 1.50 gwr zs_hwflags[zs_unit][channel] = ZS_HWFLAG_CONSOLE;
858 1.31 gwr cn_tab = cn;
859 1.31 gwr (*cn->cn_init)(cn);
860 1.47 gwr #ifdef KGDB
861 1.47 gwr zs_kgdb_init();
862 1.47 gwr #endif
863 1.1 glass }
864