zs.c revision 1.78 1 1.78 tsutsui /* $NetBSD: zs.c,v 1.78 2006/10/05 14:46:11 tsutsui Exp $ */
2 1.10 cgd
3 1.42 gwr /*-
4 1.42 gwr * Copyright (c) 1996 The NetBSD Foundation, Inc.
5 1.31 gwr * All rights reserved.
6 1.1 glass *
7 1.42 gwr * This code is derived from software contributed to The NetBSD Foundation
8 1.42 gwr * by Gordon W. Ross.
9 1.42 gwr *
10 1.1 glass * Redistribution and use in source and binary forms, with or without
11 1.1 glass * modification, are permitted provided that the following conditions
12 1.1 glass * are met:
13 1.1 glass * 1. Redistributions of source code must retain the above copyright
14 1.1 glass * notice, this list of conditions and the following disclaimer.
15 1.1 glass * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 glass * notice, this list of conditions and the following disclaimer in the
17 1.1 glass * documentation and/or other materials provided with the distribution.
18 1.42 gwr * 3. All advertising materials mentioning features or use of this software
19 1.1 glass * must display the following acknowledgement:
20 1.42 gwr * This product includes software developed by the NetBSD
21 1.42 gwr * Foundation, Inc. and its contributors.
22 1.42 gwr * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.42 gwr * contributors may be used to endorse or promote products derived
24 1.42 gwr * from this software without specific prior written permission.
25 1.1 glass *
26 1.42 gwr * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.42 gwr * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.42 gwr * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.44 gwr * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.44 gwr * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.42 gwr * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.42 gwr * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.42 gwr * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.42 gwr * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.42 gwr * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.42 gwr * POSSIBILITY OF SUCH DAMAGE.
37 1.1 glass */
38 1.1 glass
39 1.1 glass /*
40 1.31 gwr * Zilog Z8530 Dual UART driver (machine-dependent part)
41 1.1 glass *
42 1.31 gwr * Runs two serial lines per chip using slave drivers.
43 1.31 gwr * Plain tty/async lines use the zs_async slave.
44 1.31 gwr * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
45 1.1 glass */
46 1.72 lukem
47 1.72 lukem #include <sys/cdefs.h>
48 1.78 tsutsui __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.78 2006/10/05 14:46:11 tsutsui Exp $");
49 1.62 lukem
50 1.62 lukem #include "opt_kgdb.h"
51 1.1 glass
52 1.5 gwr #include <sys/param.h>
53 1.1 glass #include <sys/systm.h>
54 1.43 gwr #include <sys/conf.h>
55 1.1 glass #include <sys/device.h>
56 1.1 glass #include <sys/file.h>
57 1.1 glass #include <sys/ioctl.h>
58 1.43 gwr #include <sys/kernel.h>
59 1.43 gwr #include <sys/proc.h>
60 1.1 glass #include <sys/tty.h>
61 1.1 glass #include <sys/time.h>
62 1.1 glass #include <sys/syslog.h>
63 1.1 glass
64 1.77 tsutsui #include <uvm/uvm_extern.h>
65 1.77 tsutsui
66 1.1 glass #include <machine/autoconf.h>
67 1.1 glass #include <machine/cpu.h>
68 1.3 gwr #include <machine/mon.h>
69 1.49 gwr #include <machine/z8530var.h>
70 1.49 gwr
71 1.53 gwr #include <sun3/sun3/machdep.h>
72 1.53 gwr #ifdef _SUN3X_
73 1.53 gwr #include <sun3/sun3x/obio.h>
74 1.53 gwr #else
75 1.53 gwr #include <sun3/sun3/obio.h>
76 1.53 gwr #endif
77 1.53 gwr #include <sun3/dev/zs_cons.h>
78 1.53 gwr
79 1.49 gwr #include <dev/cons.h>
80 1.49 gwr #include <dev/ic/z8530reg.h>
81 1.1 glass
82 1.50 gwr #include "kbd.h" /* NKBD */
83 1.50 gwr #include "zsc.h" /* NZSC */
84 1.50 gwr #define NZS NZSC
85 1.50 gwr
86 1.50 gwr /* Make life easier for the initialized arrays here. */
87 1.50 gwr #if NZS < 2
88 1.50 gwr #undef NZS
89 1.50 gwr #define NZS 2
90 1.50 gwr #endif
91 1.47 gwr
92 1.16 gwr /*
93 1.43 gwr * Some warts needed by z8530tty.c -
94 1.43 gwr * The default parity REALLY needs to be the same as the PROM uses,
95 1.43 gwr * or you can not see messages done with printf during boot-up...
96 1.43 gwr */
97 1.43 gwr int zs_def_cflag = (CREAD | CS8 | HUPCL);
98 1.1 glass
99 1.43 gwr /*
100 1.43 gwr * The Sun3 provides a 4.9152 MHz clock to the ZS chips.
101 1.43 gwr */
102 1.2 glass #define PCLK (9600 * 512) /* PCLK pin input clock rate */
103 1.2 glass
104 1.2 glass /*
105 1.22 gwr * Define interrupt levels.
106 1.2 glass */
107 1.2 glass #define ZSHARD_PRI 6 /* Wired on the CPU board... */
108 1.78 tsutsui #define ZSSOFT_PRI _IPL_SOFT_LEVEL3 /* Want tty pri (4) but this is OK. */
109 1.1 glass
110 1.33 gwr #define ZS_DELAY() delay(2)
111 1.31 gwr
112 1.31 gwr /* The layout of this is hardware-dependent (padding, order). */
113 1.31 gwr struct zschan {
114 1.31 gwr volatile u_char zc_csr; /* ctrl,status, and indirect access */
115 1.31 gwr u_char zc_xxx0;
116 1.31 gwr volatile u_char zc_data; /* data */
117 1.31 gwr u_char zc_xxx1;
118 1.31 gwr };
119 1.31 gwr struct zsdevice {
120 1.31 gwr /* Yes, they are backwards. */
121 1.31 gwr struct zschan zs_chan_b;
122 1.31 gwr struct zschan zs_chan_a;
123 1.1 glass };
124 1.1 glass
125 1.1 glass
126 1.31 gwr /* Default OBIO addresses. */
127 1.50 gwr static int zs_physaddr[NZS] = {
128 1.44 gwr OBIO_ZS_KBD_MS,
129 1.44 gwr OBIO_ZS_TTY_AB };
130 1.43 gwr
131 1.31 gwr /* Saved PROM mappings */
132 1.50 gwr static struct zsdevice *zsaddr[NZS];
133 1.43 gwr
134 1.31 gwr /* Flags from cninit() */
135 1.50 gwr static int zs_hwflags[NZS][2];
136 1.43 gwr
137 1.31 gwr /* Default speed for each channel */
138 1.50 gwr static int zs_defspeed[NZS][2] = {
139 1.31 gwr { 1200, /* keyboard */
140 1.31 gwr 1200 }, /* mouse */
141 1.31 gwr { 9600, /* ttya */
142 1.31 gwr 9600 }, /* ttyb */
143 1.31 gwr };
144 1.13 gwr
145 1.43 gwr static u_char zs_init_reg[16] = {
146 1.43 gwr 0, /* 0: CMD (reset, etc.) */
147 1.43 gwr 0, /* 1: No interrupts yet. */
148 1.43 gwr 0x18 + ZSHARD_PRI, /* IVECT */
149 1.43 gwr ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
150 1.43 gwr ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
151 1.43 gwr ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
152 1.43 gwr 0, /* 6: TXSYNC/SYNCLO */
153 1.43 gwr 0, /* 7: RXSYNC/SYNCHI */
154 1.43 gwr 0, /* 8: alias for data port */
155 1.43 gwr ZSWR9_MASTER_IE,
156 1.43 gwr 0, /*10: Misc. TX/RX control bits */
157 1.43 gwr ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
158 1.56 mycroft ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */
159 1.56 mycroft 0, /*13: BAUDHI (default=9600) */
160 1.43 gwr ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
161 1.55 mycroft ZSWR15_BREAK_IE,
162 1.43 gwr };
163 1.43 gwr
164 1.1 glass
165 1.31 gwr /* Find PROM mappings (for console support). */
166 1.73 chs void
167 1.73 chs zs_init(void)
168 1.31 gwr {
169 1.77 tsutsui vaddr_t va;
170 1.31 gwr int i;
171 1.1 glass
172 1.50 gwr for (i = 0; i < NZS; i++) {
173 1.77 tsutsui if (find_prom_map(zs_physaddr[i], PMAP_OBIO,
174 1.77 tsutsui sizeof(struct zschan), &va) == 0)
175 1.77 tsutsui zsaddr[i] = (void *)va;
176 1.31 gwr }
177 1.43 gwr }
178 1.13 gwr
179 1.47 gwr struct zschan *
180 1.73 chs zs_get_chan_addr(int zs_unit, int channel)
181 1.31 gwr {
182 1.31 gwr struct zsdevice *addr;
183 1.31 gwr struct zschan *zc;
184 1.31 gwr
185 1.50 gwr if (zs_unit >= NZS)
186 1.31 gwr return NULL;
187 1.50 gwr addr = zsaddr[zs_unit];
188 1.31 gwr if (addr == NULL)
189 1.31 gwr return NULL;
190 1.31 gwr if (channel == 0) {
191 1.31 gwr zc = &addr->zs_chan_a;
192 1.31 gwr } else {
193 1.31 gwr zc = &addr->zs_chan_b;
194 1.31 gwr }
195 1.31 gwr return (zc);
196 1.31 gwr }
197 1.13 gwr
198 1.18 gwr
199 1.31 gwr /****************************************************************
200 1.31 gwr * Autoconfig
201 1.31 gwr ****************************************************************/
202 1.31 gwr
203 1.31 gwr /* Definition of the driver for autoconfig. */
204 1.73 chs static int zs_match(struct device *, struct cfdata *, void *);
205 1.73 chs static void zs_attach(struct device *, struct device *, void *);
206 1.73 chs static int zs_print(void *, const char *);
207 1.31 gwr
208 1.68 thorpej CFATTACH_DECL(zsc, sizeof(struct zsc_softc),
209 1.69 thorpej zs_match, zs_attach, NULL, NULL);
210 1.34 thorpej
211 1.52 thorpej extern struct cfdriver zsc_cd;
212 1.31 gwr
213 1.73 chs static int zshard(void *);
214 1.78 tsutsui static void zssoft(void *);
215 1.73 chs static int zs_get_speed(struct zs_chanstate *);
216 1.31 gwr
217 1.9 gwr
218 1.1 glass /*
219 1.31 gwr * Is the zs chip present?
220 1.1 glass */
221 1.73 chs static int
222 1.73 chs zs_match(struct device *parent, struct cfdata *cf, void *aux)
223 1.1 glass {
224 1.31 gwr struct confargs *ca = aux;
225 1.61 chs int unit;
226 1.35 gwr void *va;
227 1.13 gwr
228 1.35 gwr /*
229 1.43 gwr * This driver only supports its wired-in mappings,
230 1.43 gwr * because the console support depends on those.
231 1.35 gwr */
232 1.61 chs if (ca->ca_paddr == zs_physaddr[0]) {
233 1.61 chs unit = 0;
234 1.61 chs } else if (ca->ca_paddr == zs_physaddr[1]) {
235 1.61 chs unit = 1;
236 1.61 chs } else {
237 1.35 gwr return (0);
238 1.61 chs }
239 1.35 gwr
240 1.31 gwr /* Make sure zs_init() found mappings. */
241 1.35 gwr va = zsaddr[unit];
242 1.35 gwr if (va == NULL)
243 1.21 gwr return (0);
244 1.21 gwr
245 1.21 gwr /* This returns -1 on a fault (bus error). */
246 1.43 gwr if (peek_byte(va) == -1)
247 1.43 gwr return (0);
248 1.43 gwr
249 1.43 gwr /* Default interrupt priority (always splbio==2) */
250 1.43 gwr if (ca->ca_intpri == -1)
251 1.43 gwr ca->ca_intpri = ZSHARD_PRI;
252 1.43 gwr
253 1.43 gwr return (1);
254 1.1 glass }
255 1.1 glass
256 1.1 glass /*
257 1.1 glass * Attach a found zs.
258 1.1 glass *
259 1.31 gwr * Match slave number to zs unit number, so that misconfiguration will
260 1.31 gwr * not set up the keyboard as ttya, etc.
261 1.1 glass */
262 1.73 chs static void
263 1.73 chs zs_attach(struct device *parent, struct device *self, void *aux)
264 1.31 gwr {
265 1.31 gwr struct zsc_softc *zsc = (void *) self;
266 1.31 gwr struct confargs *ca = aux;
267 1.31 gwr struct zsc_attach_args zsc_args;
268 1.31 gwr volatile struct zschan *zc;
269 1.31 gwr struct zs_chanstate *cs;
270 1.50 gwr int s, zs_unit, channel;
271 1.50 gwr static int didintr;
272 1.2 glass
273 1.76 thorpej zs_unit = device_unit(&zsc->zsc_dev);
274 1.13 gwr
275 1.43 gwr printf(": (softpri %d)\n", ZSSOFT_PRI);
276 1.1 glass
277 1.31 gwr /* Use the mapping setup by the Sun PROM. */
278 1.50 gwr if (zsaddr[zs_unit] == NULL)
279 1.66 provos panic("zs_attach: zs%d not mapped", zs_unit);
280 1.31 gwr
281 1.31 gwr /*
282 1.31 gwr * Initialize software state for each channel.
283 1.31 gwr */
284 1.31 gwr for (channel = 0; channel < 2; channel++) {
285 1.43 gwr zsc_args.channel = channel;
286 1.50 gwr zsc_args.hwflags = zs_hwflags[zs_unit][channel];
287 1.43 gwr cs = &zsc->zsc_cs_store[channel];
288 1.43 gwr zsc->zsc_cs[channel] = cs;
289 1.1 glass
290 1.71 pk simple_lock_init(&cs->cs_lock);
291 1.31 gwr cs->cs_channel = channel;
292 1.31 gwr cs->cs_private = NULL;
293 1.31 gwr cs->cs_ops = &zsops_null;
294 1.37 gwr cs->cs_brg_clk = PCLK / 16;
295 1.31 gwr
296 1.50 gwr zc = zs_get_chan_addr(zs_unit, channel);
297 1.43 gwr cs->cs_reg_csr = &zc->zc_csr;
298 1.43 gwr cs->cs_reg_data = &zc->zc_data;
299 1.2 glass
300 1.64 tsutsui memcpy(cs->cs_creg, zs_init_reg, 16);
301 1.64 tsutsui memcpy(cs->cs_preg, zs_init_reg, 16);
302 1.15 gwr
303 1.43 gwr /* XXX: Get these from the EEPROM instead? */
304 1.43 gwr /* XXX: See the mvme167 code. Better. */
305 1.43 gwr if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
306 1.43 gwr cs->cs_defspeed = zs_get_speed(cs);
307 1.43 gwr else
308 1.50 gwr cs->cs_defspeed = zs_defspeed[zs_unit][channel];
309 1.43 gwr cs->cs_defcflag = zs_def_cflag;
310 1.43 gwr
311 1.47 gwr /* Make these correspond to cs_defcflag (-crtscts) */
312 1.46 gwr cs->cs_rr0_dcd = ZSRR0_DCD;
313 1.47 gwr cs->cs_rr0_cts = 0;
314 1.47 gwr cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
315 1.47 gwr cs->cs_wr5_rts = 0;
316 1.46 gwr
317 1.1 glass /*
318 1.31 gwr * Clear the master interrupt enable.
319 1.31 gwr * The INTENA is common to both channels,
320 1.31 gwr * so just do it on the A channel.
321 1.1 glass */
322 1.31 gwr if (channel == 0) {
323 1.32 gwr zs_write_reg(cs, 9, 0);
324 1.31 gwr }
325 1.15 gwr
326 1.1 glass /*
327 1.31 gwr * Look for a child driver for this channel.
328 1.31 gwr * The child attach will setup the hardware.
329 1.1 glass */
330 1.50 gwr if (!config_found(self, (void *)&zsc_args, zs_print)) {
331 1.31 gwr /* No sub-driver. Just reset it. */
332 1.43 gwr u_char reset = (channel == 0) ?
333 1.31 gwr ZSWR9_A_RESET : ZSWR9_B_RESET;
334 1.45 gwr s = splhigh();
335 1.32 gwr zs_write_reg(cs, 9, reset);
336 1.31 gwr splx(s);
337 1.31 gwr }
338 1.1 glass }
339 1.1 glass
340 1.43 gwr /*
341 1.43 gwr * Now safe to install interrupt handlers. Note the arguments
342 1.43 gwr * to the interrupt handlers aren't used. Note, we only do this
343 1.43 gwr * once since both SCCs interrupt at the same level and vector.
344 1.43 gwr */
345 1.50 gwr if (!didintr) {
346 1.50 gwr didintr = 1;
347 1.43 gwr isr_add_autovect(zshard, NULL, ca->ca_intpri);
348 1.31 gwr }
349 1.78 tsutsui zsc->zs_si = softintr_establish(IPL_SOFTSERIAL, zssoft, zsc);
350 1.50 gwr /* XXX; evcnt_attach() ? */
351 1.24 gwr
352 1.31 gwr /*
353 1.31 gwr * Set the master interrupt enable and interrupt vector.
354 1.31 gwr * (common to both channels, do it on A)
355 1.31 gwr */
356 1.43 gwr cs = zsc->zsc_cs[0];
357 1.45 gwr s = splhigh();
358 1.31 gwr /* interrupt vector */
359 1.32 gwr zs_write_reg(cs, 2, zs_init_reg[2]);
360 1.31 gwr /* master interrupt control (enable) */
361 1.32 gwr zs_write_reg(cs, 9, zs_init_reg[9]);
362 1.31 gwr splx(s);
363 1.45 gwr
364 1.45 gwr /*
365 1.45 gwr * XXX: L1A hack - We would like to be able to break into
366 1.45 gwr * the debugger during the rest of autoconfiguration, so
367 1.45 gwr * lower interrupts just enough to let zs interrupts in.
368 1.50 gwr * This is done after both zs devices are attached.
369 1.45 gwr */
370 1.50 gwr if (zs_unit == 1) {
371 1.45 gwr (void)spl5(); /* splzs - 1 */
372 1.45 gwr }
373 1.35 gwr }
374 1.35 gwr
375 1.73 chs static int
376 1.73 chs zs_print(void *aux, const char *name)
377 1.35 gwr {
378 1.35 gwr struct zsc_attach_args *args = aux;
379 1.35 gwr
380 1.35 gwr if (name != NULL)
381 1.70 thorpej aprint_normal("%s: ", name);
382 1.35 gwr
383 1.35 gwr if (args->channel != -1)
384 1.70 thorpej aprint_normal(" channel %d", args->channel);
385 1.35 gwr
386 1.35 gwr return UNCONF;
387 1.24 gwr }
388 1.24 gwr
389 1.43 gwr /*
390 1.43 gwr * Our ZS chips all share a common, autovectored interrupt,
391 1.43 gwr * so we have to look at all of them on each interrupt.
392 1.43 gwr */
393 1.73 chs static int
394 1.73 chs zshard(void *arg)
395 1.1 glass {
396 1.63 tsutsui struct zsc_softc *zsc;
397 1.63 tsutsui int unit, rval, softreq;
398 1.43 gwr
399 1.78 tsutsui rval = 0;
400 1.48 gwr for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
401 1.34 thorpej zsc = zsc_cd.cd_devs[unit];
402 1.43 gwr if (zsc == NULL)
403 1.43 gwr continue;
404 1.43 gwr rval |= zsc_intr_hard(zsc);
405 1.78 tsutsui softreq = zsc->zsc_cs[0]->cs_softreq;
406 1.48 gwr softreq |= zsc->zsc_cs[1]->cs_softreq;
407 1.78 tsutsui if (softreq)
408 1.78 tsutsui softintr_schedule(zsc->zs_si);
409 1.48 gwr }
410 1.48 gwr
411 1.31 gwr return (rval);
412 1.1 glass }
413 1.1 glass
414 1.43 gwr /*
415 1.43 gwr * Similar scheme as for zshard (look at all of them)
416 1.43 gwr */
417 1.78 tsutsui static void
418 1.73 chs zssoft(void *arg)
419 1.3 gwr {
420 1.78 tsutsui struct zsc_softc *zsc = arg;
421 1.78 tsutsui int s;
422 1.2 glass
423 1.48 gwr /* Make sure we call the tty layer at spltty. */
424 1.48 gwr s = spltty();
425 1.78 tsutsui (void)zsc_intr_soft(zsc);
426 1.48 gwr splx(s);
427 1.2 glass }
428 1.2 glass
429 1.2 glass
430 1.31 gwr /*
431 1.50 gwr * Compute the current baud rate given a ZS channel.
432 1.43 gwr */
433 1.73 chs static int
434 1.73 chs zs_get_speed(struct zs_chanstate *cs)
435 1.43 gwr {
436 1.43 gwr int tconst;
437 1.43 gwr
438 1.43 gwr tconst = zs_read_reg(cs, 12);
439 1.43 gwr tconst |= zs_read_reg(cs, 13) << 8;
440 1.43 gwr return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
441 1.43 gwr }
442 1.43 gwr
443 1.43 gwr /*
444 1.43 gwr * MD functions for setting the baud rate and control modes.
445 1.43 gwr */
446 1.73 chs int
447 1.73 chs zs_set_speed(struct zs_chanstate *cs, int bps)
448 1.43 gwr {
449 1.43 gwr int tconst, real_bps;
450 1.43 gwr
451 1.43 gwr if (bps == 0)
452 1.43 gwr return (0);
453 1.43 gwr
454 1.43 gwr #ifdef DIAGNOSTIC
455 1.43 gwr if (cs->cs_brg_clk == 0)
456 1.43 gwr panic("zs_set_speed");
457 1.43 gwr #endif
458 1.43 gwr
459 1.43 gwr tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
460 1.43 gwr if (tconst < 0)
461 1.43 gwr return (EINVAL);
462 1.43 gwr
463 1.43 gwr /* Convert back to make sure we can do it. */
464 1.43 gwr real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
465 1.43 gwr
466 1.43 gwr /* XXX - Allow some tolerance here? */
467 1.43 gwr if (real_bps != bps)
468 1.43 gwr return (EINVAL);
469 1.43 gwr
470 1.43 gwr cs->cs_preg[12] = tconst;
471 1.43 gwr cs->cs_preg[13] = tconst >> 8;
472 1.43 gwr
473 1.43 gwr /* Caller will stuff the pending registers. */
474 1.43 gwr return (0);
475 1.43 gwr }
476 1.43 gwr
477 1.73 chs int
478 1.73 chs zs_set_modes(struct zs_chanstate *cs, int cflag /* bits per second */)
479 1.43 gwr {
480 1.43 gwr int s;
481 1.43 gwr
482 1.43 gwr /*
483 1.43 gwr * Output hardware flow control on the chip is horrendous:
484 1.43 gwr * if carrier detect drops, the receiver is disabled, and if
485 1.43 gwr * CTS drops, the transmitter is stoped IN MID CHARACTER!
486 1.43 gwr * Therefore, NEVER set the HFC bit, and instead use the
487 1.43 gwr * status interrupt to detect CTS changes.
488 1.43 gwr */
489 1.43 gwr s = splzs();
490 1.57 wrstuden cs->cs_rr0_pps = 0;
491 1.57 wrstuden if ((cflag & (CLOCAL | MDMBUF)) != 0) {
492 1.43 gwr cs->cs_rr0_dcd = 0;
493 1.57 wrstuden if ((cflag & MDMBUF) == 0)
494 1.57 wrstuden cs->cs_rr0_pps = ZSRR0_DCD;
495 1.57 wrstuden } else
496 1.43 gwr cs->cs_rr0_dcd = ZSRR0_DCD;
497 1.51 mycroft if ((cflag & CRTSCTS) != 0) {
498 1.43 gwr cs->cs_wr5_dtr = ZSWR5_DTR;
499 1.43 gwr cs->cs_wr5_rts = ZSWR5_RTS;
500 1.43 gwr cs->cs_rr0_cts = ZSRR0_CTS;
501 1.51 mycroft } else if ((cflag & MDMBUF) != 0) {
502 1.51 mycroft cs->cs_wr5_dtr = 0;
503 1.51 mycroft cs->cs_wr5_rts = ZSWR5_DTR;
504 1.51 mycroft cs->cs_rr0_cts = ZSRR0_DCD;
505 1.43 gwr } else {
506 1.43 gwr cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
507 1.43 gwr cs->cs_wr5_rts = 0;
508 1.43 gwr cs->cs_rr0_cts = 0;
509 1.43 gwr }
510 1.43 gwr splx(s);
511 1.43 gwr
512 1.43 gwr /* Caller will stuff the pending registers. */
513 1.43 gwr return (0);
514 1.43 gwr }
515 1.43 gwr
516 1.43 gwr
517 1.43 gwr /*
518 1.31 gwr * Read or write the chip with suitable delays.
519 1.31 gwr */
520 1.2 glass
521 1.31 gwr u_char
522 1.73 chs zs_read_reg(struct zs_chanstate *cs, u_char reg)
523 1.1 glass {
524 1.31 gwr u_char val;
525 1.1 glass
526 1.31 gwr *cs->cs_reg_csr = reg;
527 1.31 gwr ZS_DELAY();
528 1.31 gwr val = *cs->cs_reg_csr;
529 1.31 gwr ZS_DELAY();
530 1.31 gwr return val;
531 1.17 gwr }
532 1.3 gwr
533 1.31 gwr void
534 1.73 chs zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val)
535 1.17 gwr {
536 1.31 gwr *cs->cs_reg_csr = reg;
537 1.31 gwr ZS_DELAY();
538 1.31 gwr *cs->cs_reg_csr = val;
539 1.32 gwr ZS_DELAY();
540 1.32 gwr }
541 1.32 gwr
542 1.73 chs u_char
543 1.73 chs zs_read_csr(struct zs_chanstate *cs)
544 1.32 gwr {
545 1.63 tsutsui u_char val;
546 1.32 gwr
547 1.43 gwr val = *cs->cs_reg_csr;
548 1.32 gwr ZS_DELAY();
549 1.43 gwr return val;
550 1.32 gwr }
551 1.32 gwr
552 1.73 chs void
553 1.73 chs zs_write_csr(struct zs_chanstate *cs, u_char val)
554 1.32 gwr {
555 1.43 gwr *cs->cs_reg_csr = val;
556 1.32 gwr ZS_DELAY();
557 1.32 gwr }
558 1.32 gwr
559 1.73 chs u_char
560 1.73 chs zs_read_data(struct zs_chanstate *cs)
561 1.32 gwr {
562 1.63 tsutsui u_char val;
563 1.43 gwr
564 1.43 gwr val = *cs->cs_reg_data;
565 1.32 gwr ZS_DELAY();
566 1.43 gwr return val;
567 1.32 gwr }
568 1.32 gwr
569 1.73 chs void
570 1.73 chs zs_write_data(struct zs_chanstate *cs, u_char val)
571 1.32 gwr {
572 1.32 gwr *cs->cs_reg_data = val;
573 1.31 gwr ZS_DELAY();
574 1.1 glass }
575 1.3 gwr
576 1.31 gwr /****************************************************************
577 1.31 gwr * Console support functions (Sun3 specific!)
578 1.43 gwr * Note: this code is allowed to know about the layout of
579 1.43 gwr * the chip registers, and uses that to keep things simple.
580 1.43 gwr * XXX - I think I like the mvme167 code better. -gwr
581 1.31 gwr ****************************************************************/
582 1.1 glass
583 1.43 gwr void *zs_conschan;
584 1.43 gwr
585 1.2 glass /*
586 1.47 gwr * Handle user request to enter kernel debugger.
587 1.47 gwr */
588 1.73 chs void
589 1.73 chs zs_abort(struct zs_chanstate *cs)
590 1.47 gwr {
591 1.63 tsutsui volatile struct zschan *zc = zs_conschan;
592 1.47 gwr int rr0;
593 1.47 gwr
594 1.47 gwr /* Wait for end of break to avoid PROM abort. */
595 1.47 gwr /* XXX - Limit the wait? */
596 1.47 gwr do {
597 1.47 gwr rr0 = zc->zc_csr;
598 1.47 gwr ZS_DELAY();
599 1.47 gwr } while (rr0 & ZSRR0_BREAK);
600 1.47 gwr
601 1.59 jdolecek /* This is always available on the Sun3. */
602 1.47 gwr Debugger();
603 1.47 gwr }
604 1.47 gwr
605 1.47 gwr /*
606 1.31 gwr * Polled input char.
607 1.2 glass */
608 1.73 chs int
609 1.73 chs zs_getc(void *arg)
610 1.2 glass {
611 1.63 tsutsui volatile struct zschan *zc = arg;
612 1.63 tsutsui int s, c, rr0;
613 1.2 glass
614 1.2 glass s = splhigh();
615 1.9 gwr /* Wait for a character to arrive. */
616 1.25 gwr do {
617 1.25 gwr rr0 = zc->zc_csr;
618 1.3 gwr ZS_DELAY();
619 1.25 gwr } while ((rr0 & ZSRR0_RX_READY) == 0);
620 1.9 gwr
621 1.2 glass c = zc->zc_data;
622 1.9 gwr ZS_DELAY();
623 1.2 glass splx(s);
624 1.17 gwr
625 1.17 gwr /*
626 1.17 gwr * This is used by the kd driver to read scan codes,
627 1.17 gwr * so don't translate '\r' ==> '\n' here...
628 1.17 gwr */
629 1.2 glass return (c);
630 1.2 glass }
631 1.1 glass
632 1.1 glass /*
633 1.31 gwr * Polled output char.
634 1.1 glass */
635 1.73 chs void
636 1.73 chs zs_putc(void *arg, int c)
637 1.1 glass {
638 1.63 tsutsui volatile struct zschan *zc = arg;
639 1.63 tsutsui int s, rr0;
640 1.1 glass
641 1.9 gwr s = splhigh();
642 1.9 gwr /* Wait for transmitter to become ready. */
643 1.25 gwr do {
644 1.25 gwr rr0 = zc->zc_csr;
645 1.3 gwr ZS_DELAY();
646 1.25 gwr } while ((rr0 & ZSRR0_TX_READY) == 0);
647 1.9 gwr
648 1.1 glass zc->zc_data = c;
649 1.3 gwr ZS_DELAY();
650 1.1 glass splx(s);
651 1.1 glass }
652 1.2 glass
653 1.50 gwr /*****************************************************************/
654 1.50 gwr
655 1.73 chs static void zscninit(struct consdev *);
656 1.73 chs static int zscngetc(dev_t);
657 1.73 chs static void zscnputc(dev_t, int);
658 1.50 gwr
659 1.50 gwr /*
660 1.50 gwr * Console table shared by ttya, ttyb
661 1.50 gwr */
662 1.50 gwr struct consdev consdev_tty = {
663 1.50 gwr nullcnprobe,
664 1.50 gwr zscninit,
665 1.50 gwr zscngetc,
666 1.50 gwr zscnputc,
667 1.50 gwr nullcnpollc,
668 1.60 thorpej NULL,
669 1.50 gwr };
670 1.50 gwr
671 1.73 chs static void
672 1.73 chs zscninit(struct consdev *cn)
673 1.50 gwr {
674 1.50 gwr }
675 1.50 gwr
676 1.50 gwr /*
677 1.50 gwr * Polled console input putchar.
678 1.50 gwr */
679 1.73 chs static int
680 1.73 chs zscngetc(dev_t dev)
681 1.50 gwr {
682 1.50 gwr return (zs_getc(zs_conschan));
683 1.50 gwr }
684 1.50 gwr
685 1.50 gwr /*
686 1.50 gwr * Polled console output putchar.
687 1.50 gwr */
688 1.73 chs static void
689 1.73 chs zscnputc(dev_t dev, int c)
690 1.50 gwr {
691 1.50 gwr zs_putc(zs_conschan, c);
692 1.50 gwr }
693 1.50 gwr
694 1.50 gwr /*****************************************************************/
695 1.50 gwr
696 1.73 chs static void prom_cninit(struct consdev *);
697 1.73 chs static int prom_cngetc(dev_t);
698 1.73 chs static void prom_cnputc(dev_t, int);
699 1.50 gwr
700 1.50 gwr /*
701 1.50 gwr * The console is set to this one initially,
702 1.50 gwr * which lets us use the PROM until consinit()
703 1.50 gwr * is called to select a real console.
704 1.50 gwr */
705 1.50 gwr struct consdev consdev_prom = {
706 1.50 gwr nullcnprobe,
707 1.50 gwr prom_cninit,
708 1.50 gwr prom_cngetc,
709 1.50 gwr prom_cnputc,
710 1.50 gwr nullcnpollc,
711 1.50 gwr };
712 1.50 gwr
713 1.50 gwr /*
714 1.50 gwr * The console table pointer is statically initialized
715 1.50 gwr * to point to the PROM (output only) table, so that
716 1.50 gwr * early calls to printf will work.
717 1.50 gwr */
718 1.50 gwr struct consdev *cn_tab = &consdev_prom;
719 1.50 gwr
720 1.73 chs void
721 1.73 chs nullcnprobe(struct consdev *cn)
722 1.50 gwr {
723 1.50 gwr }
724 1.50 gwr
725 1.73 chs static void
726 1.73 chs prom_cninit(struct consdev *cn)
727 1.50 gwr {
728 1.50 gwr }
729 1.50 gwr
730 1.50 gwr /*
731 1.50 gwr * PROM console input putchar.
732 1.50 gwr * (dummy - this is output only)
733 1.50 gwr */
734 1.73 chs static int
735 1.73 chs prom_cngetc(dev_t dev)
736 1.50 gwr {
737 1.50 gwr return (0);
738 1.50 gwr }
739 1.50 gwr
740 1.50 gwr /*
741 1.50 gwr * PROM console output putchar.
742 1.50 gwr */
743 1.73 chs static void
744 1.73 chs prom_cnputc(dev_t dev, int c)
745 1.50 gwr {
746 1.50 gwr (*romVectorPtr->putChar)(c & 0x7f);
747 1.50 gwr }
748 1.50 gwr
749 1.50 gwr /*****************************************************************/
750 1.50 gwr
751 1.50 gwr extern struct consdev consdev_kd;
752 1.31 gwr
753 1.43 gwr static struct {
754 1.50 gwr int zs_unit, channel;
755 1.50 gwr } zstty_conf[NZS*2] = {
756 1.43 gwr /* XXX: knowledge from the config file here... */
757 1.43 gwr { 1, 0 }, /* ttya */
758 1.43 gwr { 1, 1 }, /* ttyb */
759 1.43 gwr { 0, 0 }, /* ttyc */
760 1.43 gwr { 0, 1 }, /* ttyd */
761 1.43 gwr };
762 1.31 gwr
763 1.74 tsutsui static const char *prom_inSrc_name[] = {
764 1.47 gwr "keyboard/display",
765 1.47 gwr "ttya", "ttyb",
766 1.47 gwr "ttyc", "ttyd" };
767 1.47 gwr
768 1.1 glass /*
769 1.31 gwr * This function replaces sys/dev/cninit.c
770 1.31 gwr * Determine which device is the console using
771 1.38 gwr * the PROM "input source" and "output sink".
772 1.1 glass */
773 1.73 chs void
774 1.73 chs cninit(void)
775 1.1 glass {
776 1.53 gwr struct sunromvec *v;
777 1.31 gwr struct zschan *zc;
778 1.31 gwr struct consdev *cn;
779 1.50 gwr int channel, zs_unit, zstty_unit;
780 1.50 gwr u_char inSource, outSink;
781 1.65 gehenna extern const struct cdevsw zstty_cdevsw;
782 1.53 gwr
783 1.53 gwr /* Get the zs driver ready for console duty. */
784 1.53 gwr zs_init();
785 1.31 gwr
786 1.38 gwr v = romVectorPtr;
787 1.50 gwr inSource = *v->inSource;
788 1.50 gwr outSink = *v->outSink;
789 1.50 gwr if (inSource != outSink) {
790 1.38 gwr mon_printf("cninit: mismatched PROM output selector\n");
791 1.38 gwr }
792 1.38 gwr
793 1.38 gwr switch (inSource) {
794 1.47 gwr default:
795 1.47 gwr mon_printf("cninit: invalid inSource=%d\n", inSource);
796 1.47 gwr sunmon_abort();
797 1.47 gwr inSource = 0;
798 1.47 gwr /* fall through */
799 1.47 gwr
800 1.47 gwr case 0: /* keyboard/display */
801 1.47 gwr #if NKBD > 0
802 1.50 gwr zs_unit = 0;
803 1.47 gwr channel = 0;
804 1.47 gwr cn = &consdev_kd;
805 1.47 gwr /* Set cn_dev, cn_pri in kd.c */
806 1.47 gwr break;
807 1.47 gwr #else /* NKBD */
808 1.47 gwr mon_printf("cninit: kdb/display not configured\n");
809 1.47 gwr sunmon_abort();
810 1.47 gwr inSource = 1;
811 1.47 gwr /* fall through */
812 1.47 gwr #endif /* NKBD */
813 1.47 gwr
814 1.38 gwr case 1: /* ttya */
815 1.38 gwr case 2: /* ttyb */
816 1.38 gwr case 3: /* ttyc (rewired keyboard connector) */
817 1.38 gwr case 4: /* ttyd (rewired mouse connector) */
818 1.43 gwr zstty_unit = inSource - 1;
819 1.50 gwr zs_unit = zstty_conf[zstty_unit].zs_unit;
820 1.50 gwr channel = zstty_conf[zstty_unit].channel;
821 1.38 gwr cn = &consdev_tty;
822 1.65 gehenna cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw),
823 1.65 gehenna zstty_unit);
824 1.38 gwr cn->cn_pri = CN_REMOTE;
825 1.38 gwr break;
826 1.38 gwr
827 1.1 glass }
828 1.47 gwr /* Now that inSource has been validated, print it. */
829 1.47 gwr mon_printf("console is %s\n", prom_inSrc_name[inSource]);
830 1.1 glass
831 1.50 gwr zc = zs_get_chan_addr(zs_unit, channel);
832 1.31 gwr if (zc == NULL) {
833 1.31 gwr mon_printf("cninit: zs not mapped.\n");
834 1.31 gwr return;
835 1.31 gwr }
836 1.31 gwr zs_conschan = zc;
837 1.50 gwr zs_hwflags[zs_unit][channel] = ZS_HWFLAG_CONSOLE;
838 1.31 gwr cn_tab = cn;
839 1.31 gwr (*cn->cn_init)(cn);
840 1.47 gwr #ifdef KGDB
841 1.47 gwr zs_kgdb_init();
842 1.47 gwr #endif
843 1.1 glass }
844