zs.c revision 1.82 1 1.82 tsutsui /* $NetBSD: zs.c,v 1.82 2008/03/29 19:15:35 tsutsui Exp $ */
2 1.10 cgd
3 1.42 gwr /*-
4 1.42 gwr * Copyright (c) 1996 The NetBSD Foundation, Inc.
5 1.31 gwr * All rights reserved.
6 1.1 glass *
7 1.42 gwr * This code is derived from software contributed to The NetBSD Foundation
8 1.42 gwr * by Gordon W. Ross.
9 1.42 gwr *
10 1.1 glass * Redistribution and use in source and binary forms, with or without
11 1.1 glass * modification, are permitted provided that the following conditions
12 1.1 glass * are met:
13 1.1 glass * 1. Redistributions of source code must retain the above copyright
14 1.1 glass * notice, this list of conditions and the following disclaimer.
15 1.1 glass * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 glass * notice, this list of conditions and the following disclaimer in the
17 1.1 glass * documentation and/or other materials provided with the distribution.
18 1.42 gwr * 3. All advertising materials mentioning features or use of this software
19 1.1 glass * must display the following acknowledgement:
20 1.42 gwr * This product includes software developed by the NetBSD
21 1.42 gwr * Foundation, Inc. and its contributors.
22 1.42 gwr * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.42 gwr * contributors may be used to endorse or promote products derived
24 1.42 gwr * from this software without specific prior written permission.
25 1.1 glass *
26 1.42 gwr * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.42 gwr * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.42 gwr * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.44 gwr * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.44 gwr * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.42 gwr * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.42 gwr * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.42 gwr * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.42 gwr * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.42 gwr * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.42 gwr * POSSIBILITY OF SUCH DAMAGE.
37 1.1 glass */
38 1.1 glass
39 1.1 glass /*
40 1.31 gwr * Zilog Z8530 Dual UART driver (machine-dependent part)
41 1.1 glass *
42 1.31 gwr * Runs two serial lines per chip using slave drivers.
43 1.31 gwr * Plain tty/async lines use the zs_async slave.
44 1.31 gwr * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
45 1.1 glass */
46 1.72 lukem
47 1.72 lukem #include <sys/cdefs.h>
48 1.82 tsutsui __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.82 2008/03/29 19:15:35 tsutsui Exp $");
49 1.62 lukem
50 1.62 lukem #include "opt_kgdb.h"
51 1.1 glass
52 1.5 gwr #include <sys/param.h>
53 1.1 glass #include <sys/systm.h>
54 1.43 gwr #include <sys/conf.h>
55 1.1 glass #include <sys/device.h>
56 1.1 glass #include <sys/file.h>
57 1.1 glass #include <sys/ioctl.h>
58 1.43 gwr #include <sys/kernel.h>
59 1.43 gwr #include <sys/proc.h>
60 1.1 glass #include <sys/tty.h>
61 1.1 glass #include <sys/time.h>
62 1.1 glass #include <sys/syslog.h>
63 1.81 tsutsui #include <sys/cpu.h>
64 1.81 tsutsui #include <sys/intr.h>
65 1.1 glass
66 1.77 tsutsui #include <uvm/uvm_extern.h>
67 1.77 tsutsui
68 1.1 glass #include <machine/autoconf.h>
69 1.3 gwr #include <machine/mon.h>
70 1.49 gwr #include <machine/z8530var.h>
71 1.49 gwr
72 1.53 gwr #include <sun3/sun3/machdep.h>
73 1.53 gwr #ifdef _SUN3X_
74 1.53 gwr #include <sun3/sun3x/obio.h>
75 1.53 gwr #else
76 1.53 gwr #include <sun3/sun3/obio.h>
77 1.53 gwr #endif
78 1.53 gwr #include <sun3/dev/zs_cons.h>
79 1.53 gwr
80 1.49 gwr #include <dev/cons.h>
81 1.49 gwr #include <dev/ic/z8530reg.h>
82 1.1 glass
83 1.82 tsutsui #include "ioconf.h"
84 1.50 gwr #include "kbd.h" /* NKBD */
85 1.50 gwr #include "zsc.h" /* NZSC */
86 1.50 gwr #define NZS NZSC
87 1.50 gwr
88 1.50 gwr /* Make life easier for the initialized arrays here. */
89 1.50 gwr #if NZS < 2
90 1.50 gwr #undef NZS
91 1.50 gwr #define NZS 2
92 1.50 gwr #endif
93 1.47 gwr
94 1.16 gwr /*
95 1.43 gwr * Some warts needed by z8530tty.c -
96 1.43 gwr * The default parity REALLY needs to be the same as the PROM uses,
97 1.43 gwr * or you can not see messages done with printf during boot-up...
98 1.43 gwr */
99 1.43 gwr int zs_def_cflag = (CREAD | CS8 | HUPCL);
100 1.1 glass
101 1.43 gwr /*
102 1.43 gwr * The Sun3 provides a 4.9152 MHz clock to the ZS chips.
103 1.43 gwr */
104 1.2 glass #define PCLK (9600 * 512) /* PCLK pin input clock rate */
105 1.2 glass
106 1.2 glass /*
107 1.22 gwr * Define interrupt levels.
108 1.2 glass */
109 1.2 glass #define ZSHARD_PRI 6 /* Wired on the CPU board... */
110 1.78 tsutsui #define ZSSOFT_PRI _IPL_SOFT_LEVEL3 /* Want tty pri (4) but this is OK. */
111 1.1 glass
112 1.33 gwr #define ZS_DELAY() delay(2)
113 1.31 gwr
114 1.31 gwr /* The layout of this is hardware-dependent (padding, order). */
115 1.31 gwr struct zschan {
116 1.82 tsutsui volatile uint8_t zc_csr; /* ctrl,status, and indirect access */
117 1.82 tsutsui uint8_t zc_xxx0;
118 1.82 tsutsui volatile uint8_t zc_data; /* data */
119 1.82 tsutsui uint8_t zc_xxx1;
120 1.31 gwr };
121 1.31 gwr struct zsdevice {
122 1.31 gwr /* Yes, they are backwards. */
123 1.31 gwr struct zschan zs_chan_b;
124 1.31 gwr struct zschan zs_chan_a;
125 1.1 glass };
126 1.1 glass
127 1.1 glass
128 1.31 gwr /* Default OBIO addresses. */
129 1.50 gwr static int zs_physaddr[NZS] = {
130 1.44 gwr OBIO_ZS_KBD_MS,
131 1.44 gwr OBIO_ZS_TTY_AB };
132 1.43 gwr
133 1.31 gwr /* Saved PROM mappings */
134 1.50 gwr static struct zsdevice *zsaddr[NZS];
135 1.43 gwr
136 1.31 gwr /* Flags from cninit() */
137 1.50 gwr static int zs_hwflags[NZS][2];
138 1.43 gwr
139 1.31 gwr /* Default speed for each channel */
140 1.50 gwr static int zs_defspeed[NZS][2] = {
141 1.31 gwr { 1200, /* keyboard */
142 1.31 gwr 1200 }, /* mouse */
143 1.31 gwr { 9600, /* ttya */
144 1.31 gwr 9600 }, /* ttyb */
145 1.31 gwr };
146 1.13 gwr
147 1.82 tsutsui static uint8_t zs_init_reg[16] = {
148 1.43 gwr 0, /* 0: CMD (reset, etc.) */
149 1.43 gwr 0, /* 1: No interrupts yet. */
150 1.43 gwr 0x18 + ZSHARD_PRI, /* IVECT */
151 1.43 gwr ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
152 1.43 gwr ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
153 1.43 gwr ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
154 1.43 gwr 0, /* 6: TXSYNC/SYNCLO */
155 1.43 gwr 0, /* 7: RXSYNC/SYNCHI */
156 1.43 gwr 0, /* 8: alias for data port */
157 1.43 gwr ZSWR9_MASTER_IE,
158 1.43 gwr 0, /*10: Misc. TX/RX control bits */
159 1.43 gwr ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
160 1.56 mycroft ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */
161 1.56 mycroft 0, /*13: BAUDHI (default=9600) */
162 1.43 gwr ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
163 1.55 mycroft ZSWR15_BREAK_IE,
164 1.43 gwr };
165 1.43 gwr
166 1.1 glass
167 1.31 gwr /* Find PROM mappings (for console support). */
168 1.73 chs void
169 1.73 chs zs_init(void)
170 1.31 gwr {
171 1.77 tsutsui vaddr_t va;
172 1.31 gwr int i;
173 1.1 glass
174 1.50 gwr for (i = 0; i < NZS; i++) {
175 1.77 tsutsui if (find_prom_map(zs_physaddr[i], PMAP_OBIO,
176 1.77 tsutsui sizeof(struct zschan), &va) == 0)
177 1.77 tsutsui zsaddr[i] = (void *)va;
178 1.31 gwr }
179 1.43 gwr }
180 1.13 gwr
181 1.47 gwr struct zschan *
182 1.73 chs zs_get_chan_addr(int zs_unit, int channel)
183 1.31 gwr {
184 1.31 gwr struct zsdevice *addr;
185 1.31 gwr struct zschan *zc;
186 1.31 gwr
187 1.50 gwr if (zs_unit >= NZS)
188 1.31 gwr return NULL;
189 1.50 gwr addr = zsaddr[zs_unit];
190 1.31 gwr if (addr == NULL)
191 1.31 gwr return NULL;
192 1.31 gwr if (channel == 0) {
193 1.31 gwr zc = &addr->zs_chan_a;
194 1.31 gwr } else {
195 1.31 gwr zc = &addr->zs_chan_b;
196 1.31 gwr }
197 1.31 gwr return (zc);
198 1.31 gwr }
199 1.13 gwr
200 1.18 gwr
201 1.31 gwr /****************************************************************
202 1.31 gwr * Autoconfig
203 1.31 gwr ****************************************************************/
204 1.31 gwr
205 1.31 gwr /* Definition of the driver for autoconfig. */
206 1.82 tsutsui static int zs_match(device_t, cfdata_t, void *);
207 1.82 tsutsui static void zs_attach(device_t, device_t, void *);
208 1.73 chs static int zs_print(void *, const char *);
209 1.31 gwr
210 1.82 tsutsui CFATTACH_DECL_NEW(zsc, sizeof(struct zsc_softc),
211 1.69 thorpej zs_match, zs_attach, NULL, NULL);
212 1.34 thorpej
213 1.73 chs static int zshard(void *);
214 1.73 chs static int zs_get_speed(struct zs_chanstate *);
215 1.31 gwr
216 1.9 gwr
217 1.1 glass /*
218 1.31 gwr * Is the zs chip present?
219 1.1 glass */
220 1.73 chs static int
221 1.82 tsutsui zs_match(device_t parent, cfdata_t cf, void *aux)
222 1.1 glass {
223 1.31 gwr struct confargs *ca = aux;
224 1.61 chs int unit;
225 1.35 gwr void *va;
226 1.13 gwr
227 1.35 gwr /*
228 1.43 gwr * This driver only supports its wired-in mappings,
229 1.43 gwr * because the console support depends on those.
230 1.35 gwr */
231 1.61 chs if (ca->ca_paddr == zs_physaddr[0]) {
232 1.61 chs unit = 0;
233 1.61 chs } else if (ca->ca_paddr == zs_physaddr[1]) {
234 1.61 chs unit = 1;
235 1.61 chs } else {
236 1.35 gwr return (0);
237 1.61 chs }
238 1.35 gwr
239 1.31 gwr /* Make sure zs_init() found mappings. */
240 1.35 gwr va = zsaddr[unit];
241 1.35 gwr if (va == NULL)
242 1.21 gwr return (0);
243 1.21 gwr
244 1.21 gwr /* This returns -1 on a fault (bus error). */
245 1.43 gwr if (peek_byte(va) == -1)
246 1.43 gwr return (0);
247 1.43 gwr
248 1.43 gwr /* Default interrupt priority (always splbio==2) */
249 1.43 gwr if (ca->ca_intpri == -1)
250 1.43 gwr ca->ca_intpri = ZSHARD_PRI;
251 1.43 gwr
252 1.43 gwr return (1);
253 1.1 glass }
254 1.1 glass
255 1.1 glass /*
256 1.1 glass * Attach a found zs.
257 1.1 glass *
258 1.31 gwr * Match slave number to zs unit number, so that misconfiguration will
259 1.31 gwr * not set up the keyboard as ttya, etc.
260 1.1 glass */
261 1.73 chs static void
262 1.82 tsutsui zs_attach(device_t parent, device_t self, void *aux)
263 1.31 gwr {
264 1.82 tsutsui struct zsc_softc *zsc = device_private(self);
265 1.31 gwr struct confargs *ca = aux;
266 1.31 gwr struct zsc_attach_args zsc_args;
267 1.31 gwr volatile struct zschan *zc;
268 1.31 gwr struct zs_chanstate *cs;
269 1.50 gwr int s, zs_unit, channel;
270 1.50 gwr static int didintr;
271 1.2 glass
272 1.82 tsutsui zsc->zsc_dev = self;
273 1.82 tsutsui zs_unit = device_unit(self);
274 1.13 gwr
275 1.82 tsutsui aprint_normal(": (softpri %d)\n", ZSSOFT_PRI);
276 1.1 glass
277 1.31 gwr /* Use the mapping setup by the Sun PROM. */
278 1.50 gwr if (zsaddr[zs_unit] == NULL)
279 1.66 provos panic("zs_attach: zs%d not mapped", zs_unit);
280 1.31 gwr
281 1.31 gwr /*
282 1.31 gwr * Initialize software state for each channel.
283 1.31 gwr */
284 1.31 gwr for (channel = 0; channel < 2; channel++) {
285 1.43 gwr zsc_args.channel = channel;
286 1.50 gwr zsc_args.hwflags = zs_hwflags[zs_unit][channel];
287 1.43 gwr cs = &zsc->zsc_cs_store[channel];
288 1.43 gwr zsc->zsc_cs[channel] = cs;
289 1.1 glass
290 1.80 ad zs_lock_init(cs);
291 1.31 gwr cs->cs_channel = channel;
292 1.31 gwr cs->cs_private = NULL;
293 1.31 gwr cs->cs_ops = &zsops_null;
294 1.37 gwr cs->cs_brg_clk = PCLK / 16;
295 1.31 gwr
296 1.50 gwr zc = zs_get_chan_addr(zs_unit, channel);
297 1.43 gwr cs->cs_reg_csr = &zc->zc_csr;
298 1.43 gwr cs->cs_reg_data = &zc->zc_data;
299 1.2 glass
300 1.64 tsutsui memcpy(cs->cs_creg, zs_init_reg, 16);
301 1.64 tsutsui memcpy(cs->cs_preg, zs_init_reg, 16);
302 1.15 gwr
303 1.43 gwr /* XXX: Get these from the EEPROM instead? */
304 1.43 gwr /* XXX: See the mvme167 code. Better. */
305 1.43 gwr if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
306 1.43 gwr cs->cs_defspeed = zs_get_speed(cs);
307 1.43 gwr else
308 1.50 gwr cs->cs_defspeed = zs_defspeed[zs_unit][channel];
309 1.43 gwr cs->cs_defcflag = zs_def_cflag;
310 1.43 gwr
311 1.47 gwr /* Make these correspond to cs_defcflag (-crtscts) */
312 1.46 gwr cs->cs_rr0_dcd = ZSRR0_DCD;
313 1.47 gwr cs->cs_rr0_cts = 0;
314 1.47 gwr cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
315 1.47 gwr cs->cs_wr5_rts = 0;
316 1.46 gwr
317 1.1 glass /*
318 1.31 gwr * Clear the master interrupt enable.
319 1.31 gwr * The INTENA is common to both channels,
320 1.31 gwr * so just do it on the A channel.
321 1.1 glass */
322 1.31 gwr if (channel == 0) {
323 1.32 gwr zs_write_reg(cs, 9, 0);
324 1.31 gwr }
325 1.15 gwr
326 1.1 glass /*
327 1.31 gwr * Look for a child driver for this channel.
328 1.31 gwr * The child attach will setup the hardware.
329 1.1 glass */
330 1.50 gwr if (!config_found(self, (void *)&zsc_args, zs_print)) {
331 1.31 gwr /* No sub-driver. Just reset it. */
332 1.82 tsutsui uint8_t reset = (channel == 0) ?
333 1.31 gwr ZSWR9_A_RESET : ZSWR9_B_RESET;
334 1.45 gwr s = splhigh();
335 1.32 gwr zs_write_reg(cs, 9, reset);
336 1.31 gwr splx(s);
337 1.31 gwr }
338 1.1 glass }
339 1.1 glass
340 1.43 gwr /*
341 1.43 gwr * Now safe to install interrupt handlers. Note the arguments
342 1.43 gwr * to the interrupt handlers aren't used. Note, we only do this
343 1.43 gwr * once since both SCCs interrupt at the same level and vector.
344 1.43 gwr */
345 1.50 gwr if (!didintr) {
346 1.50 gwr didintr = 1;
347 1.43 gwr isr_add_autovect(zshard, NULL, ca->ca_intpri);
348 1.31 gwr }
349 1.81 tsutsui zsc->zs_si = softint_establish(SOFTINT_SERIAL,
350 1.79 tsutsui (void (*)(void *))zsc_intr_soft, zsc);
351 1.50 gwr /* XXX; evcnt_attach() ? */
352 1.24 gwr
353 1.31 gwr /*
354 1.31 gwr * Set the master interrupt enable and interrupt vector.
355 1.31 gwr * (common to both channels, do it on A)
356 1.31 gwr */
357 1.43 gwr cs = zsc->zsc_cs[0];
358 1.45 gwr s = splhigh();
359 1.31 gwr /* interrupt vector */
360 1.32 gwr zs_write_reg(cs, 2, zs_init_reg[2]);
361 1.31 gwr /* master interrupt control (enable) */
362 1.32 gwr zs_write_reg(cs, 9, zs_init_reg[9]);
363 1.31 gwr splx(s);
364 1.45 gwr
365 1.45 gwr /*
366 1.45 gwr * XXX: L1A hack - We would like to be able to break into
367 1.45 gwr * the debugger during the rest of autoconfiguration, so
368 1.45 gwr * lower interrupts just enough to let zs interrupts in.
369 1.50 gwr * This is done after both zs devices are attached.
370 1.45 gwr */
371 1.50 gwr if (zs_unit == 1) {
372 1.45 gwr (void)spl5(); /* splzs - 1 */
373 1.45 gwr }
374 1.35 gwr }
375 1.35 gwr
376 1.73 chs static int
377 1.73 chs zs_print(void *aux, const char *name)
378 1.35 gwr {
379 1.35 gwr struct zsc_attach_args *args = aux;
380 1.35 gwr
381 1.35 gwr if (name != NULL)
382 1.70 thorpej aprint_normal("%s: ", name);
383 1.35 gwr
384 1.35 gwr if (args->channel != -1)
385 1.70 thorpej aprint_normal(" channel %d", args->channel);
386 1.35 gwr
387 1.35 gwr return UNCONF;
388 1.24 gwr }
389 1.24 gwr
390 1.43 gwr /*
391 1.43 gwr * Our ZS chips all share a common, autovectored interrupt,
392 1.43 gwr * so we have to look at all of them on each interrupt.
393 1.43 gwr */
394 1.73 chs static int
395 1.73 chs zshard(void *arg)
396 1.1 glass {
397 1.63 tsutsui struct zsc_softc *zsc;
398 1.63 tsutsui int unit, rval, softreq;
399 1.43 gwr
400 1.78 tsutsui rval = 0;
401 1.48 gwr for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
402 1.82 tsutsui zsc = device_private(zsc_cd.cd_devs[unit]);
403 1.43 gwr if (zsc == NULL)
404 1.43 gwr continue;
405 1.43 gwr rval |= zsc_intr_hard(zsc);
406 1.78 tsutsui softreq = zsc->zsc_cs[0]->cs_softreq;
407 1.48 gwr softreq |= zsc->zsc_cs[1]->cs_softreq;
408 1.78 tsutsui if (softreq)
409 1.81 tsutsui softint_schedule(zsc->zs_si);
410 1.48 gwr }
411 1.48 gwr
412 1.31 gwr return (rval);
413 1.1 glass }
414 1.1 glass
415 1.43 gwr /*
416 1.50 gwr * Compute the current baud rate given a ZS channel.
417 1.43 gwr */
418 1.73 chs static int
419 1.73 chs zs_get_speed(struct zs_chanstate *cs)
420 1.43 gwr {
421 1.43 gwr int tconst;
422 1.43 gwr
423 1.43 gwr tconst = zs_read_reg(cs, 12);
424 1.43 gwr tconst |= zs_read_reg(cs, 13) << 8;
425 1.43 gwr return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
426 1.43 gwr }
427 1.43 gwr
428 1.43 gwr /*
429 1.43 gwr * MD functions for setting the baud rate and control modes.
430 1.43 gwr */
431 1.73 chs int
432 1.73 chs zs_set_speed(struct zs_chanstate *cs, int bps)
433 1.43 gwr {
434 1.43 gwr int tconst, real_bps;
435 1.43 gwr
436 1.43 gwr if (bps == 0)
437 1.43 gwr return (0);
438 1.43 gwr
439 1.43 gwr #ifdef DIAGNOSTIC
440 1.43 gwr if (cs->cs_brg_clk == 0)
441 1.43 gwr panic("zs_set_speed");
442 1.43 gwr #endif
443 1.43 gwr
444 1.43 gwr tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
445 1.43 gwr if (tconst < 0)
446 1.43 gwr return (EINVAL);
447 1.43 gwr
448 1.43 gwr /* Convert back to make sure we can do it. */
449 1.43 gwr real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
450 1.43 gwr
451 1.43 gwr /* XXX - Allow some tolerance here? */
452 1.43 gwr if (real_bps != bps)
453 1.43 gwr return (EINVAL);
454 1.43 gwr
455 1.43 gwr cs->cs_preg[12] = tconst;
456 1.43 gwr cs->cs_preg[13] = tconst >> 8;
457 1.43 gwr
458 1.43 gwr /* Caller will stuff the pending registers. */
459 1.43 gwr return (0);
460 1.43 gwr }
461 1.43 gwr
462 1.73 chs int
463 1.73 chs zs_set_modes(struct zs_chanstate *cs, int cflag /* bits per second */)
464 1.43 gwr {
465 1.43 gwr int s;
466 1.43 gwr
467 1.43 gwr /*
468 1.43 gwr * Output hardware flow control on the chip is horrendous:
469 1.43 gwr * if carrier detect drops, the receiver is disabled, and if
470 1.43 gwr * CTS drops, the transmitter is stoped IN MID CHARACTER!
471 1.43 gwr * Therefore, NEVER set the HFC bit, and instead use the
472 1.43 gwr * status interrupt to detect CTS changes.
473 1.43 gwr */
474 1.43 gwr s = splzs();
475 1.57 wrstuden cs->cs_rr0_pps = 0;
476 1.57 wrstuden if ((cflag & (CLOCAL | MDMBUF)) != 0) {
477 1.43 gwr cs->cs_rr0_dcd = 0;
478 1.57 wrstuden if ((cflag & MDMBUF) == 0)
479 1.57 wrstuden cs->cs_rr0_pps = ZSRR0_DCD;
480 1.57 wrstuden } else
481 1.43 gwr cs->cs_rr0_dcd = ZSRR0_DCD;
482 1.51 mycroft if ((cflag & CRTSCTS) != 0) {
483 1.43 gwr cs->cs_wr5_dtr = ZSWR5_DTR;
484 1.43 gwr cs->cs_wr5_rts = ZSWR5_RTS;
485 1.43 gwr cs->cs_rr0_cts = ZSRR0_CTS;
486 1.51 mycroft } else if ((cflag & MDMBUF) != 0) {
487 1.51 mycroft cs->cs_wr5_dtr = 0;
488 1.51 mycroft cs->cs_wr5_rts = ZSWR5_DTR;
489 1.51 mycroft cs->cs_rr0_cts = ZSRR0_DCD;
490 1.43 gwr } else {
491 1.43 gwr cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
492 1.43 gwr cs->cs_wr5_rts = 0;
493 1.43 gwr cs->cs_rr0_cts = 0;
494 1.43 gwr }
495 1.43 gwr splx(s);
496 1.43 gwr
497 1.43 gwr /* Caller will stuff the pending registers. */
498 1.43 gwr return (0);
499 1.43 gwr }
500 1.43 gwr
501 1.43 gwr
502 1.43 gwr /*
503 1.31 gwr * Read or write the chip with suitable delays.
504 1.31 gwr */
505 1.2 glass
506 1.82 tsutsui uint8_t
507 1.82 tsutsui zs_read_reg(struct zs_chanstate *cs, uint8_t reg)
508 1.1 glass {
509 1.82 tsutsui uint8_t val;
510 1.1 glass
511 1.31 gwr *cs->cs_reg_csr = reg;
512 1.31 gwr ZS_DELAY();
513 1.31 gwr val = *cs->cs_reg_csr;
514 1.31 gwr ZS_DELAY();
515 1.31 gwr return val;
516 1.17 gwr }
517 1.3 gwr
518 1.31 gwr void
519 1.82 tsutsui zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)
520 1.17 gwr {
521 1.31 gwr *cs->cs_reg_csr = reg;
522 1.31 gwr ZS_DELAY();
523 1.31 gwr *cs->cs_reg_csr = val;
524 1.32 gwr ZS_DELAY();
525 1.32 gwr }
526 1.32 gwr
527 1.82 tsutsui uint8_t
528 1.73 chs zs_read_csr(struct zs_chanstate *cs)
529 1.32 gwr {
530 1.82 tsutsui uint8_t val;
531 1.32 gwr
532 1.43 gwr val = *cs->cs_reg_csr;
533 1.32 gwr ZS_DELAY();
534 1.43 gwr return val;
535 1.32 gwr }
536 1.32 gwr
537 1.73 chs void
538 1.82 tsutsui zs_write_csr(struct zs_chanstate *cs, uint8_t val)
539 1.32 gwr {
540 1.43 gwr *cs->cs_reg_csr = val;
541 1.32 gwr ZS_DELAY();
542 1.32 gwr }
543 1.32 gwr
544 1.82 tsutsui uint8_t
545 1.73 chs zs_read_data(struct zs_chanstate *cs)
546 1.32 gwr {
547 1.82 tsutsui uint8_t val;
548 1.43 gwr
549 1.43 gwr val = *cs->cs_reg_data;
550 1.32 gwr ZS_DELAY();
551 1.43 gwr return val;
552 1.32 gwr }
553 1.32 gwr
554 1.73 chs void
555 1.82 tsutsui zs_write_data(struct zs_chanstate *cs, uint8_t val)
556 1.32 gwr {
557 1.32 gwr *cs->cs_reg_data = val;
558 1.31 gwr ZS_DELAY();
559 1.1 glass }
560 1.3 gwr
561 1.31 gwr /****************************************************************
562 1.31 gwr * Console support functions (Sun3 specific!)
563 1.43 gwr * Note: this code is allowed to know about the layout of
564 1.43 gwr * the chip registers, and uses that to keep things simple.
565 1.43 gwr * XXX - I think I like the mvme167 code better. -gwr
566 1.31 gwr ****************************************************************/
567 1.1 glass
568 1.43 gwr void *zs_conschan;
569 1.43 gwr
570 1.2 glass /*
571 1.47 gwr * Handle user request to enter kernel debugger.
572 1.47 gwr */
573 1.73 chs void
574 1.73 chs zs_abort(struct zs_chanstate *cs)
575 1.47 gwr {
576 1.63 tsutsui volatile struct zschan *zc = zs_conschan;
577 1.47 gwr int rr0;
578 1.47 gwr
579 1.47 gwr /* Wait for end of break to avoid PROM abort. */
580 1.47 gwr /* XXX - Limit the wait? */
581 1.47 gwr do {
582 1.47 gwr rr0 = zc->zc_csr;
583 1.47 gwr ZS_DELAY();
584 1.47 gwr } while (rr0 & ZSRR0_BREAK);
585 1.47 gwr
586 1.59 jdolecek /* This is always available on the Sun3. */
587 1.47 gwr Debugger();
588 1.47 gwr }
589 1.47 gwr
590 1.47 gwr /*
591 1.31 gwr * Polled input char.
592 1.2 glass */
593 1.73 chs int
594 1.73 chs zs_getc(void *arg)
595 1.2 glass {
596 1.63 tsutsui volatile struct zschan *zc = arg;
597 1.63 tsutsui int s, c, rr0;
598 1.2 glass
599 1.2 glass s = splhigh();
600 1.9 gwr /* Wait for a character to arrive. */
601 1.25 gwr do {
602 1.25 gwr rr0 = zc->zc_csr;
603 1.3 gwr ZS_DELAY();
604 1.25 gwr } while ((rr0 & ZSRR0_RX_READY) == 0);
605 1.9 gwr
606 1.2 glass c = zc->zc_data;
607 1.9 gwr ZS_DELAY();
608 1.2 glass splx(s);
609 1.17 gwr
610 1.17 gwr /*
611 1.17 gwr * This is used by the kd driver to read scan codes,
612 1.17 gwr * so don't translate '\r' ==> '\n' here...
613 1.17 gwr */
614 1.2 glass return (c);
615 1.2 glass }
616 1.1 glass
617 1.1 glass /*
618 1.31 gwr * Polled output char.
619 1.1 glass */
620 1.73 chs void
621 1.73 chs zs_putc(void *arg, int c)
622 1.1 glass {
623 1.63 tsutsui volatile struct zschan *zc = arg;
624 1.63 tsutsui int s, rr0;
625 1.1 glass
626 1.9 gwr s = splhigh();
627 1.9 gwr /* Wait for transmitter to become ready. */
628 1.25 gwr do {
629 1.25 gwr rr0 = zc->zc_csr;
630 1.3 gwr ZS_DELAY();
631 1.25 gwr } while ((rr0 & ZSRR0_TX_READY) == 0);
632 1.9 gwr
633 1.1 glass zc->zc_data = c;
634 1.3 gwr ZS_DELAY();
635 1.1 glass splx(s);
636 1.1 glass }
637 1.2 glass
638 1.50 gwr /*****************************************************************/
639 1.50 gwr
640 1.73 chs static void zscninit(struct consdev *);
641 1.73 chs static int zscngetc(dev_t);
642 1.73 chs static void zscnputc(dev_t, int);
643 1.50 gwr
644 1.50 gwr /*
645 1.50 gwr * Console table shared by ttya, ttyb
646 1.50 gwr */
647 1.50 gwr struct consdev consdev_tty = {
648 1.50 gwr nullcnprobe,
649 1.50 gwr zscninit,
650 1.50 gwr zscngetc,
651 1.50 gwr zscnputc,
652 1.50 gwr nullcnpollc,
653 1.60 thorpej NULL,
654 1.50 gwr };
655 1.50 gwr
656 1.73 chs static void
657 1.73 chs zscninit(struct consdev *cn)
658 1.50 gwr {
659 1.50 gwr }
660 1.50 gwr
661 1.50 gwr /*
662 1.50 gwr * Polled console input putchar.
663 1.50 gwr */
664 1.73 chs static int
665 1.73 chs zscngetc(dev_t dev)
666 1.50 gwr {
667 1.50 gwr return (zs_getc(zs_conschan));
668 1.50 gwr }
669 1.50 gwr
670 1.50 gwr /*
671 1.50 gwr * Polled console output putchar.
672 1.50 gwr */
673 1.73 chs static void
674 1.73 chs zscnputc(dev_t dev, int c)
675 1.50 gwr {
676 1.50 gwr zs_putc(zs_conschan, c);
677 1.50 gwr }
678 1.50 gwr
679 1.50 gwr /*****************************************************************/
680 1.50 gwr
681 1.73 chs static void prom_cninit(struct consdev *);
682 1.73 chs static int prom_cngetc(dev_t);
683 1.73 chs static void prom_cnputc(dev_t, int);
684 1.50 gwr
685 1.50 gwr /*
686 1.50 gwr * The console is set to this one initially,
687 1.50 gwr * which lets us use the PROM until consinit()
688 1.50 gwr * is called to select a real console.
689 1.50 gwr */
690 1.50 gwr struct consdev consdev_prom = {
691 1.50 gwr nullcnprobe,
692 1.50 gwr prom_cninit,
693 1.50 gwr prom_cngetc,
694 1.50 gwr prom_cnputc,
695 1.50 gwr nullcnpollc,
696 1.50 gwr };
697 1.50 gwr
698 1.50 gwr /*
699 1.50 gwr * The console table pointer is statically initialized
700 1.50 gwr * to point to the PROM (output only) table, so that
701 1.50 gwr * early calls to printf will work.
702 1.50 gwr */
703 1.50 gwr struct consdev *cn_tab = &consdev_prom;
704 1.50 gwr
705 1.73 chs void
706 1.73 chs nullcnprobe(struct consdev *cn)
707 1.50 gwr {
708 1.50 gwr }
709 1.50 gwr
710 1.73 chs static void
711 1.73 chs prom_cninit(struct consdev *cn)
712 1.50 gwr {
713 1.50 gwr }
714 1.50 gwr
715 1.50 gwr /*
716 1.50 gwr * PROM console input putchar.
717 1.50 gwr * (dummy - this is output only)
718 1.50 gwr */
719 1.73 chs static int
720 1.73 chs prom_cngetc(dev_t dev)
721 1.50 gwr {
722 1.50 gwr return (0);
723 1.50 gwr }
724 1.50 gwr
725 1.50 gwr /*
726 1.50 gwr * PROM console output putchar.
727 1.50 gwr */
728 1.73 chs static void
729 1.73 chs prom_cnputc(dev_t dev, int c)
730 1.50 gwr {
731 1.50 gwr (*romVectorPtr->putChar)(c & 0x7f);
732 1.50 gwr }
733 1.50 gwr
734 1.50 gwr /*****************************************************************/
735 1.50 gwr
736 1.50 gwr extern struct consdev consdev_kd;
737 1.31 gwr
738 1.43 gwr static struct {
739 1.50 gwr int zs_unit, channel;
740 1.50 gwr } zstty_conf[NZS*2] = {
741 1.43 gwr /* XXX: knowledge from the config file here... */
742 1.43 gwr { 1, 0 }, /* ttya */
743 1.43 gwr { 1, 1 }, /* ttyb */
744 1.43 gwr { 0, 0 }, /* ttyc */
745 1.43 gwr { 0, 1 }, /* ttyd */
746 1.43 gwr };
747 1.31 gwr
748 1.74 tsutsui static const char *prom_inSrc_name[] = {
749 1.47 gwr "keyboard/display",
750 1.47 gwr "ttya", "ttyb",
751 1.47 gwr "ttyc", "ttyd" };
752 1.47 gwr
753 1.1 glass /*
754 1.31 gwr * This function replaces sys/dev/cninit.c
755 1.31 gwr * Determine which device is the console using
756 1.38 gwr * the PROM "input source" and "output sink".
757 1.1 glass */
758 1.73 chs void
759 1.73 chs cninit(void)
760 1.1 glass {
761 1.53 gwr struct sunromvec *v;
762 1.31 gwr struct zschan *zc;
763 1.31 gwr struct consdev *cn;
764 1.50 gwr int channel, zs_unit, zstty_unit;
765 1.82 tsutsui uint8_t inSource, outSink;
766 1.65 gehenna extern const struct cdevsw zstty_cdevsw;
767 1.53 gwr
768 1.53 gwr /* Get the zs driver ready for console duty. */
769 1.53 gwr zs_init();
770 1.31 gwr
771 1.38 gwr v = romVectorPtr;
772 1.50 gwr inSource = *v->inSource;
773 1.50 gwr outSink = *v->outSink;
774 1.50 gwr if (inSource != outSink) {
775 1.38 gwr mon_printf("cninit: mismatched PROM output selector\n");
776 1.38 gwr }
777 1.38 gwr
778 1.38 gwr switch (inSource) {
779 1.47 gwr default:
780 1.47 gwr mon_printf("cninit: invalid inSource=%d\n", inSource);
781 1.47 gwr sunmon_abort();
782 1.47 gwr inSource = 0;
783 1.47 gwr /* fall through */
784 1.47 gwr
785 1.47 gwr case 0: /* keyboard/display */
786 1.47 gwr #if NKBD > 0
787 1.50 gwr zs_unit = 0;
788 1.47 gwr channel = 0;
789 1.47 gwr cn = &consdev_kd;
790 1.47 gwr /* Set cn_dev, cn_pri in kd.c */
791 1.47 gwr break;
792 1.47 gwr #else /* NKBD */
793 1.47 gwr mon_printf("cninit: kdb/display not configured\n");
794 1.47 gwr sunmon_abort();
795 1.47 gwr inSource = 1;
796 1.47 gwr /* fall through */
797 1.47 gwr #endif /* NKBD */
798 1.47 gwr
799 1.38 gwr case 1: /* ttya */
800 1.38 gwr case 2: /* ttyb */
801 1.38 gwr case 3: /* ttyc (rewired keyboard connector) */
802 1.38 gwr case 4: /* ttyd (rewired mouse connector) */
803 1.43 gwr zstty_unit = inSource - 1;
804 1.50 gwr zs_unit = zstty_conf[zstty_unit].zs_unit;
805 1.50 gwr channel = zstty_conf[zstty_unit].channel;
806 1.38 gwr cn = &consdev_tty;
807 1.65 gehenna cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw),
808 1.65 gehenna zstty_unit);
809 1.38 gwr cn->cn_pri = CN_REMOTE;
810 1.38 gwr break;
811 1.38 gwr
812 1.1 glass }
813 1.47 gwr /* Now that inSource has been validated, print it. */
814 1.47 gwr mon_printf("console is %s\n", prom_inSrc_name[inSource]);
815 1.1 glass
816 1.50 gwr zc = zs_get_chan_addr(zs_unit, channel);
817 1.31 gwr if (zc == NULL) {
818 1.31 gwr mon_printf("cninit: zs not mapped.\n");
819 1.31 gwr return;
820 1.31 gwr }
821 1.31 gwr zs_conschan = zc;
822 1.50 gwr zs_hwflags[zs_unit][channel] = ZS_HWFLAG_CONSOLE;
823 1.31 gwr cn_tab = cn;
824 1.31 gwr (*cn->cn_init)(cn);
825 1.47 gwr #ifdef KGDB
826 1.47 gwr zs_kgdb_init();
827 1.47 gwr #endif
828 1.1 glass }
829