zs.c revision 1.91 1 1.91 andvar /* $NetBSD: zs.c,v 1.91 2021/09/11 20:28:05 andvar Exp $ */
2 1.10 cgd
3 1.42 gwr /*-
4 1.42 gwr * Copyright (c) 1996 The NetBSD Foundation, Inc.
5 1.31 gwr * All rights reserved.
6 1.1 glass *
7 1.42 gwr * This code is derived from software contributed to The NetBSD Foundation
8 1.42 gwr * by Gordon W. Ross.
9 1.42 gwr *
10 1.1 glass * Redistribution and use in source and binary forms, with or without
11 1.1 glass * modification, are permitted provided that the following conditions
12 1.1 glass * are met:
13 1.1 glass * 1. Redistributions of source code must retain the above copyright
14 1.1 glass * notice, this list of conditions and the following disclaimer.
15 1.1 glass * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 glass * notice, this list of conditions and the following disclaimer in the
17 1.1 glass * documentation and/or other materials provided with the distribution.
18 1.1 glass *
19 1.42 gwr * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.42 gwr * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.42 gwr * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.44 gwr * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.44 gwr * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.42 gwr * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.42 gwr * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.42 gwr * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.42 gwr * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.42 gwr * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.42 gwr * POSSIBILITY OF SUCH DAMAGE.
30 1.1 glass */
31 1.1 glass
32 1.1 glass /*
33 1.31 gwr * Zilog Z8530 Dual UART driver (machine-dependent part)
34 1.1 glass *
35 1.31 gwr * Runs two serial lines per chip using slave drivers.
36 1.31 gwr * Plain tty/async lines use the zs_async slave.
37 1.31 gwr * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
38 1.1 glass */
39 1.72 lukem
40 1.72 lukem #include <sys/cdefs.h>
41 1.91 andvar __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.91 2021/09/11 20:28:05 andvar Exp $");
42 1.62 lukem
43 1.62 lukem #include "opt_kgdb.h"
44 1.1 glass
45 1.5 gwr #include <sys/param.h>
46 1.1 glass #include <sys/systm.h>
47 1.43 gwr #include <sys/conf.h>
48 1.1 glass #include <sys/device.h>
49 1.1 glass #include <sys/file.h>
50 1.1 glass #include <sys/ioctl.h>
51 1.43 gwr #include <sys/kernel.h>
52 1.43 gwr #include <sys/proc.h>
53 1.1 glass #include <sys/tty.h>
54 1.1 glass #include <sys/time.h>
55 1.1 glass #include <sys/syslog.h>
56 1.81 tsutsui #include <sys/cpu.h>
57 1.81 tsutsui #include <sys/intr.h>
58 1.1 glass
59 1.77 tsutsui #include <uvm/uvm_extern.h>
60 1.77 tsutsui
61 1.1 glass #include <machine/autoconf.h>
62 1.3 gwr #include <machine/mon.h>
63 1.49 gwr #include <machine/z8530var.h>
64 1.49 gwr
65 1.53 gwr #include <sun3/sun3/machdep.h>
66 1.53 gwr #ifdef _SUN3X_
67 1.53 gwr #include <sun3/sun3x/obio.h>
68 1.53 gwr #else
69 1.53 gwr #include <sun3/sun3/obio.h>
70 1.53 gwr #endif
71 1.53 gwr #include <sun3/dev/zs_cons.h>
72 1.53 gwr
73 1.49 gwr #include <dev/cons.h>
74 1.49 gwr #include <dev/ic/z8530reg.h>
75 1.1 glass
76 1.82 tsutsui #include "ioconf.h"
77 1.50 gwr #include "kbd.h" /* NKBD */
78 1.50 gwr #include "zsc.h" /* NZSC */
79 1.50 gwr #define NZS NZSC
80 1.50 gwr
81 1.50 gwr /* Make life easier for the initialized arrays here. */
82 1.50 gwr #if NZS < 2
83 1.50 gwr #undef NZS
84 1.50 gwr #define NZS 2
85 1.50 gwr #endif
86 1.47 gwr
87 1.16 gwr /*
88 1.43 gwr * Some warts needed by z8530tty.c -
89 1.43 gwr * The default parity REALLY needs to be the same as the PROM uses,
90 1.43 gwr * or you can not see messages done with printf during boot-up...
91 1.43 gwr */
92 1.43 gwr int zs_def_cflag = (CREAD | CS8 | HUPCL);
93 1.1 glass
94 1.43 gwr /*
95 1.43 gwr * The Sun3 provides a 4.9152 MHz clock to the ZS chips.
96 1.43 gwr */
97 1.2 glass #define PCLK (9600 * 512) /* PCLK pin input clock rate */
98 1.2 glass
99 1.2 glass /*
100 1.22 gwr * Define interrupt levels.
101 1.2 glass */
102 1.2 glass #define ZSHARD_PRI 6 /* Wired on the CPU board... */
103 1.78 tsutsui #define ZSSOFT_PRI _IPL_SOFT_LEVEL3 /* Want tty pri (4) but this is OK. */
104 1.1 glass
105 1.33 gwr #define ZS_DELAY() delay(2)
106 1.31 gwr
107 1.31 gwr /* The layout of this is hardware-dependent (padding, order). */
108 1.31 gwr struct zschan {
109 1.82 tsutsui volatile uint8_t zc_csr; /* ctrl,status, and indirect access */
110 1.82 tsutsui uint8_t zc_xxx0;
111 1.82 tsutsui volatile uint8_t zc_data; /* data */
112 1.82 tsutsui uint8_t zc_xxx1;
113 1.31 gwr };
114 1.31 gwr struct zsdevice {
115 1.31 gwr /* Yes, they are backwards. */
116 1.31 gwr struct zschan zs_chan_b;
117 1.31 gwr struct zschan zs_chan_a;
118 1.1 glass };
119 1.1 glass
120 1.1 glass
121 1.31 gwr /* Default OBIO addresses. */
122 1.50 gwr static int zs_physaddr[NZS] = {
123 1.44 gwr OBIO_ZS_KBD_MS,
124 1.44 gwr OBIO_ZS_TTY_AB };
125 1.43 gwr
126 1.31 gwr /* Saved PROM mappings */
127 1.50 gwr static struct zsdevice *zsaddr[NZS];
128 1.43 gwr
129 1.31 gwr /* Flags from cninit() */
130 1.50 gwr static int zs_hwflags[NZS][2];
131 1.43 gwr
132 1.31 gwr /* Default speed for each channel */
133 1.50 gwr static int zs_defspeed[NZS][2] = {
134 1.31 gwr { 1200, /* keyboard */
135 1.31 gwr 1200 }, /* mouse */
136 1.31 gwr { 9600, /* ttya */
137 1.31 gwr 9600 }, /* ttyb */
138 1.31 gwr };
139 1.13 gwr
140 1.82 tsutsui static uint8_t zs_init_reg[16] = {
141 1.43 gwr 0, /* 0: CMD (reset, etc.) */
142 1.43 gwr 0, /* 1: No interrupts yet. */
143 1.43 gwr 0x18 + ZSHARD_PRI, /* IVECT */
144 1.43 gwr ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
145 1.43 gwr ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
146 1.43 gwr ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
147 1.43 gwr 0, /* 6: TXSYNC/SYNCLO */
148 1.43 gwr 0, /* 7: RXSYNC/SYNCHI */
149 1.43 gwr 0, /* 8: alias for data port */
150 1.43 gwr ZSWR9_MASTER_IE,
151 1.43 gwr 0, /*10: Misc. TX/RX control bits */
152 1.43 gwr ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
153 1.56 mycroft ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */
154 1.56 mycroft 0, /*13: BAUDHI (default=9600) */
155 1.43 gwr ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
156 1.55 mycroft ZSWR15_BREAK_IE,
157 1.43 gwr };
158 1.43 gwr
159 1.1 glass
160 1.31 gwr /* Find PROM mappings (for console support). */
161 1.73 chs void
162 1.73 chs zs_init(void)
163 1.31 gwr {
164 1.77 tsutsui vaddr_t va;
165 1.31 gwr int i;
166 1.1 glass
167 1.50 gwr for (i = 0; i < NZS; i++) {
168 1.77 tsutsui if (find_prom_map(zs_physaddr[i], PMAP_OBIO,
169 1.77 tsutsui sizeof(struct zschan), &va) == 0)
170 1.77 tsutsui zsaddr[i] = (void *)va;
171 1.31 gwr }
172 1.43 gwr }
173 1.13 gwr
174 1.47 gwr struct zschan *
175 1.73 chs zs_get_chan_addr(int zs_unit, int channel)
176 1.31 gwr {
177 1.31 gwr struct zsdevice *addr;
178 1.31 gwr struct zschan *zc;
179 1.31 gwr
180 1.50 gwr if (zs_unit >= NZS)
181 1.31 gwr return NULL;
182 1.50 gwr addr = zsaddr[zs_unit];
183 1.31 gwr if (addr == NULL)
184 1.31 gwr return NULL;
185 1.31 gwr if (channel == 0) {
186 1.31 gwr zc = &addr->zs_chan_a;
187 1.31 gwr } else {
188 1.31 gwr zc = &addr->zs_chan_b;
189 1.31 gwr }
190 1.31 gwr return (zc);
191 1.31 gwr }
192 1.13 gwr
193 1.18 gwr
194 1.31 gwr /****************************************************************
195 1.31 gwr * Autoconfig
196 1.31 gwr ****************************************************************/
197 1.31 gwr
198 1.31 gwr /* Definition of the driver for autoconfig. */
199 1.82 tsutsui static int zs_match(device_t, cfdata_t, void *);
200 1.82 tsutsui static void zs_attach(device_t, device_t, void *);
201 1.73 chs static int zs_print(void *, const char *);
202 1.31 gwr
203 1.82 tsutsui CFATTACH_DECL_NEW(zsc, sizeof(struct zsc_softc),
204 1.69 thorpej zs_match, zs_attach, NULL, NULL);
205 1.34 thorpej
206 1.73 chs static int zshard(void *);
207 1.73 chs static int zs_get_speed(struct zs_chanstate *);
208 1.31 gwr
209 1.9 gwr
210 1.1 glass /*
211 1.31 gwr * Is the zs chip present?
212 1.1 glass */
213 1.73 chs static int
214 1.82 tsutsui zs_match(device_t parent, cfdata_t cf, void *aux)
215 1.1 glass {
216 1.31 gwr struct confargs *ca = aux;
217 1.61 chs int unit;
218 1.35 gwr void *va;
219 1.13 gwr
220 1.35 gwr /*
221 1.43 gwr * This driver only supports its wired-in mappings,
222 1.43 gwr * because the console support depends on those.
223 1.35 gwr */
224 1.61 chs if (ca->ca_paddr == zs_physaddr[0]) {
225 1.61 chs unit = 0;
226 1.61 chs } else if (ca->ca_paddr == zs_physaddr[1]) {
227 1.61 chs unit = 1;
228 1.61 chs } else {
229 1.35 gwr return (0);
230 1.61 chs }
231 1.35 gwr
232 1.31 gwr /* Make sure zs_init() found mappings. */
233 1.35 gwr va = zsaddr[unit];
234 1.35 gwr if (va == NULL)
235 1.21 gwr return (0);
236 1.21 gwr
237 1.21 gwr /* This returns -1 on a fault (bus error). */
238 1.43 gwr if (peek_byte(va) == -1)
239 1.43 gwr return (0);
240 1.43 gwr
241 1.43 gwr /* Default interrupt priority (always splbio==2) */
242 1.43 gwr if (ca->ca_intpri == -1)
243 1.43 gwr ca->ca_intpri = ZSHARD_PRI;
244 1.43 gwr
245 1.43 gwr return (1);
246 1.1 glass }
247 1.1 glass
248 1.1 glass /*
249 1.1 glass * Attach a found zs.
250 1.1 glass *
251 1.31 gwr * Match slave number to zs unit number, so that misconfiguration will
252 1.31 gwr * not set up the keyboard as ttya, etc.
253 1.1 glass */
254 1.73 chs static void
255 1.82 tsutsui zs_attach(device_t parent, device_t self, void *aux)
256 1.31 gwr {
257 1.82 tsutsui struct zsc_softc *zsc = device_private(self);
258 1.31 gwr struct confargs *ca = aux;
259 1.31 gwr struct zsc_attach_args zsc_args;
260 1.31 gwr volatile struct zschan *zc;
261 1.31 gwr struct zs_chanstate *cs;
262 1.86 mrg int zs_unit, channel;
263 1.2 glass
264 1.82 tsutsui zsc->zsc_dev = self;
265 1.82 tsutsui zs_unit = device_unit(self);
266 1.13 gwr
267 1.82 tsutsui aprint_normal(": (softpri %d)\n", ZSSOFT_PRI);
268 1.1 glass
269 1.31 gwr /* Use the mapping setup by the Sun PROM. */
270 1.50 gwr if (zsaddr[zs_unit] == NULL)
271 1.66 provos panic("zs_attach: zs%d not mapped", zs_unit);
272 1.31 gwr
273 1.31 gwr /*
274 1.31 gwr * Initialize software state for each channel.
275 1.31 gwr */
276 1.31 gwr for (channel = 0; channel < 2; channel++) {
277 1.43 gwr zsc_args.channel = channel;
278 1.50 gwr zsc_args.hwflags = zs_hwflags[zs_unit][channel];
279 1.43 gwr cs = &zsc->zsc_cs_store[channel];
280 1.43 gwr zsc->zsc_cs[channel] = cs;
281 1.1 glass
282 1.80 ad zs_lock_init(cs);
283 1.31 gwr cs->cs_channel = channel;
284 1.31 gwr cs->cs_private = NULL;
285 1.31 gwr cs->cs_ops = &zsops_null;
286 1.37 gwr cs->cs_brg_clk = PCLK / 16;
287 1.31 gwr
288 1.50 gwr zc = zs_get_chan_addr(zs_unit, channel);
289 1.43 gwr cs->cs_reg_csr = &zc->zc_csr;
290 1.43 gwr cs->cs_reg_data = &zc->zc_data;
291 1.2 glass
292 1.64 tsutsui memcpy(cs->cs_creg, zs_init_reg, 16);
293 1.64 tsutsui memcpy(cs->cs_preg, zs_init_reg, 16);
294 1.15 gwr
295 1.43 gwr /* XXX: Get these from the EEPROM instead? */
296 1.43 gwr /* XXX: See the mvme167 code. Better. */
297 1.43 gwr if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
298 1.43 gwr cs->cs_defspeed = zs_get_speed(cs);
299 1.43 gwr else
300 1.50 gwr cs->cs_defspeed = zs_defspeed[zs_unit][channel];
301 1.43 gwr cs->cs_defcflag = zs_def_cflag;
302 1.43 gwr
303 1.47 gwr /* Make these correspond to cs_defcflag (-crtscts) */
304 1.46 gwr cs->cs_rr0_dcd = ZSRR0_DCD;
305 1.47 gwr cs->cs_rr0_cts = 0;
306 1.47 gwr cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
307 1.47 gwr cs->cs_wr5_rts = 0;
308 1.46 gwr
309 1.1 glass /*
310 1.31 gwr * Clear the master interrupt enable.
311 1.31 gwr * The INTENA is common to both channels,
312 1.31 gwr * so just do it on the A channel.
313 1.1 glass */
314 1.31 gwr if (channel == 0) {
315 1.32 gwr zs_write_reg(cs, 9, 0);
316 1.31 gwr }
317 1.15 gwr
318 1.1 glass /*
319 1.31 gwr * Look for a child driver for this channel.
320 1.31 gwr * The child attach will setup the hardware.
321 1.1 glass */
322 1.89 thorpej if (!config_found(self, (void *)&zsc_args, zs_print,
323 1.90 thorpej CFARGS_NONE)) {
324 1.31 gwr /* No sub-driver. Just reset it. */
325 1.82 tsutsui uint8_t reset = (channel == 0) ?
326 1.31 gwr ZSWR9_A_RESET : ZSWR9_B_RESET;
327 1.86 mrg zs_lock_chan(cs);
328 1.32 gwr zs_write_reg(cs, 9, reset);
329 1.86 mrg zs_unlock_chan(cs);
330 1.31 gwr }
331 1.1 glass }
332 1.1 glass
333 1.43 gwr /*
334 1.85 tsutsui * Now safe to install interrupt handlers.
335 1.43 gwr */
336 1.85 tsutsui isr_add_autovect(zshard, zsc, ca->ca_intpri);
337 1.81 tsutsui zsc->zs_si = softint_establish(SOFTINT_SERIAL,
338 1.79 tsutsui (void (*)(void *))zsc_intr_soft, zsc);
339 1.50 gwr /* XXX; evcnt_attach() ? */
340 1.24 gwr
341 1.31 gwr /*
342 1.31 gwr * Set the master interrupt enable and interrupt vector.
343 1.31 gwr * (common to both channels, do it on A)
344 1.31 gwr */
345 1.43 gwr cs = zsc->zsc_cs[0];
346 1.86 mrg zs_lock_chan(cs);
347 1.31 gwr /* interrupt vector */
348 1.32 gwr zs_write_reg(cs, 2, zs_init_reg[2]);
349 1.31 gwr /* master interrupt control (enable) */
350 1.32 gwr zs_write_reg(cs, 9, zs_init_reg[9]);
351 1.86 mrg zs_unlock_chan(cs);
352 1.45 gwr
353 1.45 gwr /*
354 1.45 gwr * XXX: L1A hack - We would like to be able to break into
355 1.45 gwr * the debugger during the rest of autoconfiguration, so
356 1.45 gwr * lower interrupts just enough to let zs interrupts in.
357 1.50 gwr * This is done after both zs devices are attached.
358 1.45 gwr */
359 1.50 gwr if (zs_unit == 1) {
360 1.45 gwr (void)spl5(); /* splzs - 1 */
361 1.45 gwr }
362 1.35 gwr }
363 1.35 gwr
364 1.73 chs static int
365 1.73 chs zs_print(void *aux, const char *name)
366 1.35 gwr {
367 1.35 gwr struct zsc_attach_args *args = aux;
368 1.35 gwr
369 1.35 gwr if (name != NULL)
370 1.70 thorpej aprint_normal("%s: ", name);
371 1.35 gwr
372 1.35 gwr if (args->channel != -1)
373 1.70 thorpej aprint_normal(" channel %d", args->channel);
374 1.35 gwr
375 1.35 gwr return UNCONF;
376 1.24 gwr }
377 1.24 gwr
378 1.43 gwr /*
379 1.43 gwr * Our ZS chips all share a common, autovectored interrupt,
380 1.85 tsutsui * but we establish zshard handler per each ZS chip
381 1.85 tsutsui * to avoid holding unnecessary locks in interrupt context.
382 1.43 gwr */
383 1.73 chs static int
384 1.73 chs zshard(void *arg)
385 1.1 glass {
386 1.85 tsutsui struct zsc_softc *zsc = arg;
387 1.85 tsutsui int rval;
388 1.43 gwr
389 1.85 tsutsui rval = zsc_intr_hard(zsc);
390 1.85 tsutsui if (zsc->zsc_cs[0]->cs_softreq || zsc->zsc_cs[1]->cs_softreq)
391 1.85 tsutsui softint_schedule(zsc->zs_si);
392 1.48 gwr
393 1.31 gwr return (rval);
394 1.1 glass }
395 1.1 glass
396 1.43 gwr /*
397 1.50 gwr * Compute the current baud rate given a ZS channel.
398 1.43 gwr */
399 1.73 chs static int
400 1.73 chs zs_get_speed(struct zs_chanstate *cs)
401 1.43 gwr {
402 1.43 gwr int tconst;
403 1.43 gwr
404 1.43 gwr tconst = zs_read_reg(cs, 12);
405 1.43 gwr tconst |= zs_read_reg(cs, 13) << 8;
406 1.43 gwr return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
407 1.43 gwr }
408 1.43 gwr
409 1.43 gwr /*
410 1.43 gwr * MD functions for setting the baud rate and control modes.
411 1.43 gwr */
412 1.73 chs int
413 1.73 chs zs_set_speed(struct zs_chanstate *cs, int bps)
414 1.43 gwr {
415 1.43 gwr int tconst, real_bps;
416 1.43 gwr
417 1.43 gwr if (bps == 0)
418 1.43 gwr return (0);
419 1.43 gwr
420 1.43 gwr #ifdef DIAGNOSTIC
421 1.43 gwr if (cs->cs_brg_clk == 0)
422 1.43 gwr panic("zs_set_speed");
423 1.43 gwr #endif
424 1.43 gwr
425 1.43 gwr tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
426 1.43 gwr if (tconst < 0)
427 1.43 gwr return (EINVAL);
428 1.43 gwr
429 1.43 gwr /* Convert back to make sure we can do it. */
430 1.43 gwr real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
431 1.43 gwr
432 1.43 gwr /* XXX - Allow some tolerance here? */
433 1.43 gwr if (real_bps != bps)
434 1.43 gwr return (EINVAL);
435 1.43 gwr
436 1.43 gwr cs->cs_preg[12] = tconst;
437 1.43 gwr cs->cs_preg[13] = tconst >> 8;
438 1.43 gwr
439 1.43 gwr /* Caller will stuff the pending registers. */
440 1.43 gwr return (0);
441 1.43 gwr }
442 1.43 gwr
443 1.73 chs int
444 1.73 chs zs_set_modes(struct zs_chanstate *cs, int cflag /* bits per second */)
445 1.43 gwr {
446 1.43 gwr
447 1.43 gwr /*
448 1.43 gwr * Output hardware flow control on the chip is horrendous:
449 1.43 gwr * if carrier detect drops, the receiver is disabled, and if
450 1.91 andvar * CTS drops, the transmitter is stopped IN MID CHARACTER!
451 1.43 gwr * Therefore, NEVER set the HFC bit, and instead use the
452 1.43 gwr * status interrupt to detect CTS changes.
453 1.43 gwr */
454 1.86 mrg zs_lock_chan(cs);
455 1.57 wrstuden cs->cs_rr0_pps = 0;
456 1.57 wrstuden if ((cflag & (CLOCAL | MDMBUF)) != 0) {
457 1.43 gwr cs->cs_rr0_dcd = 0;
458 1.57 wrstuden if ((cflag & MDMBUF) == 0)
459 1.57 wrstuden cs->cs_rr0_pps = ZSRR0_DCD;
460 1.57 wrstuden } else
461 1.43 gwr cs->cs_rr0_dcd = ZSRR0_DCD;
462 1.51 mycroft if ((cflag & CRTSCTS) != 0) {
463 1.43 gwr cs->cs_wr5_dtr = ZSWR5_DTR;
464 1.43 gwr cs->cs_wr5_rts = ZSWR5_RTS;
465 1.43 gwr cs->cs_rr0_cts = ZSRR0_CTS;
466 1.51 mycroft } else if ((cflag & MDMBUF) != 0) {
467 1.51 mycroft cs->cs_wr5_dtr = 0;
468 1.51 mycroft cs->cs_wr5_rts = ZSWR5_DTR;
469 1.51 mycroft cs->cs_rr0_cts = ZSRR0_DCD;
470 1.43 gwr } else {
471 1.43 gwr cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
472 1.43 gwr cs->cs_wr5_rts = 0;
473 1.43 gwr cs->cs_rr0_cts = 0;
474 1.43 gwr }
475 1.86 mrg zs_unlock_chan(cs);
476 1.43 gwr
477 1.43 gwr /* Caller will stuff the pending registers. */
478 1.43 gwr return (0);
479 1.43 gwr }
480 1.43 gwr
481 1.43 gwr
482 1.43 gwr /*
483 1.31 gwr * Read or write the chip with suitable delays.
484 1.31 gwr */
485 1.2 glass
486 1.82 tsutsui uint8_t
487 1.82 tsutsui zs_read_reg(struct zs_chanstate *cs, uint8_t reg)
488 1.1 glass {
489 1.82 tsutsui uint8_t val;
490 1.1 glass
491 1.31 gwr *cs->cs_reg_csr = reg;
492 1.31 gwr ZS_DELAY();
493 1.31 gwr val = *cs->cs_reg_csr;
494 1.31 gwr ZS_DELAY();
495 1.31 gwr return val;
496 1.17 gwr }
497 1.3 gwr
498 1.31 gwr void
499 1.82 tsutsui zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)
500 1.17 gwr {
501 1.31 gwr *cs->cs_reg_csr = reg;
502 1.31 gwr ZS_DELAY();
503 1.31 gwr *cs->cs_reg_csr = val;
504 1.32 gwr ZS_DELAY();
505 1.32 gwr }
506 1.32 gwr
507 1.82 tsutsui uint8_t
508 1.73 chs zs_read_csr(struct zs_chanstate *cs)
509 1.32 gwr {
510 1.82 tsutsui uint8_t val;
511 1.32 gwr
512 1.43 gwr val = *cs->cs_reg_csr;
513 1.32 gwr ZS_DELAY();
514 1.43 gwr return val;
515 1.32 gwr }
516 1.32 gwr
517 1.73 chs void
518 1.82 tsutsui zs_write_csr(struct zs_chanstate *cs, uint8_t val)
519 1.32 gwr {
520 1.43 gwr *cs->cs_reg_csr = val;
521 1.32 gwr ZS_DELAY();
522 1.32 gwr }
523 1.32 gwr
524 1.82 tsutsui uint8_t
525 1.73 chs zs_read_data(struct zs_chanstate *cs)
526 1.32 gwr {
527 1.82 tsutsui uint8_t val;
528 1.43 gwr
529 1.43 gwr val = *cs->cs_reg_data;
530 1.32 gwr ZS_DELAY();
531 1.43 gwr return val;
532 1.32 gwr }
533 1.32 gwr
534 1.73 chs void
535 1.82 tsutsui zs_write_data(struct zs_chanstate *cs, uint8_t val)
536 1.32 gwr {
537 1.32 gwr *cs->cs_reg_data = val;
538 1.31 gwr ZS_DELAY();
539 1.1 glass }
540 1.3 gwr
541 1.31 gwr /****************************************************************
542 1.31 gwr * Console support functions (Sun3 specific!)
543 1.43 gwr * Note: this code is allowed to know about the layout of
544 1.43 gwr * the chip registers, and uses that to keep things simple.
545 1.43 gwr * XXX - I think I like the mvme167 code better. -gwr
546 1.31 gwr ****************************************************************/
547 1.1 glass
548 1.43 gwr void *zs_conschan;
549 1.43 gwr
550 1.2 glass /*
551 1.47 gwr * Handle user request to enter kernel debugger.
552 1.47 gwr */
553 1.73 chs void
554 1.73 chs zs_abort(struct zs_chanstate *cs)
555 1.47 gwr {
556 1.63 tsutsui volatile struct zschan *zc = zs_conschan;
557 1.47 gwr int rr0;
558 1.47 gwr
559 1.47 gwr /* Wait for end of break to avoid PROM abort. */
560 1.47 gwr /* XXX - Limit the wait? */
561 1.47 gwr do {
562 1.47 gwr rr0 = zc->zc_csr;
563 1.47 gwr ZS_DELAY();
564 1.47 gwr } while (rr0 & ZSRR0_BREAK);
565 1.47 gwr
566 1.59 jdolecek /* This is always available on the Sun3. */
567 1.47 gwr Debugger();
568 1.47 gwr }
569 1.47 gwr
570 1.47 gwr /*
571 1.31 gwr * Polled input char.
572 1.2 glass */
573 1.73 chs int
574 1.73 chs zs_getc(void *arg)
575 1.2 glass {
576 1.63 tsutsui volatile struct zschan *zc = arg;
577 1.63 tsutsui int s, c, rr0;
578 1.2 glass
579 1.2 glass s = splhigh();
580 1.9 gwr /* Wait for a character to arrive. */
581 1.25 gwr do {
582 1.25 gwr rr0 = zc->zc_csr;
583 1.3 gwr ZS_DELAY();
584 1.25 gwr } while ((rr0 & ZSRR0_RX_READY) == 0);
585 1.9 gwr
586 1.2 glass c = zc->zc_data;
587 1.9 gwr ZS_DELAY();
588 1.2 glass splx(s);
589 1.17 gwr
590 1.17 gwr /*
591 1.17 gwr * This is used by the kd driver to read scan codes,
592 1.17 gwr * so don't translate '\r' ==> '\n' here...
593 1.17 gwr */
594 1.2 glass return (c);
595 1.2 glass }
596 1.1 glass
597 1.1 glass /*
598 1.31 gwr * Polled output char.
599 1.1 glass */
600 1.73 chs void
601 1.73 chs zs_putc(void *arg, int c)
602 1.1 glass {
603 1.63 tsutsui volatile struct zschan *zc = arg;
604 1.63 tsutsui int s, rr0;
605 1.1 glass
606 1.9 gwr s = splhigh();
607 1.9 gwr /* Wait for transmitter to become ready. */
608 1.25 gwr do {
609 1.25 gwr rr0 = zc->zc_csr;
610 1.3 gwr ZS_DELAY();
611 1.25 gwr } while ((rr0 & ZSRR0_TX_READY) == 0);
612 1.9 gwr
613 1.1 glass zc->zc_data = c;
614 1.3 gwr ZS_DELAY();
615 1.1 glass splx(s);
616 1.1 glass }
617 1.2 glass
618 1.50 gwr /*****************************************************************/
619 1.50 gwr
620 1.73 chs static void zscninit(struct consdev *);
621 1.73 chs static int zscngetc(dev_t);
622 1.73 chs static void zscnputc(dev_t, int);
623 1.50 gwr
624 1.50 gwr /*
625 1.50 gwr * Console table shared by ttya, ttyb
626 1.50 gwr */
627 1.50 gwr struct consdev consdev_tty = {
628 1.50 gwr nullcnprobe,
629 1.50 gwr zscninit,
630 1.50 gwr zscngetc,
631 1.50 gwr zscnputc,
632 1.50 gwr nullcnpollc,
633 1.60 thorpej NULL,
634 1.50 gwr };
635 1.50 gwr
636 1.73 chs static void
637 1.73 chs zscninit(struct consdev *cn)
638 1.50 gwr {
639 1.50 gwr }
640 1.50 gwr
641 1.50 gwr /*
642 1.50 gwr * Polled console input putchar.
643 1.50 gwr */
644 1.73 chs static int
645 1.73 chs zscngetc(dev_t dev)
646 1.50 gwr {
647 1.50 gwr return (zs_getc(zs_conschan));
648 1.50 gwr }
649 1.50 gwr
650 1.50 gwr /*
651 1.50 gwr * Polled console output putchar.
652 1.50 gwr */
653 1.73 chs static void
654 1.73 chs zscnputc(dev_t dev, int c)
655 1.50 gwr {
656 1.50 gwr zs_putc(zs_conschan, c);
657 1.50 gwr }
658 1.50 gwr
659 1.50 gwr /*****************************************************************/
660 1.50 gwr
661 1.73 chs static void prom_cninit(struct consdev *);
662 1.73 chs static int prom_cngetc(dev_t);
663 1.73 chs static void prom_cnputc(dev_t, int);
664 1.50 gwr
665 1.50 gwr /*
666 1.50 gwr * The console is set to this one initially,
667 1.50 gwr * which lets us use the PROM until consinit()
668 1.50 gwr * is called to select a real console.
669 1.50 gwr */
670 1.50 gwr struct consdev consdev_prom = {
671 1.50 gwr nullcnprobe,
672 1.50 gwr prom_cninit,
673 1.50 gwr prom_cngetc,
674 1.50 gwr prom_cnputc,
675 1.50 gwr nullcnpollc,
676 1.50 gwr };
677 1.50 gwr
678 1.73 chs void
679 1.73 chs nullcnprobe(struct consdev *cn)
680 1.50 gwr {
681 1.50 gwr }
682 1.50 gwr
683 1.73 chs static void
684 1.73 chs prom_cninit(struct consdev *cn)
685 1.50 gwr {
686 1.50 gwr }
687 1.50 gwr
688 1.50 gwr /*
689 1.50 gwr * PROM console input putchar.
690 1.50 gwr * (dummy - this is output only)
691 1.50 gwr */
692 1.73 chs static int
693 1.73 chs prom_cngetc(dev_t dev)
694 1.50 gwr {
695 1.50 gwr return (0);
696 1.50 gwr }
697 1.50 gwr
698 1.50 gwr /*
699 1.50 gwr * PROM console output putchar.
700 1.50 gwr */
701 1.73 chs static void
702 1.73 chs prom_cnputc(dev_t dev, int c)
703 1.50 gwr {
704 1.50 gwr (*romVectorPtr->putChar)(c & 0x7f);
705 1.50 gwr }
706 1.50 gwr
707 1.50 gwr /*****************************************************************/
708 1.50 gwr
709 1.50 gwr extern struct consdev consdev_kd;
710 1.31 gwr
711 1.87 matt static const struct {
712 1.50 gwr int zs_unit, channel;
713 1.50 gwr } zstty_conf[NZS*2] = {
714 1.43 gwr /* XXX: knowledge from the config file here... */
715 1.43 gwr { 1, 0 }, /* ttya */
716 1.43 gwr { 1, 1 }, /* ttyb */
717 1.43 gwr { 0, 0 }, /* ttyc */
718 1.43 gwr { 0, 1 }, /* ttyd */
719 1.43 gwr };
720 1.31 gwr
721 1.87 matt static const char * const prom_inSrc_name[] = {
722 1.47 gwr "keyboard/display",
723 1.47 gwr "ttya", "ttyb",
724 1.47 gwr "ttyc", "ttyd" };
725 1.47 gwr
726 1.1 glass /*
727 1.31 gwr * This function replaces sys/dev/cninit.c
728 1.31 gwr * Determine which device is the console using
729 1.38 gwr * the PROM "input source" and "output sink".
730 1.1 glass */
731 1.73 chs void
732 1.73 chs cninit(void)
733 1.1 glass {
734 1.53 gwr struct sunromvec *v;
735 1.31 gwr struct zschan *zc;
736 1.31 gwr struct consdev *cn;
737 1.50 gwr int channel, zs_unit, zstty_unit;
738 1.82 tsutsui uint8_t inSource, outSink;
739 1.65 gehenna extern const struct cdevsw zstty_cdevsw;
740 1.53 gwr
741 1.53 gwr /* Get the zs driver ready for console duty. */
742 1.53 gwr zs_init();
743 1.31 gwr
744 1.38 gwr v = romVectorPtr;
745 1.50 gwr inSource = *v->inSource;
746 1.50 gwr outSink = *v->outSink;
747 1.50 gwr if (inSource != outSink) {
748 1.38 gwr mon_printf("cninit: mismatched PROM output selector\n");
749 1.38 gwr }
750 1.38 gwr
751 1.38 gwr switch (inSource) {
752 1.47 gwr default:
753 1.47 gwr mon_printf("cninit: invalid inSource=%d\n", inSource);
754 1.47 gwr sunmon_abort();
755 1.47 gwr inSource = 0;
756 1.47 gwr /* fall through */
757 1.47 gwr
758 1.47 gwr case 0: /* keyboard/display */
759 1.47 gwr #if NKBD > 0
760 1.50 gwr zs_unit = 0;
761 1.47 gwr channel = 0;
762 1.47 gwr cn = &consdev_kd;
763 1.47 gwr /* Set cn_dev, cn_pri in kd.c */
764 1.47 gwr break;
765 1.47 gwr #else /* NKBD */
766 1.47 gwr mon_printf("cninit: kdb/display not configured\n");
767 1.47 gwr sunmon_abort();
768 1.47 gwr inSource = 1;
769 1.47 gwr /* fall through */
770 1.47 gwr #endif /* NKBD */
771 1.47 gwr
772 1.38 gwr case 1: /* ttya */
773 1.38 gwr case 2: /* ttyb */
774 1.38 gwr case 3: /* ttyc (rewired keyboard connector) */
775 1.38 gwr case 4: /* ttyd (rewired mouse connector) */
776 1.43 gwr zstty_unit = inSource - 1;
777 1.50 gwr zs_unit = zstty_conf[zstty_unit].zs_unit;
778 1.50 gwr channel = zstty_conf[zstty_unit].channel;
779 1.38 gwr cn = &consdev_tty;
780 1.65 gehenna cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw),
781 1.65 gehenna zstty_unit);
782 1.38 gwr cn->cn_pri = CN_REMOTE;
783 1.38 gwr break;
784 1.38 gwr
785 1.1 glass }
786 1.47 gwr /* Now that inSource has been validated, print it. */
787 1.47 gwr mon_printf("console is %s\n", prom_inSrc_name[inSource]);
788 1.1 glass
789 1.50 gwr zc = zs_get_chan_addr(zs_unit, channel);
790 1.31 gwr if (zc == NULL) {
791 1.31 gwr mon_printf("cninit: zs not mapped.\n");
792 1.31 gwr return;
793 1.31 gwr }
794 1.31 gwr zs_conschan = zc;
795 1.50 gwr zs_hwflags[zs_unit][channel] = ZS_HWFLAG_CONSOLE;
796 1.31 gwr cn_tab = cn;
797 1.31 gwr (*cn->cn_init)(cn);
798 1.47 gwr #ifdef KGDB
799 1.47 gwr zs_kgdb_init();
800 1.47 gwr #endif
801 1.1 glass }
802