zs.c revision 1.33
1 /* $NetBSD: zs.c,v 1.33 1996/02/16 18:00:33 gwr Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Gordon W. Ross 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 4. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by Gordon Ross 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Zilog Z8530 Dual UART driver (machine-dependent part) 35 * 36 * Runs two serial lines per chip using slave drivers. 37 * Plain tty/async lines use the zs_async slave. 38 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 39 */ 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/proc.h> 44 #include <sys/device.h> 45 #include <sys/conf.h> 46 #include <sys/file.h> 47 #include <sys/ioctl.h> 48 #include <sys/tty.h> 49 #include <sys/time.h> 50 #include <sys/kernel.h> 51 #include <sys/syslog.h> 52 53 #include <dev/cons.h> 54 #include <dev/ic/z8530reg.h> 55 #include <machine/z8530var.h> 56 57 #include <machine/autoconf.h> 58 #include <machine/cpu.h> 59 #include <machine/eeprom.h> 60 #include <machine/isr.h> 61 #include <machine/obio.h> 62 #include <machine/mon.h> 63 64 /* 65 * XXX: Hard code this to make console init easier... 66 */ 67 #define NZS 2 /* XXX */ 68 69 70 /* The Sun3 provides a 4.9152 MHz clock to the ZS chips. */ 71 #define PCLK (9600 * 512) /* PCLK pin input clock rate */ 72 73 /* 74 * Define interrupt levels. 75 */ 76 #define ZSHARD_PRI 6 /* Wired on the CPU board... */ 77 #define ZSSOFT_PRI 3 /* Want tty pri (4) but this is OK. */ 78 79 #define ZS_DELAY() delay(2) 80 81 /* The layout of this is hardware-dependent (padding, order). */ 82 struct zschan { 83 volatile u_char zc_csr; /* ctrl,status, and indirect access */ 84 u_char zc_xxx0; 85 volatile u_char zc_data; /* data */ 86 u_char zc_xxx1; 87 }; 88 struct zsdevice { 89 /* Yes, they are backwards. */ 90 struct zschan zs_chan_b; 91 struct zschan zs_chan_a; 92 }; 93 94 95 /* Default OBIO addresses. */ 96 static int zs_physaddr[NZS] = { OBIO_KEYBD_MS, OBIO_ZS }; 97 /* Saved PROM mappings */ 98 static struct zsdevice *zsaddr[NZS]; /* See zs_init() */ 99 /* Flags from cninit() */ 100 static int zs_hwflags[NZS][2]; 101 /* Default speed for each channel */ 102 static int zs_defspeed[NZS][2] = { 103 { 1200, /* keyboard */ 104 1200 }, /* mouse */ 105 { 9600, /* ttya */ 106 9600 }, /* ttyb */ 107 }; 108 109 110 /* Find PROM mappings (for console support). */ 111 void zs_init() 112 { 113 int i; 114 115 for (i = 0; i < NZS; i++) { 116 zsaddr[i] = (struct zsdevice *) 117 obio_find_mapping(zs_physaddr[i], OBIO_ZS_SIZE); 118 } 119 } 120 121 122 struct zschan * 123 zs_get_chan_addr(zsc_unit, channel) 124 int zsc_unit, channel; 125 { 126 struct zsdevice *addr; 127 struct zschan *zc; 128 129 if (zsc_unit >= NZS) 130 return NULL; 131 addr = zsaddr[zsc_unit]; 132 if (addr == NULL) 133 return NULL; 134 if (channel == 0) { 135 zc = &addr->zs_chan_a; 136 } else { 137 zc = &addr->zs_chan_b; 138 } 139 return (zc); 140 } 141 142 143 static u_char zs_init_reg[16] = { 144 0, /* 0: CMD (reset, etc.) */ 145 ZSWR1_RIE | ZSWR1_TIE | ZSWR1_SIE, 146 0x18 + ZSHARD_PRI, /* IVECT */ 147 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 148 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 149 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 150 0, /* 6: TXSYNC/SYNCLO */ 151 0, /* 7: RXSYNC/SYNCHI */ 152 0, /* 8: alias for data port */ 153 ZSWR9_MASTER_IE, 154 0, /*10: Misc. TX/RX control bits */ 155 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 156 14, /*12: BAUDLO (default=9600) */ 157 0, /*13: BAUDHI (default=9600) */ 158 ZSWR14_BAUD_FROM_PCLK | ZSWR14_BAUD_ENA, 159 ZSWR15_BREAK_IE | ZSWR15_DCD_IE, 160 }; 161 162 163 /**************************************************************** 164 * Autoconfig 165 ****************************************************************/ 166 167 /* Definition of the driver for autoconfig. */ 168 static int zsc_match(struct device *, void *, void *); 169 static void zsc_attach(struct device *, struct device *, void *); 170 171 struct cfdriver zsccd = { 172 NULL, "zsc", zsc_match, zsc_attach, 173 DV_DULL, sizeof(struct zsc_softc), NULL, 174 }; 175 176 static int zshard(void *); 177 static int zssoft(void *); 178 179 180 /* 181 * Is the zs chip present? 182 */ 183 static int 184 zsc_match(parent, vcf, aux) 185 struct device *parent; 186 void *vcf; 187 void *aux; 188 { 189 struct cfdata *cf = vcf; 190 struct confargs *ca = aux; 191 int unit, x; 192 void *zsva; 193 194 unit = cf->cf_unit; 195 if (unit < 0 || unit >= NZS) 196 return (0); 197 198 /* Make sure zs_init() found mappings. */ 199 zsva = zsaddr[unit]; 200 if (zsva == NULL) 201 return (0); 202 203 if (ca->ca_paddr == -1) 204 ca->ca_paddr = zs_physaddr[unit]; 205 if (ca->ca_intpri == -1) 206 ca->ca_intpri = ZSHARD_PRI; 207 208 /* This returns -1 on a fault (bus error). */ 209 x = peek_byte(zsva); 210 return (x != -1); 211 } 212 213 static int 214 zsc_print(aux, name) 215 void *aux; 216 char *name; 217 { 218 struct zsc_attach_args *args = aux; 219 220 if (name != NULL) 221 printf("%s: ", name); 222 223 if (args->channel != -1) 224 printf(" channel %d", args->channel); 225 226 return UNCONF; 227 } 228 229 /* 230 * Attach a found zs. 231 * 232 * Match slave number to zs unit number, so that misconfiguration will 233 * not set up the keyboard as ttya, etc. 234 */ 235 static void 236 zsc_attach(parent, self, aux) 237 struct device *parent; 238 struct device *self; 239 void *aux; 240 { 241 struct zsc_softc *zsc = (void *) self; 242 struct confargs *ca = aux; 243 struct zsc_attach_args zsc_args; 244 volatile struct zschan *zc; 245 struct zs_chanstate *cs; 246 int zsc_unit, channel; 247 int reset, s; 248 static int didintr; 249 250 zsc_unit = zsc->zsc_dev.dv_unit; 251 252 printf(" softpri %d\n", ZSSOFT_PRI); 253 254 /* Use the mapping setup by the Sun PROM. */ 255 if (zsaddr[zsc_unit] == NULL) 256 panic("zs_attach: zs%d not mapped\n", zsc_unit); 257 258 /* 259 * Initialize software state for each channel. 260 */ 261 for (channel = 0; channel < 2; channel++) { 262 cs = &zsc->zsc_cs[channel]; 263 264 zc = zs_get_chan_addr(zsc_unit, channel); 265 cs->cs_reg_csr = &zc->zc_csr; 266 cs->cs_reg_data = &zc->zc_data; 267 268 cs->cs_channel = channel; 269 cs->cs_private = NULL; 270 cs->cs_ops = &zsops_null; 271 272 /* Define BAUD rate clock for the MI code. */ 273 cs->cs_pclk_div16 = PCLK / 16; 274 275 /* XXX: get defspeed from EEPROM instead? */ 276 cs->cs_defspeed = zs_defspeed[zsc_unit][channel]; 277 278 bcopy(zs_init_reg, cs->cs_creg, 16); 279 bcopy(zs_init_reg, cs->cs_preg, 16); 280 281 /* 282 * Clear the master interrupt enable. 283 * The INTENA is common to both channels, 284 * so just do it on the A channel. 285 */ 286 if (channel == 0) { 287 zs_write_reg(cs, 9, 0); 288 } 289 290 /* 291 * Look for a child driver for this channel. 292 * The child attach will setup the hardware. 293 */ 294 zsc_args.channel = channel; 295 zsc_args.hwflags = zs_hwflags[zsc_unit][channel]; 296 if (!config_found(self, (void *) &zsc_args, zsc_print)) { 297 /* No sub-driver. Just reset it. */ 298 reset = (channel == 0) ? 299 ZSWR9_A_RESET : ZSWR9_B_RESET; 300 s = splzs(); 301 zs_write_reg(cs, 9, reset); 302 splx(s); 303 } 304 } 305 306 /* Now safe to install interrupt handlers */ 307 if (!didintr) { 308 didintr = 1; 309 isr_add_autovect(zssoft, NULL, ZSSOFT_PRI); 310 isr_add_autovect(zshard, NULL, ZSHARD_PRI); 311 } 312 313 /* 314 * Set the master interrupt enable and interrupt vector. 315 * (common to both channels, do it on A) 316 */ 317 cs = &zsc->zsc_cs[0]; 318 s = splzs(); 319 /* interrupt vector */ 320 zs_write_reg(cs, 2, zs_init_reg[2]); 321 /* master interrupt control (enable) */ 322 zs_write_reg(cs, 9, zs_init_reg[9]); 323 splx(s); 324 } 325 326 static int 327 zshard(arg) 328 void *arg; 329 { 330 struct zsc_softc *zsc; 331 int unit, rval; 332 333 /* Do ttya/ttyb first, because they go faster. */ 334 rval = 0; 335 unit = zsccd.cd_ndevs; 336 while (--unit >= 0) { 337 zsc = zsccd.cd_devs[unit]; 338 if (zsc != NULL) { 339 rval |= zsc_intr_hard(zsc); 340 } 341 } 342 return (rval); 343 } 344 345 int zssoftpending; 346 347 void 348 zsc_req_softint(zsc) 349 struct zsc_softc *zsc; 350 { 351 if (zssoftpending == 0) { 352 /* We are at splzs here, so no need to lock. */ 353 zssoftpending = ZSSOFT_PRI; 354 isr_soft_request(ZSSOFT_PRI); 355 } 356 } 357 358 static int 359 zssoft(arg) 360 void *arg; 361 { 362 struct zsc_softc *zsc; 363 int unit; 364 365 /* This is not the only ISR on this IPL. */ 366 if (zssoftpending == 0) 367 return (0); 368 369 /* 370 * The soft intr. bit will be set by zshard only if 371 * the variable zssoftpending is zero. The order of 372 * these next two statements prevents our clearing 373 * the soft intr bit just after zshard has set it. 374 */ 375 isr_soft_clear(ZSSOFT_PRI); 376 zssoftpending = 0; 377 378 /* Do ttya/ttyb first, because they go faster. */ 379 unit = zsccd.cd_ndevs; 380 while (--unit >= 0) { 381 zsc = zsccd.cd_devs[unit]; 382 if (zsc != NULL) { 383 (void) zsc_intr_soft(zsc); 384 } 385 } 386 return (1); 387 } 388 389 390 /* 391 * Read or write the chip with suitable delays. 392 */ 393 394 u_char 395 zs_read_reg(cs, reg) 396 struct zs_chanstate *cs; 397 u_char reg; 398 { 399 u_char val; 400 401 *cs->cs_reg_csr = reg; 402 ZS_DELAY(); 403 val = *cs->cs_reg_csr; 404 ZS_DELAY(); 405 return val; 406 } 407 408 void 409 zs_write_reg(cs, reg, val) 410 struct zs_chanstate *cs; 411 u_char reg, val; 412 { 413 *cs->cs_reg_csr = reg; 414 ZS_DELAY(); 415 *cs->cs_reg_csr = val; 416 ZS_DELAY(); 417 } 418 419 u_char zs_read_csr(cs) 420 struct zs_chanstate *cs; 421 { 422 register u_char v; 423 424 v = *cs->cs_reg_csr; 425 ZS_DELAY(); 426 return v; 427 } 428 429 u_char zs_read_data(cs) 430 struct zs_chanstate *cs; 431 { 432 register u_char v; 433 434 v = *cs->cs_reg_data; 435 ZS_DELAY(); 436 return v; 437 } 438 439 void zs_write_csr(cs, val) 440 struct zs_chanstate *cs; 441 u_char val; 442 { 443 *cs->cs_reg_csr = val; 444 ZS_DELAY(); 445 } 446 447 void zs_write_data(cs, val) 448 struct zs_chanstate *cs; 449 u_char val; 450 { 451 *cs->cs_reg_data = val; 452 ZS_DELAY(); 453 } 454 455 /**************************************************************** 456 * Console support functions (Sun3 specific!) 457 ****************************************************************/ 458 459 /* 460 * Polled input char. 461 */ 462 int 463 zs_getc(arg) 464 void *arg; 465 { 466 register volatile struct zschan *zc = arg; 467 register int s, c, rr0; 468 469 s = splhigh(); 470 /* Wait for a character to arrive. */ 471 do { 472 rr0 = zc->zc_csr; 473 ZS_DELAY(); 474 } while ((rr0 & ZSRR0_RX_READY) == 0); 475 476 c = zc->zc_data; 477 ZS_DELAY(); 478 splx(s); 479 480 /* 481 * This is used by the kd driver to read scan codes, 482 * so don't translate '\r' ==> '\n' here... 483 */ 484 return (c); 485 } 486 487 /* 488 * Polled output char. 489 */ 490 void 491 zs_putc(arg, c) 492 void *arg; 493 int c; 494 { 495 register volatile struct zschan *zc = arg; 496 register int s, rr0; 497 498 s = splhigh(); 499 /* Wait for transmitter to become ready. */ 500 do { 501 rr0 = zc->zc_csr; 502 ZS_DELAY(); 503 } while ((rr0 & ZSRR0_TX_READY) == 0); 504 505 zc->zc_data = c; 506 ZS_DELAY(); 507 splx(s); 508 } 509 510 extern struct consdev consdev_kd; /* keyboard/display */ 511 extern struct consdev consdev_tty; 512 extern struct consdev *cn_tab; /* physical console device info */ 513 extern void nullcnpollc(); 514 515 void *zs_conschan; 516 517 /* 518 * This function replaces sys/dev/cninit.c 519 * Determine which device is the console using 520 * the "console" byte from the EEPROM. 521 */ 522 void 523 cninit() 524 { 525 struct zschan *zc; 526 struct consdev *cn; 527 int zsc_unit, channel; 528 529 switch (ee_console) { 530 531 case EE_CONS_TTYA: 532 case EE_CONS_TTYB: 533 zsc_unit = 1; 534 channel = (ee_console & 1); 535 cn = &consdev_tty; 536 cn->cn_dev = makedev(ZSTTY_MAJOR, channel); 537 cn->cn_pri = CN_REMOTE; 538 break; 539 540 default: 541 mon_printf("cninit: unknown eeprom console setting\n"); 542 /* assume keyboard/display */ 543 /* fallthrough */ 544 case EE_CONS_BW: 545 case EE_CONS_COLOR: 546 case EE_CONS_P4OPT: 547 zsc_unit = 0; 548 channel = 0; 549 cn = &consdev_kd; 550 /* Set cn_dev, cn_pri in kd.c */ 551 break; 552 } 553 554 zc = zs_get_chan_addr(zsc_unit, channel); 555 if (zc == NULL) { 556 mon_printf("cninit: zs not mapped.\n"); 557 return; 558 } 559 zs_conschan = zc; 560 zs_hwflags[zsc_unit][channel] = ZS_HWFLAG_CONSOLE; 561 cn_tab = cn; 562 (*cn->cn_init)(cn); 563 } 564 565 566 /* We never call this. */ 567 void 568 nullcnprobe(cn) 569 struct consdev *cn; 570 { 571 } 572 573 void 574 zscninit(cn) 575 struct consdev *cn; 576 { 577 int unit = minor(cn->cn_dev) & 1; 578 579 mon_printf("console is zstty%d (tty%c)\n", 580 unit, unit + 'a'); 581 } 582 583 /* 584 * Polled console input putchar. 585 */ 586 int 587 zscngetc(dev) 588 dev_t dev; 589 { 590 register volatile struct zschan *zc = zs_conschan; 591 register int c; 592 593 c = zs_getc(zc); 594 return (c); 595 } 596 597 /* 598 * Polled console output putchar. 599 */ 600 void 601 zscnputc(dev, c) 602 dev_t dev; 603 int c; 604 { 605 register volatile struct zschan *zc = zs_conschan; 606 607 zs_putc(zc, c); 608 } 609 610 611 struct consdev consdev_tty = { 612 nullcnprobe, 613 zscninit, 614 zscngetc, 615 zscnputc, 616 nullcnpollc, 617 }; 618 619 620 /* 621 * Handle user request to enter kernel debugger. 622 */ 623 void 624 zs_abort() 625 { 626 register volatile struct zschan *zc = zs_conschan; 627 int rr0; 628 629 /* Wait for end of break to avoid PROM abort. */ 630 /* XXX - Limit the wait? */ 631 do { 632 rr0 = zc->zc_csr; 633 ZS_DELAY(); 634 } while (rr0 & ZSRR0_BREAK); 635 636 /* XXX - Always available, but may be the PROM monitor. */ 637 Debugger(); 638 } 639
Indexes created Sat Sep 27 22:09:54 GMT 2025