zs.c revision 1.34
1 /* $NetBSD: zs.c,v 1.34 1996/03/17 02:04:13 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Gordon W. Ross 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 4. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by Gordon Ross 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Zilog Z8530 Dual UART driver (machine-dependent part) 35 * 36 * Runs two serial lines per chip using slave drivers. 37 * Plain tty/async lines use the zs_async slave. 38 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 39 */ 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/proc.h> 44 #include <sys/device.h> 45 #include <sys/conf.h> 46 #include <sys/file.h> 47 #include <sys/ioctl.h> 48 #include <sys/tty.h> 49 #include <sys/time.h> 50 #include <sys/kernel.h> 51 #include <sys/syslog.h> 52 53 #include <dev/cons.h> 54 #include <dev/ic/z8530reg.h> 55 #include <machine/z8530var.h> 56 57 #include <machine/autoconf.h> 58 #include <machine/cpu.h> 59 #include <machine/eeprom.h> 60 #include <machine/isr.h> 61 #include <machine/obio.h> 62 #include <machine/mon.h> 63 64 /* 65 * XXX: Hard code this to make console init easier... 66 */ 67 #define NZS 2 /* XXX */ 68 69 70 /* The Sun3 provides a 4.9152 MHz clock to the ZS chips. */ 71 #define PCLK (9600 * 512) /* PCLK pin input clock rate */ 72 73 /* 74 * Define interrupt levels. 75 */ 76 #define ZSHARD_PRI 6 /* Wired on the CPU board... */ 77 #define ZSSOFT_PRI 3 /* Want tty pri (4) but this is OK. */ 78 79 #define ZS_DELAY() delay(2) 80 81 /* The layout of this is hardware-dependent (padding, order). */ 82 struct zschan { 83 volatile u_char zc_csr; /* ctrl,status, and indirect access */ 84 u_char zc_xxx0; 85 volatile u_char zc_data; /* data */ 86 u_char zc_xxx1; 87 }; 88 struct zsdevice { 89 /* Yes, they are backwards. */ 90 struct zschan zs_chan_b; 91 struct zschan zs_chan_a; 92 }; 93 94 95 /* Default OBIO addresses. */ 96 static int zs_physaddr[NZS] = { OBIO_KEYBD_MS, OBIO_ZS }; 97 /* Saved PROM mappings */ 98 static struct zsdevice *zsaddr[NZS]; /* See zs_init() */ 99 /* Flags from cninit() */ 100 static int zs_hwflags[NZS][2]; 101 /* Default speed for each channel */ 102 static int zs_defspeed[NZS][2] = { 103 { 1200, /* keyboard */ 104 1200 }, /* mouse */ 105 { 9600, /* ttya */ 106 9600 }, /* ttyb */ 107 }; 108 109 110 /* Find PROM mappings (for console support). */ 111 void zs_init() 112 { 113 int i; 114 115 for (i = 0; i < NZS; i++) { 116 zsaddr[i] = (struct zsdevice *) 117 obio_find_mapping(zs_physaddr[i], OBIO_ZS_SIZE); 118 } 119 } 120 121 122 struct zschan * 123 zs_get_chan_addr(zsc_unit, channel) 124 int zsc_unit, channel; 125 { 126 struct zsdevice *addr; 127 struct zschan *zc; 128 129 if (zsc_unit >= NZS) 130 return NULL; 131 addr = zsaddr[zsc_unit]; 132 if (addr == NULL) 133 return NULL; 134 if (channel == 0) { 135 zc = &addr->zs_chan_a; 136 } else { 137 zc = &addr->zs_chan_b; 138 } 139 return (zc); 140 } 141 142 143 static u_char zs_init_reg[16] = { 144 0, /* 0: CMD (reset, etc.) */ 145 ZSWR1_RIE | ZSWR1_TIE | ZSWR1_SIE, 146 0x18 + ZSHARD_PRI, /* IVECT */ 147 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 148 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 149 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 150 0, /* 6: TXSYNC/SYNCLO */ 151 0, /* 7: RXSYNC/SYNCHI */ 152 0, /* 8: alias for data port */ 153 ZSWR9_MASTER_IE, 154 0, /*10: Misc. TX/RX control bits */ 155 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 156 14, /*12: BAUDLO (default=9600) */ 157 0, /*13: BAUDHI (default=9600) */ 158 ZSWR14_BAUD_FROM_PCLK | ZSWR14_BAUD_ENA, 159 ZSWR15_BREAK_IE | ZSWR15_DCD_IE, 160 }; 161 162 163 /**************************************************************** 164 * Autoconfig 165 ****************************************************************/ 166 167 /* Definition of the driver for autoconfig. */ 168 static int zsc_match(struct device *, void *, void *); 169 static void zsc_attach(struct device *, struct device *, void *); 170 171 struct cfattach zsc_ca = { 172 sizeof(struct zsc_softc), zsc_match, zsc_attach 173 }; 174 175 struct cfdriver zsc_cd = { 176 NULL, "zsc", DV_DULL 177 }; 178 179 static int zshard(void *); 180 static int zssoft(void *); 181 182 183 /* 184 * Is the zs chip present? 185 */ 186 static int 187 zsc_match(parent, vcf, aux) 188 struct device *parent; 189 void *vcf; 190 void *aux; 191 { 192 struct cfdata *cf = vcf; 193 struct confargs *ca = aux; 194 int unit, x; 195 void *zsva; 196 197 unit = cf->cf_unit; 198 if (unit < 0 || unit >= NZS) 199 return (0); 200 201 /* Make sure zs_init() found mappings. */ 202 zsva = zsaddr[unit]; 203 if (zsva == NULL) 204 return (0); 205 206 if (ca->ca_paddr == -1) 207 ca->ca_paddr = zs_physaddr[unit]; 208 if (ca->ca_intpri == -1) 209 ca->ca_intpri = ZSHARD_PRI; 210 211 /* This returns -1 on a fault (bus error). */ 212 x = peek_byte(zsva); 213 return (x != -1); 214 } 215 216 static int 217 zsc_print(aux, name) 218 void *aux; 219 char *name; 220 { 221 struct zsc_attach_args *args = aux; 222 223 if (name != NULL) 224 printf("%s: ", name); 225 226 if (args->channel != -1) 227 printf(" channel %d", args->channel); 228 229 return UNCONF; 230 } 231 232 /* 233 * Attach a found zs. 234 * 235 * Match slave number to zs unit number, so that misconfiguration will 236 * not set up the keyboard as ttya, etc. 237 */ 238 static void 239 zsc_attach(parent, self, aux) 240 struct device *parent; 241 struct device *self; 242 void *aux; 243 { 244 struct zsc_softc *zsc = (void *) self; 245 struct confargs *ca = aux; 246 struct zsc_attach_args zsc_args; 247 volatile struct zschan *zc; 248 struct zs_chanstate *cs; 249 int zsc_unit, channel; 250 int reset, s; 251 static int didintr; 252 253 zsc_unit = zsc->zsc_dev.dv_unit; 254 255 printf(" softpri %d\n", ZSSOFT_PRI); 256 257 /* Use the mapping setup by the Sun PROM. */ 258 if (zsaddr[zsc_unit] == NULL) 259 panic("zs_attach: zs%d not mapped\n", zsc_unit); 260 261 /* 262 * Initialize software state for each channel. 263 */ 264 for (channel = 0; channel < 2; channel++) { 265 cs = &zsc->zsc_cs[channel]; 266 267 zc = zs_get_chan_addr(zsc_unit, channel); 268 cs->cs_reg_csr = &zc->zc_csr; 269 cs->cs_reg_data = &zc->zc_data; 270 271 cs->cs_channel = channel; 272 cs->cs_private = NULL; 273 cs->cs_ops = &zsops_null; 274 275 /* Define BAUD rate clock for the MI code. */ 276 cs->cs_pclk_div16 = PCLK / 16; 277 278 /* XXX: get defspeed from EEPROM instead? */ 279 cs->cs_defspeed = zs_defspeed[zsc_unit][channel]; 280 281 bcopy(zs_init_reg, cs->cs_creg, 16); 282 bcopy(zs_init_reg, cs->cs_preg, 16); 283 284 /* 285 * Clear the master interrupt enable. 286 * The INTENA is common to both channels, 287 * so just do it on the A channel. 288 */ 289 if (channel == 0) { 290 zs_write_reg(cs, 9, 0); 291 } 292 293 /* 294 * Look for a child driver for this channel. 295 * The child attach will setup the hardware. 296 */ 297 zsc_args.channel = channel; 298 zsc_args.hwflags = zs_hwflags[zsc_unit][channel]; 299 if (!config_found(self, (void *) &zsc_args, zsc_print)) { 300 /* No sub-driver. Just reset it. */ 301 reset = (channel == 0) ? 302 ZSWR9_A_RESET : ZSWR9_B_RESET; 303 s = splzs(); 304 zs_write_reg(cs, 9, reset); 305 splx(s); 306 } 307 } 308 309 /* Now safe to install interrupt handlers */ 310 if (!didintr) { 311 didintr = 1; 312 isr_add_autovect(zssoft, NULL, ZSSOFT_PRI); 313 isr_add_autovect(zshard, NULL, ZSHARD_PRI); 314 } 315 316 /* 317 * Set the master interrupt enable and interrupt vector. 318 * (common to both channels, do it on A) 319 */ 320 cs = &zsc->zsc_cs[0]; 321 s = splzs(); 322 /* interrupt vector */ 323 zs_write_reg(cs, 2, zs_init_reg[2]); 324 /* master interrupt control (enable) */ 325 zs_write_reg(cs, 9, zs_init_reg[9]); 326 splx(s); 327 } 328 329 static int 330 zshard(arg) 331 void *arg; 332 { 333 struct zsc_softc *zsc; 334 int unit, rval; 335 336 /* Do ttya/ttyb first, because they go faster. */ 337 rval = 0; 338 unit = zsc_cd.cd_ndevs; 339 while (--unit >= 0) { 340 zsc = zsc_cd.cd_devs[unit]; 341 if (zsc != NULL) { 342 rval |= zsc_intr_hard(zsc); 343 } 344 } 345 return (rval); 346 } 347 348 int zssoftpending; 349 350 void 351 zsc_req_softint(zsc) 352 struct zsc_softc *zsc; 353 { 354 if (zssoftpending == 0) { 355 /* We are at splzs here, so no need to lock. */ 356 zssoftpending = ZSSOFT_PRI; 357 isr_soft_request(ZSSOFT_PRI); 358 } 359 } 360 361 static int 362 zssoft(arg) 363 void *arg; 364 { 365 struct zsc_softc *zsc; 366 int unit; 367 368 /* This is not the only ISR on this IPL. */ 369 if (zssoftpending == 0) 370 return (0); 371 372 /* 373 * The soft intr. bit will be set by zshard only if 374 * the variable zssoftpending is zero. The order of 375 * these next two statements prevents our clearing 376 * the soft intr bit just after zshard has set it. 377 */ 378 isr_soft_clear(ZSSOFT_PRI); 379 zssoftpending = 0; 380 381 /* Do ttya/ttyb first, because they go faster. */ 382 unit = zsc_cd.cd_ndevs; 383 while (--unit >= 0) { 384 zsc = zsc_cd.cd_devs[unit]; 385 if (zsc != NULL) { 386 (void) zsc_intr_soft(zsc); 387 } 388 } 389 return (1); 390 } 391 392 393 /* 394 * Read or write the chip with suitable delays. 395 */ 396 397 u_char 398 zs_read_reg(cs, reg) 399 struct zs_chanstate *cs; 400 u_char reg; 401 { 402 u_char val; 403 404 *cs->cs_reg_csr = reg; 405 ZS_DELAY(); 406 val = *cs->cs_reg_csr; 407 ZS_DELAY(); 408 return val; 409 } 410 411 void 412 zs_write_reg(cs, reg, val) 413 struct zs_chanstate *cs; 414 u_char reg, val; 415 { 416 *cs->cs_reg_csr = reg; 417 ZS_DELAY(); 418 *cs->cs_reg_csr = val; 419 ZS_DELAY(); 420 } 421 422 u_char zs_read_csr(cs) 423 struct zs_chanstate *cs; 424 { 425 register u_char v; 426 427 v = *cs->cs_reg_csr; 428 ZS_DELAY(); 429 return v; 430 } 431 432 u_char zs_read_data(cs) 433 struct zs_chanstate *cs; 434 { 435 register u_char v; 436 437 v = *cs->cs_reg_data; 438 ZS_DELAY(); 439 return v; 440 } 441 442 void zs_write_csr(cs, val) 443 struct zs_chanstate *cs; 444 u_char val; 445 { 446 *cs->cs_reg_csr = val; 447 ZS_DELAY(); 448 } 449 450 void zs_write_data(cs, val) 451 struct zs_chanstate *cs; 452 u_char val; 453 { 454 *cs->cs_reg_data = val; 455 ZS_DELAY(); 456 } 457 458 /**************************************************************** 459 * Console support functions (Sun3 specific!) 460 ****************************************************************/ 461 462 /* 463 * Polled input char. 464 */ 465 int 466 zs_getc(arg) 467 void *arg; 468 { 469 register volatile struct zschan *zc = arg; 470 register int s, c, rr0; 471 472 s = splhigh(); 473 /* Wait for a character to arrive. */ 474 do { 475 rr0 = zc->zc_csr; 476 ZS_DELAY(); 477 } while ((rr0 & ZSRR0_RX_READY) == 0); 478 479 c = zc->zc_data; 480 ZS_DELAY(); 481 splx(s); 482 483 /* 484 * This is used by the kd driver to read scan codes, 485 * so don't translate '\r' ==> '\n' here... 486 */ 487 return (c); 488 } 489 490 /* 491 * Polled output char. 492 */ 493 void 494 zs_putc(arg, c) 495 void *arg; 496 int c; 497 { 498 register volatile struct zschan *zc = arg; 499 register int s, rr0; 500 501 s = splhigh(); 502 /* Wait for transmitter to become ready. */ 503 do { 504 rr0 = zc->zc_csr; 505 ZS_DELAY(); 506 } while ((rr0 & ZSRR0_TX_READY) == 0); 507 508 zc->zc_data = c; 509 ZS_DELAY(); 510 splx(s); 511 } 512 513 extern struct consdev consdev_kd; /* keyboard/display */ 514 extern struct consdev consdev_tty; 515 extern struct consdev *cn_tab; /* physical console device info */ 516 extern void nullcnpollc(); 517 518 void *zs_conschan; 519 520 /* 521 * This function replaces sys/dev/cninit.c 522 * Determine which device is the console using 523 * the "console" byte from the EEPROM. 524 */ 525 void 526 cninit() 527 { 528 struct zschan *zc; 529 struct consdev *cn; 530 int zsc_unit, channel; 531 532 switch (ee_console) { 533 534 case EE_CONS_TTYA: 535 case EE_CONS_TTYB: 536 zsc_unit = 1; 537 channel = (ee_console & 1); 538 cn = &consdev_tty; 539 cn->cn_dev = makedev(ZSTTY_MAJOR, channel); 540 cn->cn_pri = CN_REMOTE; 541 break; 542 543 default: 544 mon_printf("cninit: unknown eeprom console setting\n"); 545 /* assume keyboard/display */ 546 /* fallthrough */ 547 case EE_CONS_BW: 548 case EE_CONS_COLOR: 549 case EE_CONS_P4OPT: 550 zsc_unit = 0; 551 channel = 0; 552 cn = &consdev_kd; 553 /* Set cn_dev, cn_pri in kd.c */ 554 break; 555 } 556 557 zc = zs_get_chan_addr(zsc_unit, channel); 558 if (zc == NULL) { 559 mon_printf("cninit: zs not mapped.\n"); 560 return; 561 } 562 zs_conschan = zc; 563 zs_hwflags[zsc_unit][channel] = ZS_HWFLAG_CONSOLE; 564 cn_tab = cn; 565 (*cn->cn_init)(cn); 566 } 567 568 569 /* We never call this. */ 570 void 571 nullcnprobe(cn) 572 struct consdev *cn; 573 { 574 } 575 576 void 577 zscninit(cn) 578 struct consdev *cn; 579 { 580 int unit = minor(cn->cn_dev) & 1; 581 582 mon_printf("console is zstty%d (tty%c)\n", 583 unit, unit + 'a'); 584 } 585 586 /* 587 * Polled console input putchar. 588 */ 589 int 590 zscngetc(dev) 591 dev_t dev; 592 { 593 register volatile struct zschan *zc = zs_conschan; 594 register int c; 595 596 c = zs_getc(zc); 597 return (c); 598 } 599 600 /* 601 * Polled console output putchar. 602 */ 603 void 604 zscnputc(dev, c) 605 dev_t dev; 606 int c; 607 { 608 register volatile struct zschan *zc = zs_conschan; 609 610 zs_putc(zc, c); 611 } 612 613 614 struct consdev consdev_tty = { 615 nullcnprobe, 616 zscninit, 617 zscngetc, 618 zscnputc, 619 nullcnpollc, 620 }; 621 622 623 /* 624 * Handle user request to enter kernel debugger. 625 */ 626 void 627 zs_abort() 628 { 629 register volatile struct zschan *zc = zs_conschan; 630 int rr0; 631 632 /* Wait for end of break to avoid PROM abort. */ 633 /* XXX - Limit the wait? */ 634 do { 635 rr0 = zc->zc_csr; 636 ZS_DELAY(); 637 } while (rr0 & ZSRR0_BREAK); 638 639 /* XXX - Always available, but may be the PROM monitor. */ 640 Debugger(); 641 } 642
Indexes created Sat Sep 27 22:09:54 GMT 2025