zs.c revision 1.37
1 /* $NetBSD: zs.c,v 1.37 1996/05/17 19:35:14 gwr Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Gordon W. Ross 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 4. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by Gordon Ross 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Zilog Z8530 Dual UART driver (machine-dependent part) 35 * 36 * Runs two serial lines per chip using slave drivers. 37 * Plain tty/async lines use the zs_async slave. 38 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 39 */ 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/proc.h> 44 #include <sys/device.h> 45 #include <sys/conf.h> 46 #include <sys/file.h> 47 #include <sys/ioctl.h> 48 #include <sys/tty.h> 49 #include <sys/time.h> 50 #include <sys/kernel.h> 51 #include <sys/syslog.h> 52 53 #include <dev/cons.h> 54 #include <dev/ic/z8530reg.h> 55 #include <machine/z8530var.h> 56 57 #include <machine/autoconf.h> 58 #include <machine/cpu.h> 59 #include <machine/eeprom.h> 60 #include <machine/isr.h> 61 #include <machine/obio.h> 62 #include <machine/mon.h> 63 64 /* 65 * XXX: Hard code this to make console init easier... 66 */ 67 #define NZS 2 /* XXX */ 68 69 70 /* The Sun3 provides a 4.9152 MHz clock to the ZS chips. */ 71 #define PCLK (9600 * 512) /* PCLK pin input clock rate */ 72 73 /* 74 * Define interrupt levels. 75 */ 76 #define ZSHARD_PRI 6 /* Wired on the CPU board... */ 77 #define ZSSOFT_PRI 3 /* Want tty pri (4) but this is OK. */ 78 79 #define ZS_DELAY() delay(2) 80 81 /* The layout of this is hardware-dependent (padding, order). */ 82 struct zschan { 83 volatile u_char zc_csr; /* ctrl,status, and indirect access */ 84 u_char zc_xxx0; 85 volatile u_char zc_data; /* data */ 86 u_char zc_xxx1; 87 }; 88 struct zsdevice { 89 /* Yes, they are backwards. */ 90 struct zschan zs_chan_b; 91 struct zschan zs_chan_a; 92 }; 93 94 95 /* Default OBIO addresses. */ 96 static int zs_physaddr[NZS] = { OBIO_KEYBD_MS, OBIO_ZS }; 97 /* Saved PROM mappings */ 98 static struct zsdevice *zsaddr[NZS]; /* See zs_init() */ 99 /* Flags from cninit() */ 100 static int zs_hwflags[NZS][2]; 101 /* Default speed for each channel */ 102 static int zs_defspeed[NZS][2] = { 103 { 1200, /* keyboard */ 104 1200 }, /* mouse */ 105 { 9600, /* ttya */ 106 9600 }, /* ttyb */ 107 }; 108 109 110 /* Find PROM mappings (for console support). */ 111 void zs_init() 112 { 113 int i; 114 115 for (i = 0; i < NZS; i++) { 116 zsaddr[i] = (struct zsdevice *) 117 obio_find_mapping(zs_physaddr[i], OBIO_ZS_SIZE); 118 } 119 } 120 121 122 struct zschan * 123 zs_get_chan_addr(zsc_unit, channel) 124 int zsc_unit, channel; 125 { 126 struct zsdevice *addr; 127 struct zschan *zc; 128 129 if (zsc_unit >= NZS) 130 return NULL; 131 addr = zsaddr[zsc_unit]; 132 if (addr == NULL) 133 return NULL; 134 if (channel == 0) { 135 zc = &addr->zs_chan_a; 136 } else { 137 zc = &addr->zs_chan_b; 138 } 139 return (zc); 140 } 141 142 143 static u_char zs_init_reg[16] = { 144 0, /* 0: CMD (reset, etc.) */ 145 ZSWR1_RIE | ZSWR1_TIE | ZSWR1_SIE, 146 0x18 + ZSHARD_PRI, /* IVECT */ 147 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 148 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 149 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 150 0, /* 6: TXSYNC/SYNCLO */ 151 0, /* 7: RXSYNC/SYNCHI */ 152 0, /* 8: alias for data port */ 153 ZSWR9_MASTER_IE, 154 0, /*10: Misc. TX/RX control bits */ 155 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 156 14, /*12: BAUDLO (default=9600) */ 157 0, /*13: BAUDHI (default=9600) */ 158 ZSWR14_BAUD_FROM_PCLK | ZSWR14_BAUD_ENA, 159 ZSWR15_BREAK_IE | ZSWR15_DCD_IE, 160 }; 161 162 163 /**************************************************************** 164 * Autoconfig 165 ****************************************************************/ 166 167 /* Definition of the driver for autoconfig. */ 168 static int zsc_match __P((struct device *, void *, void *)); 169 static void zsc_attach __P((struct device *, struct device *, void *)); 170 static int zsc_print __P((void *, char *name)); 171 172 struct cfattach zsc_ca = { 173 sizeof(struct zsc_softc), zsc_match, zsc_attach 174 }; 175 176 struct cfdriver zsc_cd = { 177 NULL, "zsc", DV_DULL 178 }; 179 180 static int zshard(void *); 181 static int zssoft(void *); 182 183 184 /* 185 * Is the zs chip present? 186 */ 187 static int 188 zsc_match(parent, vcf, aux) 189 struct device *parent; 190 void *vcf, *aux; 191 { 192 struct cfdata *cf = vcf; 193 struct confargs *ca = aux; 194 int pa, unit, x; 195 void *va; 196 197 unit = cf->cf_unit; 198 if (unit < 0 || unit >= NZS) 199 return (0); 200 201 /* 202 * OBIO match functions may be called for every possible 203 * physical address, so match only our physical address. 204 * This driver only supports its default mappings, so 205 * non-default locators must match our defaults. 206 */ 207 if ((pa = cf->cf_paddr) == -1) { 208 /* Use our default PA. */ 209 pa = zs_physaddr[unit]; 210 } else { 211 /* Validate the given PA. */ 212 if (pa != zs_physaddr[unit]) 213 return (0); 214 } 215 if (pa != ca->ca_paddr) 216 return (0); 217 218 /* Make sure zs_init() found mappings. */ 219 va = zsaddr[unit]; 220 if (va == NULL) 221 return (0); 222 223 /* This returns -1 on a fault (bus error). */ 224 x = peek_byte(va); 225 return (x != -1); 226 } 227 228 /* 229 * Attach a found zs. 230 * 231 * Match slave number to zs unit number, so that misconfiguration will 232 * not set up the keyboard as ttya, etc. 233 */ 234 static void 235 zsc_attach(parent, self, aux) 236 struct device *parent; 237 struct device *self; 238 void *aux; 239 { 240 struct zsc_softc *zsc = (void *) self; 241 struct cfdata *cf = self->dv_cfdata; 242 struct confargs *ca = aux; 243 struct zsc_attach_args zsc_args; 244 volatile struct zschan *zc; 245 struct zs_chanstate *cs; 246 int zsc_unit, intpri, channel; 247 int reset, s; 248 static int didintr; 249 250 zsc_unit = zsc->zsc_dev.dv_unit; 251 252 if ((intpri = cf->cf_intpri) == -1) 253 intpri = ZSHARD_PRI; 254 255 printf(" level %d (softpri %d)\n", intpri, ZSSOFT_PRI); 256 257 /* Use the mapping setup by the Sun PROM. */ 258 if (zsaddr[zsc_unit] == NULL) 259 panic("zs_attach: zs%d not mapped\n", zsc_unit); 260 261 /* 262 * Initialize software state for each channel. 263 */ 264 for (channel = 0; channel < 2; channel++) { 265 cs = &zsc->zsc_cs[channel]; 266 267 zc = zs_get_chan_addr(zsc_unit, channel); 268 cs->cs_reg_csr = &zc->zc_csr; 269 cs->cs_reg_data = &zc->zc_data; 270 271 cs->cs_channel = channel; 272 cs->cs_private = NULL; 273 cs->cs_ops = &zsops_null; 274 275 /* Define BAUD rate clock for the MI code. */ 276 cs->cs_brg_clk = PCLK / 16; 277 278 /* XXX: get defspeed from EEPROM instead? */ 279 cs->cs_defspeed = zs_defspeed[zsc_unit][channel]; 280 281 bcopy(zs_init_reg, cs->cs_creg, 16); 282 bcopy(zs_init_reg, cs->cs_preg, 16); 283 284 /* 285 * Clear the master interrupt enable. 286 * The INTENA is common to both channels, 287 * so just do it on the A channel. 288 */ 289 if (channel == 0) { 290 zs_write_reg(cs, 9, 0); 291 } 292 293 /* 294 * Look for a child driver for this channel. 295 * The child attach will setup the hardware. 296 */ 297 zsc_args.channel = channel; 298 zsc_args.hwflags = zs_hwflags[zsc_unit][channel]; 299 if (config_found(self, (void *)&zsc_args, zsc_print) == NULL) { 300 /* No sub-driver. Just reset it. */ 301 reset = (channel == 0) ? 302 ZSWR9_A_RESET : ZSWR9_B_RESET; 303 s = splzs(); 304 zs_write_reg(cs, 9, reset); 305 splx(s); 306 } 307 } 308 309 /* Now safe to install interrupt handlers */ 310 if (!didintr) { 311 didintr = 1; 312 isr_add_autovect(zssoft, NULL, ZSSOFT_PRI); 313 isr_add_autovect(zshard, NULL, ZSHARD_PRI); 314 } 315 316 /* 317 * Set the master interrupt enable and interrupt vector. 318 * (common to both channels, do it on A) 319 */ 320 cs = &zsc->zsc_cs[0]; 321 s = splzs(); 322 /* interrupt vector */ 323 zs_write_reg(cs, 2, zs_init_reg[2]); 324 /* master interrupt control (enable) */ 325 zs_write_reg(cs, 9, zs_init_reg[9]); 326 splx(s); 327 } 328 329 static int 330 zsc_print(aux, name) 331 void *aux; 332 char *name; 333 { 334 struct zsc_attach_args *args = aux; 335 336 if (name != NULL) 337 printf("%s: ", name); 338 339 if (args->channel != -1) 340 printf(" channel %d", args->channel); 341 342 return UNCONF; 343 } 344 345 static int 346 zshard(arg) 347 void *arg; 348 { 349 struct zsc_softc *zsc; 350 int unit, rval; 351 352 /* Do ttya/ttyb first, because they go faster. */ 353 rval = 0; 354 unit = zsc_cd.cd_ndevs; 355 while (--unit >= 0) { 356 zsc = zsc_cd.cd_devs[unit]; 357 if (zsc != NULL) { 358 rval |= zsc_intr_hard(zsc); 359 } 360 } 361 return (rval); 362 } 363 364 int zssoftpending; 365 366 void 367 zsc_req_softint(zsc) 368 struct zsc_softc *zsc; 369 { 370 if (zssoftpending == 0) { 371 /* We are at splzs here, so no need to lock. */ 372 zssoftpending = ZSSOFT_PRI; 373 isr_soft_request(ZSSOFT_PRI); 374 } 375 } 376 377 static int 378 zssoft(arg) 379 void *arg; 380 { 381 struct zsc_softc *zsc; 382 int unit; 383 384 /* This is not the only ISR on this IPL. */ 385 if (zssoftpending == 0) 386 return (0); 387 388 /* 389 * The soft intr. bit will be set by zshard only if 390 * the variable zssoftpending is zero. The order of 391 * these next two statements prevents our clearing 392 * the soft intr bit just after zshard has set it. 393 */ 394 isr_soft_clear(ZSSOFT_PRI); 395 zssoftpending = 0; 396 397 /* Do ttya/ttyb first, because they go faster. */ 398 unit = zsc_cd.cd_ndevs; 399 while (--unit >= 0) { 400 zsc = zsc_cd.cd_devs[unit]; 401 if (zsc != NULL) { 402 (void) zsc_intr_soft(zsc); 403 } 404 } 405 return (1); 406 } 407 408 409 /* 410 * Read or write the chip with suitable delays. 411 */ 412 413 u_char 414 zs_read_reg(cs, reg) 415 struct zs_chanstate *cs; 416 u_char reg; 417 { 418 u_char val; 419 420 *cs->cs_reg_csr = reg; 421 ZS_DELAY(); 422 val = *cs->cs_reg_csr; 423 ZS_DELAY(); 424 return val; 425 } 426 427 void 428 zs_write_reg(cs, reg, val) 429 struct zs_chanstate *cs; 430 u_char reg, val; 431 { 432 *cs->cs_reg_csr = reg; 433 ZS_DELAY(); 434 *cs->cs_reg_csr = val; 435 ZS_DELAY(); 436 } 437 438 u_char zs_read_csr(cs) 439 struct zs_chanstate *cs; 440 { 441 register u_char v; 442 443 v = *cs->cs_reg_csr; 444 ZS_DELAY(); 445 return v; 446 } 447 448 u_char zs_read_data(cs) 449 struct zs_chanstate *cs; 450 { 451 register u_char v; 452 453 v = *cs->cs_reg_data; 454 ZS_DELAY(); 455 return v; 456 } 457 458 void zs_write_csr(cs, val) 459 struct zs_chanstate *cs; 460 u_char val; 461 { 462 *cs->cs_reg_csr = val; 463 ZS_DELAY(); 464 } 465 466 void zs_write_data(cs, val) 467 struct zs_chanstate *cs; 468 u_char val; 469 { 470 *cs->cs_reg_data = val; 471 ZS_DELAY(); 472 } 473 474 /**************************************************************** 475 * Console support functions (Sun3 specific!) 476 ****************************************************************/ 477 478 /* 479 * Polled input char. 480 */ 481 int 482 zs_getc(arg) 483 void *arg; 484 { 485 register volatile struct zschan *zc = arg; 486 register int s, c, rr0; 487 488 s = splhigh(); 489 /* Wait for a character to arrive. */ 490 do { 491 rr0 = zc->zc_csr; 492 ZS_DELAY(); 493 } while ((rr0 & ZSRR0_RX_READY) == 0); 494 495 c = zc->zc_data; 496 ZS_DELAY(); 497 splx(s); 498 499 /* 500 * This is used by the kd driver to read scan codes, 501 * so don't translate '\r' ==> '\n' here... 502 */ 503 return (c); 504 } 505 506 /* 507 * Polled output char. 508 */ 509 void 510 zs_putc(arg, c) 511 void *arg; 512 int c; 513 { 514 register volatile struct zschan *zc = arg; 515 register int s, rr0; 516 517 s = splhigh(); 518 /* Wait for transmitter to become ready. */ 519 do { 520 rr0 = zc->zc_csr; 521 ZS_DELAY(); 522 } while ((rr0 & ZSRR0_TX_READY) == 0); 523 524 zc->zc_data = c; 525 ZS_DELAY(); 526 splx(s); 527 } 528 529 extern struct consdev consdev_kd; /* keyboard/display */ 530 extern struct consdev consdev_tty; 531 extern struct consdev *cn_tab; /* physical console device info */ 532 extern void nullcnpollc(); 533 534 void *zs_conschan; 535 536 /* 537 * This function replaces sys/dev/cninit.c 538 * Determine which device is the console using 539 * the "console" byte from the EEPROM. 540 */ 541 void 542 cninit() 543 { 544 struct zschan *zc; 545 struct consdev *cn; 546 int zsc_unit, channel; 547 548 switch (ee_console) { 549 550 case EE_CONS_TTYA: 551 case EE_CONS_TTYB: 552 zsc_unit = 1; 553 channel = (ee_console & 1); 554 cn = &consdev_tty; 555 cn->cn_dev = makedev(ZSTTY_MAJOR, channel); 556 cn->cn_pri = CN_REMOTE; 557 break; 558 559 default: 560 mon_printf("cninit: unknown eeprom console setting\n"); 561 /* assume keyboard/display */ 562 /* fallthrough */ 563 case EE_CONS_BW: 564 case EE_CONS_COLOR: 565 case EE_CONS_P4OPT: 566 zsc_unit = 0; 567 channel = 0; 568 cn = &consdev_kd; 569 /* Set cn_dev, cn_pri in kd.c */ 570 break; 571 } 572 573 zc = zs_get_chan_addr(zsc_unit, channel); 574 if (zc == NULL) { 575 mon_printf("cninit: zs not mapped.\n"); 576 return; 577 } 578 zs_conschan = zc; 579 zs_hwflags[zsc_unit][channel] = ZS_HWFLAG_CONSOLE; 580 cn_tab = cn; 581 (*cn->cn_init)(cn); 582 } 583 584 585 /* We never call this. */ 586 void 587 nullcnprobe(cn) 588 struct consdev *cn; 589 { 590 } 591 592 void 593 zscninit(cn) 594 struct consdev *cn; 595 { 596 int unit = minor(cn->cn_dev) & 1; 597 598 mon_printf("console is zstty%d (tty%c)\n", 599 unit, unit + 'a'); 600 } 601 602 /* 603 * Polled console input putchar. 604 */ 605 int 606 zscngetc(dev) 607 dev_t dev; 608 { 609 register volatile struct zschan *zc = zs_conschan; 610 register int c; 611 612 c = zs_getc(zc); 613 return (c); 614 } 615 616 /* 617 * Polled console output putchar. 618 */ 619 void 620 zscnputc(dev, c) 621 dev_t dev; 622 int c; 623 { 624 register volatile struct zschan *zc = zs_conschan; 625 626 zs_putc(zc, c); 627 } 628 629 630 struct consdev consdev_tty = { 631 nullcnprobe, 632 zscninit, 633 zscngetc, 634 zscnputc, 635 nullcnpollc, 636 }; 637 638 639 /* 640 * Handle user request to enter kernel debugger. 641 */ 642 void 643 zs_abort() 644 { 645 register volatile struct zschan *zc = zs_conschan; 646 int rr0; 647 648 /* Wait for end of break to avoid PROM abort. */ 649 /* XXX - Limit the wait? */ 650 do { 651 rr0 = zc->zc_csr; 652 ZS_DELAY(); 653 } while (rr0 & ZSRR0_BREAK); 654 655 /* XXX - Always available, but may be the PROM monitor. */ 656 Debugger(); 657 } 658
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