zs.c revision 1.52 1 /* $NetBSD: zs.c,v 1.52 1998/01/12 20:32:29 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1996 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Gordon W. Ross.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Zilog Z8530 Dual UART driver (machine-dependent part)
41 *
42 * Runs two serial lines per chip using slave drivers.
43 * Plain tty/async lines use the zs_async slave.
44 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
45 */
46
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/conf.h>
50 #include <sys/device.h>
51 #include <sys/file.h>
52 #include <sys/ioctl.h>
53 #include <sys/kernel.h>
54 #include <sys/proc.h>
55 #include <sys/tty.h>
56 #include <sys/time.h>
57 #include <sys/syslog.h>
58
59 #include <machine/autoconf.h>
60 #include <machine/cpu.h>
61 #include <machine/obio.h>
62 #include <machine/machdep.h>
63 #include <machine/mon.h>
64 #include <machine/z8530var.h>
65
66 #include <dev/cons.h>
67 #include <dev/ic/z8530reg.h>
68
69 #include <sun3/dev/zs_cons.h>
70
71 #include "kbd.h" /* NKBD */
72 #include "zsc.h" /* NZSC */
73 #define NZS NZSC
74
75 /* Make life easier for the initialized arrays here. */
76 #if NZS < 2
77 #undef NZS
78 #define NZS 2
79 #endif
80
81 extern void Debugger __P((void));
82
83 /*
84 * Some warts needed by z8530tty.c -
85 * The default parity REALLY needs to be the same as the PROM uses,
86 * or you can not see messages done with printf during boot-up...
87 */
88 int zs_def_cflag = (CREAD | CS8 | HUPCL);
89 int zs_major = 12;
90
91 /*
92 * The Sun3 provides a 4.9152 MHz clock to the ZS chips.
93 */
94 #define PCLK (9600 * 512) /* PCLK pin input clock rate */
95
96 /*
97 * Define interrupt levels.
98 */
99 #define ZSHARD_PRI 6 /* Wired on the CPU board... */
100 #define ZSSOFT_PRI 3 /* Want tty pri (4) but this is OK. */
101
102 #define ZS_DELAY() delay(2)
103
104 /* The layout of this is hardware-dependent (padding, order). */
105 struct zschan {
106 volatile u_char zc_csr; /* ctrl,status, and indirect access */
107 u_char zc_xxx0;
108 volatile u_char zc_data; /* data */
109 u_char zc_xxx1;
110 };
111 struct zsdevice {
112 /* Yes, they are backwards. */
113 struct zschan zs_chan_b;
114 struct zschan zs_chan_a;
115 };
116
117
118 /* Default OBIO addresses. */
119 static int zs_physaddr[NZS] = {
120 OBIO_ZS_KBD_MS,
121 OBIO_ZS_TTY_AB };
122
123 /* Saved PROM mappings */
124 static struct zsdevice *zsaddr[NZS];
125
126 /* Flags from cninit() */
127 static int zs_hwflags[NZS][2];
128
129 /* Default speed for each channel */
130 static int zs_defspeed[NZS][2] = {
131 { 1200, /* keyboard */
132 1200 }, /* mouse */
133 { 9600, /* ttya */
134 9600 }, /* ttyb */
135 };
136
137 static u_char zs_init_reg[16] = {
138 0, /* 0: CMD (reset, etc.) */
139 0, /* 1: No interrupts yet. */
140 0x18 + ZSHARD_PRI, /* IVECT */
141 ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
142 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
143 ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
144 0, /* 6: TXSYNC/SYNCLO */
145 0, /* 7: RXSYNC/SYNCHI */
146 0, /* 8: alias for data port */
147 ZSWR9_MASTER_IE,
148 0, /*10: Misc. TX/RX control bits */
149 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
150 14, /*12: BAUDLO (default=9600) */
151 0, /*13: BAUDHI (default=9600) */
152 ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
153 ZSWR15_BREAK_IE | ZSWR15_DCD_IE,
154 };
155
156
157 /* Find PROM mappings (for console support). */
158 void
159 zs_init()
160 {
161 int i;
162
163 for (i = 0; i < NZS; i++) {
164 zsaddr[i] = (struct zsdevice *)
165 obio_find_mapping(zs_physaddr[i], sizeof(struct zschan));
166 }
167 }
168
169 struct zschan *
170 zs_get_chan_addr(zs_unit, channel)
171 int zs_unit, channel;
172 {
173 struct zsdevice *addr;
174 struct zschan *zc;
175
176 if (zs_unit >= NZS)
177 return NULL;
178 addr = zsaddr[zs_unit];
179 if (addr == NULL)
180 return NULL;
181 if (channel == 0) {
182 zc = &addr->zs_chan_a;
183 } else {
184 zc = &addr->zs_chan_b;
185 }
186 return (zc);
187 }
188
189
190 /****************************************************************
191 * Autoconfig
192 ****************************************************************/
193
194 /* Definition of the driver for autoconfig. */
195 static int zs_match __P((struct device *, struct cfdata *, void *));
196 static void zs_attach __P((struct device *, struct device *, void *));
197 static int zs_print __P((void *, const char *name));
198
199 struct cfattach zsc_ca = {
200 sizeof(struct zsc_softc), zs_match, zs_attach
201 };
202
203 extern struct cfdriver zsc_cd;
204
205 static int zshard __P((void *));
206 static int zssoft __P((void *));
207 static int zs_get_speed __P((struct zs_chanstate *));
208
209
210 /*
211 * Is the zs chip present?
212 */
213 static int
214 zs_match(parent, cf, aux)
215 struct device *parent;
216 struct cfdata *cf;
217 void *aux;
218 {
219 struct confargs *ca = aux;
220 int unit = cf->cf_unit;
221 void *va;
222
223 /*
224 * This driver only supports its wired-in mappings,
225 * because the console support depends on those.
226 */
227 if (ca->ca_paddr != zs_physaddr[unit])
228 return (0);
229
230 /* Make sure zs_init() found mappings. */
231 va = zsaddr[unit];
232 if (va == NULL)
233 return (0);
234
235 /* This returns -1 on a fault (bus error). */
236 if (peek_byte(va) == -1)
237 return (0);
238
239 /* Default interrupt priority (always splbio==2) */
240 if (ca->ca_intpri == -1)
241 ca->ca_intpri = ZSHARD_PRI;
242
243 return (1);
244 }
245
246 /*
247 * Attach a found zs.
248 *
249 * Match slave number to zs unit number, so that misconfiguration will
250 * not set up the keyboard as ttya, etc.
251 */
252 static void
253 zs_attach(parent, self, aux)
254 struct device *parent;
255 struct device *self;
256 void *aux;
257 {
258 struct zsc_softc *zsc = (void *) self;
259 struct confargs *ca = aux;
260 struct zsc_attach_args zsc_args;
261 volatile struct zschan *zc;
262 struct zs_chanstate *cs;
263 int s, zs_unit, channel;
264 static int didintr;
265
266 zs_unit = zsc->zsc_dev.dv_unit;
267
268 printf(": (softpri %d)\n", ZSSOFT_PRI);
269
270 /* Use the mapping setup by the Sun PROM. */
271 if (zsaddr[zs_unit] == NULL)
272 panic("zs_attach: zs%d not mapped\n", zs_unit);
273
274 /*
275 * Initialize software state for each channel.
276 */
277 for (channel = 0; channel < 2; channel++) {
278 zsc_args.channel = channel;
279 zsc_args.hwflags = zs_hwflags[zs_unit][channel];
280 cs = &zsc->zsc_cs_store[channel];
281 zsc->zsc_cs[channel] = cs;
282
283 cs->cs_channel = channel;
284 cs->cs_private = NULL;
285 cs->cs_ops = &zsops_null;
286 cs->cs_brg_clk = PCLK / 16;
287
288 zc = zs_get_chan_addr(zs_unit, channel);
289 cs->cs_reg_csr = &zc->zc_csr;
290 cs->cs_reg_data = &zc->zc_data;
291
292 bcopy(zs_init_reg, cs->cs_creg, 16);
293 bcopy(zs_init_reg, cs->cs_preg, 16);
294
295 /* XXX: Get these from the EEPROM instead? */
296 /* XXX: See the mvme167 code. Better. */
297 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
298 cs->cs_defspeed = zs_get_speed(cs);
299 else
300 cs->cs_defspeed = zs_defspeed[zs_unit][channel];
301 cs->cs_defcflag = zs_def_cflag;
302
303 /* Make these correspond to cs_defcflag (-crtscts) */
304 cs->cs_rr0_dcd = ZSRR0_DCD;
305 cs->cs_rr0_cts = 0;
306 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
307 cs->cs_wr5_rts = 0;
308
309 /*
310 * Clear the master interrupt enable.
311 * The INTENA is common to both channels,
312 * so just do it on the A channel.
313 */
314 if (channel == 0) {
315 zs_write_reg(cs, 9, 0);
316 }
317
318 /*
319 * Look for a child driver for this channel.
320 * The child attach will setup the hardware.
321 */
322 if (!config_found(self, (void *)&zsc_args, zs_print)) {
323 /* No sub-driver. Just reset it. */
324 u_char reset = (channel == 0) ?
325 ZSWR9_A_RESET : ZSWR9_B_RESET;
326 s = splhigh();
327 zs_write_reg(cs, 9, reset);
328 splx(s);
329 }
330 }
331
332 /*
333 * Now safe to install interrupt handlers. Note the arguments
334 * to the interrupt handlers aren't used. Note, we only do this
335 * once since both SCCs interrupt at the same level and vector.
336 */
337 if (!didintr) {
338 didintr = 1;
339 isr_add_autovect(zssoft, NULL, ZSSOFT_PRI);
340 isr_add_autovect(zshard, NULL, ca->ca_intpri);
341 }
342 /* XXX; evcnt_attach() ? */
343
344 /*
345 * Set the master interrupt enable and interrupt vector.
346 * (common to both channels, do it on A)
347 */
348 cs = zsc->zsc_cs[0];
349 s = splhigh();
350 /* interrupt vector */
351 zs_write_reg(cs, 2, zs_init_reg[2]);
352 /* master interrupt control (enable) */
353 zs_write_reg(cs, 9, zs_init_reg[9]);
354 splx(s);
355
356 /*
357 * XXX: L1A hack - We would like to be able to break into
358 * the debugger during the rest of autoconfiguration, so
359 * lower interrupts just enough to let zs interrupts in.
360 * This is done after both zs devices are attached.
361 */
362 if (zs_unit == 1) {
363 printf("zsc1: enabling zs interrupts\n");
364 (void)spl5(); /* splzs - 1 */
365 }
366 }
367
368 static int
369 zs_print(aux, name)
370 void *aux;
371 const char *name;
372 {
373 struct zsc_attach_args *args = aux;
374
375 if (name != NULL)
376 printf("%s: ", name);
377
378 if (args->channel != -1)
379 printf(" channel %d", args->channel);
380
381 return UNCONF;
382 }
383
384 static volatile int zssoftpending;
385
386 /*
387 * Our ZS chips all share a common, autovectored interrupt,
388 * so we have to look at all of them on each interrupt.
389 */
390 static int
391 zshard(arg)
392 void *arg;
393 {
394 register struct zsc_softc *zsc;
395 register int unit, rval, softreq;
396
397 rval = softreq = 0;
398 for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
399 zsc = zsc_cd.cd_devs[unit];
400 if (zsc == NULL)
401 continue;
402 rval |= zsc_intr_hard(zsc);
403 softreq |= zsc->zsc_cs[0]->cs_softreq;
404 softreq |= zsc->zsc_cs[1]->cs_softreq;
405 }
406
407 /* We are at splzs here, so no need to lock. */
408 if (softreq && (zssoftpending == 0)) {
409 zssoftpending = ZSSOFT_PRI;
410 isr_soft_request(ZSSOFT_PRI);
411 }
412 return (rval);
413 }
414
415 /*
416 * Similar scheme as for zshard (look at all of them)
417 */
418 static int
419 zssoft(arg)
420 void *arg;
421 {
422 register struct zsc_softc *zsc;
423 register int s, unit;
424
425 /* This is not the only ISR on this IPL. */
426 if (zssoftpending == 0)
427 return (0);
428
429 /*
430 * The soft intr. bit will be set by zshard only if
431 * the variable zssoftpending is zero. The order of
432 * these next two statements prevents our clearing
433 * the soft intr bit just after zshard has set it.
434 */
435 isr_soft_clear(ZSSOFT_PRI);
436 zssoftpending = 0;
437
438 /* Make sure we call the tty layer at spltty. */
439 s = spltty();
440 for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
441 zsc = zsc_cd.cd_devs[unit];
442 if (zsc == NULL)
443 continue;
444 (void) zsc_intr_soft(zsc);
445 }
446 splx(s);
447 return (1);
448 }
449
450
451 /*
452 * Compute the current baud rate given a ZS channel.
453 */
454 static int
455 zs_get_speed(cs)
456 struct zs_chanstate *cs;
457 {
458 int tconst;
459
460 tconst = zs_read_reg(cs, 12);
461 tconst |= zs_read_reg(cs, 13) << 8;
462 return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
463 }
464
465 /*
466 * MD functions for setting the baud rate and control modes.
467 */
468 int
469 zs_set_speed(cs, bps)
470 struct zs_chanstate *cs;
471 int bps; /* bits per second */
472 {
473 int tconst, real_bps;
474
475 if (bps == 0)
476 return (0);
477
478 #ifdef DIAGNOSTIC
479 if (cs->cs_brg_clk == 0)
480 panic("zs_set_speed");
481 #endif
482
483 tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
484 if (tconst < 0)
485 return (EINVAL);
486
487 /* Convert back to make sure we can do it. */
488 real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
489
490 /* XXX - Allow some tolerance here? */
491 if (real_bps != bps)
492 return (EINVAL);
493
494 cs->cs_preg[12] = tconst;
495 cs->cs_preg[13] = tconst >> 8;
496
497 /* Caller will stuff the pending registers. */
498 return (0);
499 }
500
501 int
502 zs_set_modes(cs, cflag)
503 struct zs_chanstate *cs;
504 int cflag; /* bits per second */
505 {
506 int s;
507
508 /*
509 * Output hardware flow control on the chip is horrendous:
510 * if carrier detect drops, the receiver is disabled, and if
511 * CTS drops, the transmitter is stoped IN MID CHARACTER!
512 * Therefore, NEVER set the HFC bit, and instead use the
513 * status interrupt to detect CTS changes.
514 */
515 s = splzs();
516 if ((cflag & (CLOCAL | MDMBUF)) != 0)
517 cs->cs_rr0_dcd = 0;
518 else
519 cs->cs_rr0_dcd = ZSRR0_DCD;
520 if ((cflag & CRTSCTS) != 0) {
521 cs->cs_wr5_dtr = ZSWR5_DTR;
522 cs->cs_wr5_rts = ZSWR5_RTS;
523 cs->cs_rr0_cts = ZSRR0_CTS;
524 } else if ((cflag & MDMBUF) != 0) {
525 cs->cs_wr5_dtr = 0;
526 cs->cs_wr5_rts = ZSWR5_DTR;
527 cs->cs_rr0_cts = ZSRR0_DCD;
528 } else {
529 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
530 cs->cs_wr5_rts = 0;
531 cs->cs_rr0_cts = 0;
532 }
533 splx(s);
534
535 /* Caller will stuff the pending registers. */
536 return (0);
537 }
538
539
540 /*
541 * Read or write the chip with suitable delays.
542 */
543
544 u_char
545 zs_read_reg(cs, reg)
546 struct zs_chanstate *cs;
547 u_char reg;
548 {
549 u_char val;
550
551 *cs->cs_reg_csr = reg;
552 ZS_DELAY();
553 val = *cs->cs_reg_csr;
554 ZS_DELAY();
555 return val;
556 }
557
558 void
559 zs_write_reg(cs, reg, val)
560 struct zs_chanstate *cs;
561 u_char reg, val;
562 {
563 *cs->cs_reg_csr = reg;
564 ZS_DELAY();
565 *cs->cs_reg_csr = val;
566 ZS_DELAY();
567 }
568
569 u_char zs_read_csr(cs)
570 struct zs_chanstate *cs;
571 {
572 register u_char val;
573
574 val = *cs->cs_reg_csr;
575 ZS_DELAY();
576 return val;
577 }
578
579 void zs_write_csr(cs, val)
580 struct zs_chanstate *cs;
581 u_char val;
582 {
583 *cs->cs_reg_csr = val;
584 ZS_DELAY();
585 }
586
587 u_char zs_read_data(cs)
588 struct zs_chanstate *cs;
589 {
590 register u_char val;
591
592 val = *cs->cs_reg_data;
593 ZS_DELAY();
594 return val;
595 }
596
597 void zs_write_data(cs, val)
598 struct zs_chanstate *cs;
599 u_char val;
600 {
601 *cs->cs_reg_data = val;
602 ZS_DELAY();
603 }
604
605 /****************************************************************
606 * Console support functions (Sun3 specific!)
607 * Note: this code is allowed to know about the layout of
608 * the chip registers, and uses that to keep things simple.
609 * XXX - I think I like the mvme167 code better. -gwr
610 ****************************************************************/
611
612 void *zs_conschan;
613
614 /*
615 * Handle user request to enter kernel debugger.
616 */
617 void
618 zs_abort(cs)
619 struct zs_chanstate *cs;
620 {
621 register volatile struct zschan *zc = zs_conschan;
622 int rr0;
623
624 /* Wait for end of break to avoid PROM abort. */
625 /* XXX - Limit the wait? */
626 do {
627 rr0 = zc->zc_csr;
628 ZS_DELAY();
629 } while (rr0 & ZSRR0_BREAK);
630
631 /* This is always available on the Sun3. */
632 Debugger();
633 }
634
635 /*
636 * Polled input char.
637 */
638 int
639 zs_getc(arg)
640 void *arg;
641 {
642 register volatile struct zschan *zc = arg;
643 register int s, c, rr0;
644
645 s = splhigh();
646 /* Wait for a character to arrive. */
647 do {
648 rr0 = zc->zc_csr;
649 ZS_DELAY();
650 } while ((rr0 & ZSRR0_RX_READY) == 0);
651
652 c = zc->zc_data;
653 ZS_DELAY();
654 splx(s);
655
656 /*
657 * This is used by the kd driver to read scan codes,
658 * so don't translate '\r' ==> '\n' here...
659 */
660 return (c);
661 }
662
663 /*
664 * Polled output char.
665 */
666 void
667 zs_putc(arg, c)
668 void *arg;
669 int c;
670 {
671 register volatile struct zschan *zc = arg;
672 register int s, rr0;
673
674 s = splhigh();
675 /* Wait for transmitter to become ready. */
676 do {
677 rr0 = zc->zc_csr;
678 ZS_DELAY();
679 } while ((rr0 & ZSRR0_TX_READY) == 0);
680
681 zc->zc_data = c;
682 ZS_DELAY();
683 splx(s);
684 }
685
686 /*****************************************************************/
687
688 static void zscninit __P((struct consdev *));
689 static int zscngetc __P((dev_t));
690 static void zscnputc __P((dev_t, int));
691
692 /*
693 * Console table shared by ttya, ttyb
694 */
695 struct consdev consdev_tty = {
696 nullcnprobe,
697 zscninit,
698 zscngetc,
699 zscnputc,
700 nullcnpollc,
701 };
702
703 static void
704 zscninit(cn)
705 struct consdev *cn;
706 {
707 }
708
709 /*
710 * Polled console input putchar.
711 */
712 static int
713 zscngetc(dev)
714 dev_t dev;
715 {
716 return (zs_getc(zs_conschan));
717 }
718
719 /*
720 * Polled console output putchar.
721 */
722 static void
723 zscnputc(dev, c)
724 dev_t dev;
725 int c;
726 {
727 zs_putc(zs_conschan, c);
728 }
729
730 /*****************************************************************/
731
732 static void prom_cninit __P((struct consdev *));
733 static int prom_cngetc __P((dev_t));
734 static void prom_cnputc __P((dev_t, int));
735
736 /*
737 * The console is set to this one initially,
738 * which lets us use the PROM until consinit()
739 * is called to select a real console.
740 */
741 struct consdev consdev_prom = {
742 nullcnprobe,
743 prom_cninit,
744 prom_cngetc,
745 prom_cnputc,
746 nullcnpollc,
747 };
748
749 /*
750 * The console table pointer is statically initialized
751 * to point to the PROM (output only) table, so that
752 * early calls to printf will work.
753 */
754 struct consdev *cn_tab = &consdev_prom;
755
756 void
757 nullcnprobe(cn)
758 struct consdev *cn;
759 {
760 }
761
762 static void
763 prom_cninit(cn)
764 struct consdev *cn;
765 {
766 }
767
768 /*
769 * PROM console input putchar.
770 * (dummy - this is output only)
771 */
772 static int
773 prom_cngetc(dev)
774 dev_t dev;
775 {
776 return (0);
777 }
778
779 /*
780 * PROM console output putchar.
781 */
782 static void
783 prom_cnputc(dev, c)
784 dev_t dev;
785 int c;
786 {
787 (*romVectorPtr->putChar)(c & 0x7f);
788 }
789
790 /*****************************************************************/
791
792 extern struct consdev consdev_kd;
793
794 static struct {
795 int zs_unit, channel;
796 } zstty_conf[NZS*2] = {
797 /* XXX: knowledge from the config file here... */
798 { 1, 0 }, /* ttya */
799 { 1, 1 }, /* ttyb */
800 { 0, 0 }, /* ttyc */
801 { 0, 1 }, /* ttyd */
802 };
803
804 static char *prom_inSrc_name[] = {
805 "keyboard/display",
806 "ttya", "ttyb",
807 "ttyc", "ttyd" };
808
809 /*
810 * This function replaces sys/dev/cninit.c
811 * Determine which device is the console using
812 * the PROM "input source" and "output sink".
813 */
814 void
815 cninit()
816 {
817 MachMonRomVector *v;
818 struct zschan *zc;
819 struct consdev *cn;
820 int channel, zs_unit, zstty_unit;
821 u_char inSource, outSink;
822
823 v = romVectorPtr;
824 inSource = *v->inSource;
825 outSink = *v->outSink;
826 if (inSource != outSink) {
827 mon_printf("cninit: mismatched PROM output selector\n");
828 }
829
830 switch (inSource) {
831 default:
832 mon_printf("cninit: invalid inSource=%d\n", inSource);
833 sunmon_abort();
834 inSource = 0;
835 /* fall through */
836
837 case 0: /* keyboard/display */
838 #if NKBD > 0
839 zs_unit = 0;
840 channel = 0;
841 cn = &consdev_kd;
842 /* Set cn_dev, cn_pri in kd.c */
843 break;
844 #else /* NKBD */
845 mon_printf("cninit: kdb/display not configured\n");
846 sunmon_abort();
847 inSource = 1;
848 /* fall through */
849 #endif /* NKBD */
850
851 case 1: /* ttya */
852 case 2: /* ttyb */
853 case 3: /* ttyc (rewired keyboard connector) */
854 case 4: /* ttyd (rewired mouse connector) */
855 zstty_unit = inSource - 1;
856 zs_unit = zstty_conf[zstty_unit].zs_unit;
857 channel = zstty_conf[zstty_unit].channel;
858 cn = &consdev_tty;
859 cn->cn_dev = makedev(zs_major, zstty_unit);
860 cn->cn_pri = CN_REMOTE;
861 break;
862
863 }
864 /* Now that inSource has been validated, print it. */
865 mon_printf("console is %s\n", prom_inSrc_name[inSource]);
866
867 zc = zs_get_chan_addr(zs_unit, channel);
868 if (zc == NULL) {
869 mon_printf("cninit: zs not mapped.\n");
870 return;
871 }
872 zs_conschan = zc;
873 zs_hwflags[zs_unit][channel] = ZS_HWFLAG_CONSOLE;
874 cn_tab = cn;
875 (*cn->cn_init)(cn);
876 #ifdef KGDB
877 zs_kgdb_init();
878 #endif
879 }
880