zs.c revision 1.57 1 /* $NetBSD: zs.c,v 1.57 1999/03/27 01:21:36 wrstuden Exp $ */
2
3 /*-
4 * Copyright (c) 1996 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Gordon W. Ross.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Zilog Z8530 Dual UART driver (machine-dependent part)
41 *
42 * Runs two serial lines per chip using slave drivers.
43 * Plain tty/async lines use the zs_async slave.
44 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
45 */
46
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/conf.h>
50 #include <sys/device.h>
51 #include <sys/file.h>
52 #include <sys/ioctl.h>
53 #include <sys/kernel.h>
54 #include <sys/proc.h>
55 #include <sys/tty.h>
56 #include <sys/time.h>
57 #include <sys/syslog.h>
58
59 #include <machine/autoconf.h>
60 #include <machine/cpu.h>
61 #include <machine/mon.h>
62 #include <machine/z8530var.h>
63
64 #include <sun3/sun3/machdep.h>
65 #ifdef _SUN3X_
66 #include <sun3/sun3x/obio.h>
67 #else
68 #include <sun3/sun3/obio.h>
69 #endif
70 #include <sun3/dev/zs_cons.h>
71
72 #include <dev/cons.h>
73 #include <dev/ic/z8530reg.h>
74
75 #include "kbd.h" /* NKBD */
76 #include "zsc.h" /* NZSC */
77 #define NZS NZSC
78
79 /* Make life easier for the initialized arrays here. */
80 #if NZS < 2
81 #undef NZS
82 #define NZS 2
83 #endif
84
85 extern void Debugger __P((void));
86
87 /*
88 * Some warts needed by z8530tty.c -
89 * The default parity REALLY needs to be the same as the PROM uses,
90 * or you can not see messages done with printf during boot-up...
91 */
92 int zs_def_cflag = (CREAD | CS8 | HUPCL);
93 int zs_major = 12;
94
95 /*
96 * The Sun3 provides a 4.9152 MHz clock to the ZS chips.
97 */
98 #define PCLK (9600 * 512) /* PCLK pin input clock rate */
99
100 /*
101 * Define interrupt levels.
102 */
103 #define ZSHARD_PRI 6 /* Wired on the CPU board... */
104 #define ZSSOFT_PRI 3 /* Want tty pri (4) but this is OK. */
105
106 #define ZS_DELAY() delay(2)
107
108 /* The layout of this is hardware-dependent (padding, order). */
109 struct zschan {
110 volatile u_char zc_csr; /* ctrl,status, and indirect access */
111 u_char zc_xxx0;
112 volatile u_char zc_data; /* data */
113 u_char zc_xxx1;
114 };
115 struct zsdevice {
116 /* Yes, they are backwards. */
117 struct zschan zs_chan_b;
118 struct zschan zs_chan_a;
119 };
120
121
122 /* Default OBIO addresses. */
123 static int zs_physaddr[NZS] = {
124 OBIO_ZS_KBD_MS,
125 OBIO_ZS_TTY_AB };
126
127 /* Saved PROM mappings */
128 static struct zsdevice *zsaddr[NZS];
129
130 /* Flags from cninit() */
131 static int zs_hwflags[NZS][2];
132
133 /* Default speed for each channel */
134 static int zs_defspeed[NZS][2] = {
135 { 1200, /* keyboard */
136 1200 }, /* mouse */
137 { 9600, /* ttya */
138 9600 }, /* ttyb */
139 };
140
141 static u_char zs_init_reg[16] = {
142 0, /* 0: CMD (reset, etc.) */
143 0, /* 1: No interrupts yet. */
144 0x18 + ZSHARD_PRI, /* IVECT */
145 ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
146 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
147 ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
148 0, /* 6: TXSYNC/SYNCLO */
149 0, /* 7: RXSYNC/SYNCHI */
150 0, /* 8: alias for data port */
151 ZSWR9_MASTER_IE,
152 0, /*10: Misc. TX/RX control bits */
153 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
154 ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */
155 0, /*13: BAUDHI (default=9600) */
156 ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
157 ZSWR15_BREAK_IE,
158 };
159
160
161 /* Find PROM mappings (for console support). */
162 void
163 zs_init()
164 {
165 int i;
166
167 for (i = 0; i < NZS; i++) {
168 zsaddr[i] = (struct zsdevice *)
169 obio_find_mapping(zs_physaddr[i], sizeof(struct zschan));
170 }
171 }
172
173 struct zschan *
174 zs_get_chan_addr(zs_unit, channel)
175 int zs_unit, channel;
176 {
177 struct zsdevice *addr;
178 struct zschan *zc;
179
180 if (zs_unit >= NZS)
181 return NULL;
182 addr = zsaddr[zs_unit];
183 if (addr == NULL)
184 return NULL;
185 if (channel == 0) {
186 zc = &addr->zs_chan_a;
187 } else {
188 zc = &addr->zs_chan_b;
189 }
190 return (zc);
191 }
192
193
194 /****************************************************************
195 * Autoconfig
196 ****************************************************************/
197
198 /* Definition of the driver for autoconfig. */
199 static int zs_match __P((struct device *, struct cfdata *, void *));
200 static void zs_attach __P((struct device *, struct device *, void *));
201 static int zs_print __P((void *, const char *name));
202
203 struct cfattach zsc_ca = {
204 sizeof(struct zsc_softc), zs_match, zs_attach
205 };
206
207 extern struct cfdriver zsc_cd;
208
209 static int zshard __P((void *));
210 static int zssoft __P((void *));
211 static int zs_get_speed __P((struct zs_chanstate *));
212
213
214 /*
215 * Is the zs chip present?
216 */
217 static int
218 zs_match(parent, cf, aux)
219 struct device *parent;
220 struct cfdata *cf;
221 void *aux;
222 {
223 struct confargs *ca = aux;
224 int unit = cf->cf_unit;
225 void *va;
226
227 /*
228 * This driver only supports its wired-in mappings,
229 * because the console support depends on those.
230 */
231 if (ca->ca_paddr != zs_physaddr[unit])
232 return (0);
233
234 /* Make sure zs_init() found mappings. */
235 va = zsaddr[unit];
236 if (va == NULL)
237 return (0);
238
239 /* This returns -1 on a fault (bus error). */
240 if (peek_byte(va) == -1)
241 return (0);
242
243 /* Default interrupt priority (always splbio==2) */
244 if (ca->ca_intpri == -1)
245 ca->ca_intpri = ZSHARD_PRI;
246
247 return (1);
248 }
249
250 /*
251 * Attach a found zs.
252 *
253 * Match slave number to zs unit number, so that misconfiguration will
254 * not set up the keyboard as ttya, etc.
255 */
256 static void
257 zs_attach(parent, self, aux)
258 struct device *parent;
259 struct device *self;
260 void *aux;
261 {
262 struct zsc_softc *zsc = (void *) self;
263 struct confargs *ca = aux;
264 struct zsc_attach_args zsc_args;
265 volatile struct zschan *zc;
266 struct zs_chanstate *cs;
267 int s, zs_unit, channel;
268 static int didintr;
269
270 zs_unit = zsc->zsc_dev.dv_unit;
271
272 printf(": (softpri %d)\n", ZSSOFT_PRI);
273
274 /* Use the mapping setup by the Sun PROM. */
275 if (zsaddr[zs_unit] == NULL)
276 panic("zs_attach: zs%d not mapped\n", zs_unit);
277
278 /*
279 * Initialize software state for each channel.
280 */
281 for (channel = 0; channel < 2; channel++) {
282 zsc_args.channel = channel;
283 zsc_args.hwflags = zs_hwflags[zs_unit][channel];
284 cs = &zsc->zsc_cs_store[channel];
285 zsc->zsc_cs[channel] = cs;
286
287 cs->cs_channel = channel;
288 cs->cs_private = NULL;
289 cs->cs_ops = &zsops_null;
290 cs->cs_brg_clk = PCLK / 16;
291
292 zc = zs_get_chan_addr(zs_unit, channel);
293 cs->cs_reg_csr = &zc->zc_csr;
294 cs->cs_reg_data = &zc->zc_data;
295
296 bcopy(zs_init_reg, cs->cs_creg, 16);
297 bcopy(zs_init_reg, cs->cs_preg, 16);
298
299 /* XXX: Get these from the EEPROM instead? */
300 /* XXX: See the mvme167 code. Better. */
301 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
302 cs->cs_defspeed = zs_get_speed(cs);
303 else
304 cs->cs_defspeed = zs_defspeed[zs_unit][channel];
305 cs->cs_defcflag = zs_def_cflag;
306
307 /* Make these correspond to cs_defcflag (-crtscts) */
308 cs->cs_rr0_dcd = ZSRR0_DCD;
309 cs->cs_rr0_cts = 0;
310 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
311 cs->cs_wr5_rts = 0;
312
313 /*
314 * Clear the master interrupt enable.
315 * The INTENA is common to both channels,
316 * so just do it on the A channel.
317 */
318 if (channel == 0) {
319 zs_write_reg(cs, 9, 0);
320 }
321
322 /*
323 * Look for a child driver for this channel.
324 * The child attach will setup the hardware.
325 */
326 if (!config_found(self, (void *)&zsc_args, zs_print)) {
327 /* No sub-driver. Just reset it. */
328 u_char reset = (channel == 0) ?
329 ZSWR9_A_RESET : ZSWR9_B_RESET;
330 s = splhigh();
331 zs_write_reg(cs, 9, reset);
332 splx(s);
333 }
334 }
335
336 /*
337 * Now safe to install interrupt handlers. Note the arguments
338 * to the interrupt handlers aren't used. Note, we only do this
339 * once since both SCCs interrupt at the same level and vector.
340 */
341 if (!didintr) {
342 didintr = 1;
343 isr_add_autovect(zssoft, NULL, ZSSOFT_PRI);
344 isr_add_autovect(zshard, NULL, ca->ca_intpri);
345 }
346 /* XXX; evcnt_attach() ? */
347
348 /*
349 * Set the master interrupt enable and interrupt vector.
350 * (common to both channels, do it on A)
351 */
352 cs = zsc->zsc_cs[0];
353 s = splhigh();
354 /* interrupt vector */
355 zs_write_reg(cs, 2, zs_init_reg[2]);
356 /* master interrupt control (enable) */
357 zs_write_reg(cs, 9, zs_init_reg[9]);
358 splx(s);
359
360 /*
361 * XXX: L1A hack - We would like to be able to break into
362 * the debugger during the rest of autoconfiguration, so
363 * lower interrupts just enough to let zs interrupts in.
364 * This is done after both zs devices are attached.
365 */
366 if (zs_unit == 1) {
367 (void)spl5(); /* splzs - 1 */
368 }
369 }
370
371 static int
372 zs_print(aux, name)
373 void *aux;
374 const char *name;
375 {
376 struct zsc_attach_args *args = aux;
377
378 if (name != NULL)
379 printf("%s: ", name);
380
381 if (args->channel != -1)
382 printf(" channel %d", args->channel);
383
384 return UNCONF;
385 }
386
387 static volatile int zssoftpending;
388
389 /*
390 * Our ZS chips all share a common, autovectored interrupt,
391 * so we have to look at all of them on each interrupt.
392 */
393 static int
394 zshard(arg)
395 void *arg;
396 {
397 register struct zsc_softc *zsc;
398 register int unit, rval, softreq;
399
400 rval = softreq = 0;
401 for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
402 zsc = zsc_cd.cd_devs[unit];
403 if (zsc == NULL)
404 continue;
405 rval |= zsc_intr_hard(zsc);
406 softreq |= zsc->zsc_cs[0]->cs_softreq;
407 softreq |= zsc->zsc_cs[1]->cs_softreq;
408 }
409
410 /* We are at splzs here, so no need to lock. */
411 if (softreq && (zssoftpending == 0)) {
412 zssoftpending = ZSSOFT_PRI;
413 isr_soft_request(ZSSOFT_PRI);
414 }
415 return (rval);
416 }
417
418 /*
419 * Similar scheme as for zshard (look at all of them)
420 */
421 static int
422 zssoft(arg)
423 void *arg;
424 {
425 register struct zsc_softc *zsc;
426 register int s, unit;
427
428 /* This is not the only ISR on this IPL. */
429 if (zssoftpending == 0)
430 return (0);
431
432 /*
433 * The soft intr. bit will be set by zshard only if
434 * the variable zssoftpending is zero. The order of
435 * these next two statements prevents our clearing
436 * the soft intr bit just after zshard has set it.
437 */
438 isr_soft_clear(ZSSOFT_PRI);
439 zssoftpending = 0;
440
441 /* Make sure we call the tty layer at spltty. */
442 s = spltty();
443 for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
444 zsc = zsc_cd.cd_devs[unit];
445 if (zsc == NULL)
446 continue;
447 (void) zsc_intr_soft(zsc);
448 }
449 splx(s);
450 return (1);
451 }
452
453
454 /*
455 * Compute the current baud rate given a ZS channel.
456 */
457 static int
458 zs_get_speed(cs)
459 struct zs_chanstate *cs;
460 {
461 int tconst;
462
463 tconst = zs_read_reg(cs, 12);
464 tconst |= zs_read_reg(cs, 13) << 8;
465 return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
466 }
467
468 /*
469 * MD functions for setting the baud rate and control modes.
470 */
471 int
472 zs_set_speed(cs, bps)
473 struct zs_chanstate *cs;
474 int bps; /* bits per second */
475 {
476 int tconst, real_bps;
477
478 if (bps == 0)
479 return (0);
480
481 #ifdef DIAGNOSTIC
482 if (cs->cs_brg_clk == 0)
483 panic("zs_set_speed");
484 #endif
485
486 tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
487 if (tconst < 0)
488 return (EINVAL);
489
490 /* Convert back to make sure we can do it. */
491 real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
492
493 /* XXX - Allow some tolerance here? */
494 if (real_bps != bps)
495 return (EINVAL);
496
497 cs->cs_preg[12] = tconst;
498 cs->cs_preg[13] = tconst >> 8;
499
500 /* Caller will stuff the pending registers. */
501 return (0);
502 }
503
504 int
505 zs_set_modes(cs, cflag)
506 struct zs_chanstate *cs;
507 int cflag; /* bits per second */
508 {
509 int s;
510
511 /*
512 * Output hardware flow control on the chip is horrendous:
513 * if carrier detect drops, the receiver is disabled, and if
514 * CTS drops, the transmitter is stoped IN MID CHARACTER!
515 * Therefore, NEVER set the HFC bit, and instead use the
516 * status interrupt to detect CTS changes.
517 */
518 s = splzs();
519 cs->cs_rr0_pps = 0;
520 if ((cflag & (CLOCAL | MDMBUF)) != 0) {
521 cs->cs_rr0_dcd = 0;
522 if ((cflag & MDMBUF) == 0)
523 cs->cs_rr0_pps = ZSRR0_DCD;
524 } else
525 cs->cs_rr0_dcd = ZSRR0_DCD;
526 if ((cflag & CRTSCTS) != 0) {
527 cs->cs_wr5_dtr = ZSWR5_DTR;
528 cs->cs_wr5_rts = ZSWR5_RTS;
529 cs->cs_rr0_cts = ZSRR0_CTS;
530 } else if ((cflag & MDMBUF) != 0) {
531 cs->cs_wr5_dtr = 0;
532 cs->cs_wr5_rts = ZSWR5_DTR;
533 cs->cs_rr0_cts = ZSRR0_DCD;
534 } else {
535 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
536 cs->cs_wr5_rts = 0;
537 cs->cs_rr0_cts = 0;
538 }
539 splx(s);
540
541 /* Caller will stuff the pending registers. */
542 return (0);
543 }
544
545
546 /*
547 * Read or write the chip with suitable delays.
548 */
549
550 u_char
551 zs_read_reg(cs, reg)
552 struct zs_chanstate *cs;
553 u_char reg;
554 {
555 u_char val;
556
557 *cs->cs_reg_csr = reg;
558 ZS_DELAY();
559 val = *cs->cs_reg_csr;
560 ZS_DELAY();
561 return val;
562 }
563
564 void
565 zs_write_reg(cs, reg, val)
566 struct zs_chanstate *cs;
567 u_char reg, val;
568 {
569 *cs->cs_reg_csr = reg;
570 ZS_DELAY();
571 *cs->cs_reg_csr = val;
572 ZS_DELAY();
573 }
574
575 u_char zs_read_csr(cs)
576 struct zs_chanstate *cs;
577 {
578 register u_char val;
579
580 val = *cs->cs_reg_csr;
581 ZS_DELAY();
582 return val;
583 }
584
585 void zs_write_csr(cs, val)
586 struct zs_chanstate *cs;
587 u_char val;
588 {
589 *cs->cs_reg_csr = val;
590 ZS_DELAY();
591 }
592
593 u_char zs_read_data(cs)
594 struct zs_chanstate *cs;
595 {
596 register u_char val;
597
598 val = *cs->cs_reg_data;
599 ZS_DELAY();
600 return val;
601 }
602
603 void zs_write_data(cs, val)
604 struct zs_chanstate *cs;
605 u_char val;
606 {
607 *cs->cs_reg_data = val;
608 ZS_DELAY();
609 }
610
611 /****************************************************************
612 * Console support functions (Sun3 specific!)
613 * Note: this code is allowed to know about the layout of
614 * the chip registers, and uses that to keep things simple.
615 * XXX - I think I like the mvme167 code better. -gwr
616 ****************************************************************/
617
618 void *zs_conschan;
619
620 /*
621 * Handle user request to enter kernel debugger.
622 */
623 void
624 zs_abort(cs)
625 struct zs_chanstate *cs;
626 {
627 register volatile struct zschan *zc = zs_conschan;
628 int rr0;
629
630 /* Wait for end of break to avoid PROM abort. */
631 /* XXX - Limit the wait? */
632 do {
633 rr0 = zc->zc_csr;
634 ZS_DELAY();
635 } while (rr0 & ZSRR0_BREAK);
636
637 /* This is always available on the Sun3. */
638 Debugger();
639 }
640
641 /*
642 * Polled input char.
643 */
644 int
645 zs_getc(arg)
646 void *arg;
647 {
648 register volatile struct zschan *zc = arg;
649 register int s, c, rr0;
650
651 s = splhigh();
652 /* Wait for a character to arrive. */
653 do {
654 rr0 = zc->zc_csr;
655 ZS_DELAY();
656 } while ((rr0 & ZSRR0_RX_READY) == 0);
657
658 c = zc->zc_data;
659 ZS_DELAY();
660 splx(s);
661
662 /*
663 * This is used by the kd driver to read scan codes,
664 * so don't translate '\r' ==> '\n' here...
665 */
666 return (c);
667 }
668
669 /*
670 * Polled output char.
671 */
672 void
673 zs_putc(arg, c)
674 void *arg;
675 int c;
676 {
677 register volatile struct zschan *zc = arg;
678 register int s, rr0;
679
680 s = splhigh();
681 /* Wait for transmitter to become ready. */
682 do {
683 rr0 = zc->zc_csr;
684 ZS_DELAY();
685 } while ((rr0 & ZSRR0_TX_READY) == 0);
686
687 zc->zc_data = c;
688 ZS_DELAY();
689 splx(s);
690 }
691
692 /*****************************************************************/
693
694 static void zscninit __P((struct consdev *));
695 static int zscngetc __P((dev_t));
696 static void zscnputc __P((dev_t, int));
697
698 /*
699 * Console table shared by ttya, ttyb
700 */
701 struct consdev consdev_tty = {
702 nullcnprobe,
703 zscninit,
704 zscngetc,
705 zscnputc,
706 nullcnpollc,
707 };
708
709 static void
710 zscninit(cn)
711 struct consdev *cn;
712 {
713 }
714
715 /*
716 * Polled console input putchar.
717 */
718 static int
719 zscngetc(dev)
720 dev_t dev;
721 {
722 return (zs_getc(zs_conschan));
723 }
724
725 /*
726 * Polled console output putchar.
727 */
728 static void
729 zscnputc(dev, c)
730 dev_t dev;
731 int c;
732 {
733 zs_putc(zs_conschan, c);
734 }
735
736 /*****************************************************************/
737
738 static void prom_cninit __P((struct consdev *));
739 static int prom_cngetc __P((dev_t));
740 static void prom_cnputc __P((dev_t, int));
741
742 /*
743 * The console is set to this one initially,
744 * which lets us use the PROM until consinit()
745 * is called to select a real console.
746 */
747 struct consdev consdev_prom = {
748 nullcnprobe,
749 prom_cninit,
750 prom_cngetc,
751 prom_cnputc,
752 nullcnpollc,
753 };
754
755 /*
756 * The console table pointer is statically initialized
757 * to point to the PROM (output only) table, so that
758 * early calls to printf will work.
759 */
760 struct consdev *cn_tab = &consdev_prom;
761
762 void
763 nullcnprobe(cn)
764 struct consdev *cn;
765 {
766 }
767
768 static void
769 prom_cninit(cn)
770 struct consdev *cn;
771 {
772 }
773
774 /*
775 * PROM console input putchar.
776 * (dummy - this is output only)
777 */
778 static int
779 prom_cngetc(dev)
780 dev_t dev;
781 {
782 return (0);
783 }
784
785 /*
786 * PROM console output putchar.
787 */
788 static void
789 prom_cnputc(dev, c)
790 dev_t dev;
791 int c;
792 {
793 (*romVectorPtr->putChar)(c & 0x7f);
794 }
795
796 /*****************************************************************/
797
798 extern struct consdev consdev_kd;
799
800 static struct {
801 int zs_unit, channel;
802 } zstty_conf[NZS*2] = {
803 /* XXX: knowledge from the config file here... */
804 { 1, 0 }, /* ttya */
805 { 1, 1 }, /* ttyb */
806 { 0, 0 }, /* ttyc */
807 { 0, 1 }, /* ttyd */
808 };
809
810 static char *prom_inSrc_name[] = {
811 "keyboard/display",
812 "ttya", "ttyb",
813 "ttyc", "ttyd" };
814
815 /*
816 * This function replaces sys/dev/cninit.c
817 * Determine which device is the console using
818 * the PROM "input source" and "output sink".
819 */
820 void
821 cninit()
822 {
823 struct sunromvec *v;
824 struct zschan *zc;
825 struct consdev *cn;
826 int channel, zs_unit, zstty_unit;
827 u_char inSource, outSink;
828
829 /* Get the zs driver ready for console duty. */
830 zs_init();
831
832 v = romVectorPtr;
833 inSource = *v->inSource;
834 outSink = *v->outSink;
835 if (inSource != outSink) {
836 mon_printf("cninit: mismatched PROM output selector\n");
837 }
838
839 switch (inSource) {
840 default:
841 mon_printf("cninit: invalid inSource=%d\n", inSource);
842 sunmon_abort();
843 inSource = 0;
844 /* fall through */
845
846 case 0: /* keyboard/display */
847 #if NKBD > 0
848 zs_unit = 0;
849 channel = 0;
850 cn = &consdev_kd;
851 /* Set cn_dev, cn_pri in kd.c */
852 break;
853 #else /* NKBD */
854 mon_printf("cninit: kdb/display not configured\n");
855 sunmon_abort();
856 inSource = 1;
857 /* fall through */
858 #endif /* NKBD */
859
860 case 1: /* ttya */
861 case 2: /* ttyb */
862 case 3: /* ttyc (rewired keyboard connector) */
863 case 4: /* ttyd (rewired mouse connector) */
864 zstty_unit = inSource - 1;
865 zs_unit = zstty_conf[zstty_unit].zs_unit;
866 channel = zstty_conf[zstty_unit].channel;
867 cn = &consdev_tty;
868 cn->cn_dev = makedev(zs_major, zstty_unit);
869 cn->cn_pri = CN_REMOTE;
870 break;
871
872 }
873 /* Now that inSource has been validated, print it. */
874 mon_printf("console is %s\n", prom_inSrc_name[inSource]);
875
876 zc = zs_get_chan_addr(zs_unit, channel);
877 if (zc == NULL) {
878 mon_printf("cninit: zs not mapped.\n");
879 return;
880 }
881 zs_conschan = zc;
882 zs_hwflags[zs_unit][channel] = ZS_HWFLAG_CONSOLE;
883 cn_tab = cn;
884 (*cn->cn_init)(cn);
885 #ifdef KGDB
886 zs_kgdb_init();
887 #endif
888 }
889