zs.c revision 1.65
1 /* $NetBSD: zs.c,v 1.65 2002/09/06 13:18:43 gehenna Exp $ */ 2 3 /*- 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Gordon W. Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Zilog Z8530 Dual UART driver (machine-dependent part) 41 * 42 * Runs two serial lines per chip using slave drivers. 43 * Plain tty/async lines use the zs_async slave. 44 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 45 */ 46 47 #include "opt_kgdb.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/conf.h> 52 #include <sys/device.h> 53 #include <sys/file.h> 54 #include <sys/ioctl.h> 55 #include <sys/kernel.h> 56 #include <sys/proc.h> 57 #include <sys/tty.h> 58 #include <sys/time.h> 59 #include <sys/syslog.h> 60 61 #include <machine/autoconf.h> 62 #include <machine/cpu.h> 63 #include <machine/mon.h> 64 #include <machine/z8530var.h> 65 66 #include <sun3/sun3/machdep.h> 67 #ifdef _SUN3X_ 68 #include <sun3/sun3x/obio.h> 69 #else 70 #include <sun3/sun3/obio.h> 71 #endif 72 #include <sun3/dev/zs_cons.h> 73 74 #include <dev/cons.h> 75 #include <dev/ic/z8530reg.h> 76 77 #include "kbd.h" /* NKBD */ 78 #include "zsc.h" /* NZSC */ 79 #define NZS NZSC 80 81 /* Make life easier for the initialized arrays here. */ 82 #if NZS < 2 83 #undef NZS 84 #define NZS 2 85 #endif 86 87 /* 88 * Some warts needed by z8530tty.c - 89 * The default parity REALLY needs to be the same as the PROM uses, 90 * or you can not see messages done with printf during boot-up... 91 */ 92 int zs_def_cflag = (CREAD | CS8 | HUPCL); 93 94 /* 95 * The Sun3 provides a 4.9152 MHz clock to the ZS chips. 96 */ 97 #define PCLK (9600 * 512) /* PCLK pin input clock rate */ 98 99 /* 100 * Define interrupt levels. 101 */ 102 #define ZSHARD_PRI 6 /* Wired on the CPU board... */ 103 #define ZSSOFT_PRI 3 /* Want tty pri (4) but this is OK. */ 104 105 #define ZS_DELAY() delay(2) 106 107 /* The layout of this is hardware-dependent (padding, order). */ 108 struct zschan { 109 volatile u_char zc_csr; /* ctrl,status, and indirect access */ 110 u_char zc_xxx0; 111 volatile u_char zc_data; /* data */ 112 u_char zc_xxx1; 113 }; 114 struct zsdevice { 115 /* Yes, they are backwards. */ 116 struct zschan zs_chan_b; 117 struct zschan zs_chan_a; 118 }; 119 120 121 /* Default OBIO addresses. */ 122 static int zs_physaddr[NZS] = { 123 OBIO_ZS_KBD_MS, 124 OBIO_ZS_TTY_AB }; 125 126 /* Saved PROM mappings */ 127 static struct zsdevice *zsaddr[NZS]; 128 129 /* Flags from cninit() */ 130 static int zs_hwflags[NZS][2]; 131 132 /* Default speed for each channel */ 133 static int zs_defspeed[NZS][2] = { 134 { 1200, /* keyboard */ 135 1200 }, /* mouse */ 136 { 9600, /* ttya */ 137 9600 }, /* ttyb */ 138 }; 139 140 static u_char zs_init_reg[16] = { 141 0, /* 0: CMD (reset, etc.) */ 142 0, /* 1: No interrupts yet. */ 143 0x18 + ZSHARD_PRI, /* IVECT */ 144 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 145 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 146 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 147 0, /* 6: TXSYNC/SYNCLO */ 148 0, /* 7: RXSYNC/SYNCHI */ 149 0, /* 8: alias for data port */ 150 ZSWR9_MASTER_IE, 151 0, /*10: Misc. TX/RX control bits */ 152 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 153 ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */ 154 0, /*13: BAUDHI (default=9600) */ 155 ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK, 156 ZSWR15_BREAK_IE, 157 }; 158 159 160 /* Find PROM mappings (for console support). */ 161 void 162 zs_init() 163 { 164 int i; 165 166 for (i = 0; i < NZS; i++) { 167 zsaddr[i] = (struct zsdevice *) 168 obio_find_mapping(zs_physaddr[i], sizeof(struct zschan)); 169 } 170 } 171 172 struct zschan * 173 zs_get_chan_addr(zs_unit, channel) 174 int zs_unit, channel; 175 { 176 struct zsdevice *addr; 177 struct zschan *zc; 178 179 if (zs_unit >= NZS) 180 return NULL; 181 addr = zsaddr[zs_unit]; 182 if (addr == NULL) 183 return NULL; 184 if (channel == 0) { 185 zc = &addr->zs_chan_a; 186 } else { 187 zc = &addr->zs_chan_b; 188 } 189 return (zc); 190 } 191 192 193 /**************************************************************** 194 * Autoconfig 195 ****************************************************************/ 196 197 /* Definition of the driver for autoconfig. */ 198 static int zs_match __P((struct device *, struct cfdata *, void *)); 199 static void zs_attach __P((struct device *, struct device *, void *)); 200 static int zs_print __P((void *, const char *name)); 201 202 struct cfattach zsc_ca = { 203 sizeof(struct zsc_softc), zs_match, zs_attach 204 }; 205 206 extern struct cfdriver zsc_cd; 207 208 static int zshard __P((void *)); 209 static int zssoft __P((void *)); 210 static int zs_get_speed __P((struct zs_chanstate *)); 211 212 213 /* 214 * Is the zs chip present? 215 */ 216 static int 217 zs_match(parent, cf, aux) 218 struct device *parent; 219 struct cfdata *cf; 220 void *aux; 221 { 222 struct confargs *ca = aux; 223 int unit; 224 void *va; 225 226 /* 227 * This driver only supports its wired-in mappings, 228 * because the console support depends on those. 229 */ 230 if (ca->ca_paddr == zs_physaddr[0]) { 231 unit = 0; 232 } else if (ca->ca_paddr == zs_physaddr[1]) { 233 unit = 1; 234 } else { 235 return (0); 236 } 237 238 /* Make sure zs_init() found mappings. */ 239 va = zsaddr[unit]; 240 if (va == NULL) 241 return (0); 242 243 /* This returns -1 on a fault (bus error). */ 244 if (peek_byte(va) == -1) 245 return (0); 246 247 /* Default interrupt priority (always splbio==2) */ 248 if (ca->ca_intpri == -1) 249 ca->ca_intpri = ZSHARD_PRI; 250 251 return (1); 252 } 253 254 /* 255 * Attach a found zs. 256 * 257 * Match slave number to zs unit number, so that misconfiguration will 258 * not set up the keyboard as ttya, etc. 259 */ 260 static void 261 zs_attach(parent, self, aux) 262 struct device *parent; 263 struct device *self; 264 void *aux; 265 { 266 struct zsc_softc *zsc = (void *) self; 267 struct confargs *ca = aux; 268 struct zsc_attach_args zsc_args; 269 volatile struct zschan *zc; 270 struct zs_chanstate *cs; 271 int s, zs_unit, channel; 272 static int didintr; 273 274 zs_unit = zsc->zsc_dev.dv_unit; 275 276 printf(": (softpri %d)\n", ZSSOFT_PRI); 277 278 /* Use the mapping setup by the Sun PROM. */ 279 if (zsaddr[zs_unit] == NULL) 280 panic("zs_attach: zs%d not mapped\n", zs_unit); 281 282 /* 283 * Initialize software state for each channel. 284 */ 285 for (channel = 0; channel < 2; channel++) { 286 zsc_args.channel = channel; 287 zsc_args.hwflags = zs_hwflags[zs_unit][channel]; 288 cs = &zsc->zsc_cs_store[channel]; 289 zsc->zsc_cs[channel] = cs; 290 291 cs->cs_channel = channel; 292 cs->cs_private = NULL; 293 cs->cs_ops = &zsops_null; 294 cs->cs_brg_clk = PCLK / 16; 295 296 zc = zs_get_chan_addr(zs_unit, channel); 297 cs->cs_reg_csr = &zc->zc_csr; 298 cs->cs_reg_data = &zc->zc_data; 299 300 memcpy(cs->cs_creg, zs_init_reg, 16); 301 memcpy(cs->cs_preg, zs_init_reg, 16); 302 303 /* XXX: Get these from the EEPROM instead? */ 304 /* XXX: See the mvme167 code. Better. */ 305 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) 306 cs->cs_defspeed = zs_get_speed(cs); 307 else 308 cs->cs_defspeed = zs_defspeed[zs_unit][channel]; 309 cs->cs_defcflag = zs_def_cflag; 310 311 /* Make these correspond to cs_defcflag (-crtscts) */ 312 cs->cs_rr0_dcd = ZSRR0_DCD; 313 cs->cs_rr0_cts = 0; 314 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 315 cs->cs_wr5_rts = 0; 316 317 /* 318 * Clear the master interrupt enable. 319 * The INTENA is common to both channels, 320 * so just do it on the A channel. 321 */ 322 if (channel == 0) { 323 zs_write_reg(cs, 9, 0); 324 } 325 326 /* 327 * Look for a child driver for this channel. 328 * The child attach will setup the hardware. 329 */ 330 if (!config_found(self, (void *)&zsc_args, zs_print)) { 331 /* No sub-driver. Just reset it. */ 332 u_char reset = (channel == 0) ? 333 ZSWR9_A_RESET : ZSWR9_B_RESET; 334 s = splhigh(); 335 zs_write_reg(cs, 9, reset); 336 splx(s); 337 } 338 } 339 340 /* 341 * Now safe to install interrupt handlers. Note the arguments 342 * to the interrupt handlers aren't used. Note, we only do this 343 * once since both SCCs interrupt at the same level and vector. 344 */ 345 if (!didintr) { 346 didintr = 1; 347 isr_add_autovect(zssoft, NULL, ZSSOFT_PRI); 348 isr_add_autovect(zshard, NULL, ca->ca_intpri); 349 } 350 /* XXX; evcnt_attach() ? */ 351 352 /* 353 * Set the master interrupt enable and interrupt vector. 354 * (common to both channels, do it on A) 355 */ 356 cs = zsc->zsc_cs[0]; 357 s = splhigh(); 358 /* interrupt vector */ 359 zs_write_reg(cs, 2, zs_init_reg[2]); 360 /* master interrupt control (enable) */ 361 zs_write_reg(cs, 9, zs_init_reg[9]); 362 splx(s); 363 364 /* 365 * XXX: L1A hack - We would like to be able to break into 366 * the debugger during the rest of autoconfiguration, so 367 * lower interrupts just enough to let zs interrupts in. 368 * This is done after both zs devices are attached. 369 */ 370 if (zs_unit == 1) { 371 (void)spl5(); /* splzs - 1 */ 372 } 373 } 374 375 static int 376 zs_print(aux, name) 377 void *aux; 378 const char *name; 379 { 380 struct zsc_attach_args *args = aux; 381 382 if (name != NULL) 383 printf("%s: ", name); 384 385 if (args->channel != -1) 386 printf(" channel %d", args->channel); 387 388 return UNCONF; 389 } 390 391 static volatile int zssoftpending; 392 393 /* 394 * Our ZS chips all share a common, autovectored interrupt, 395 * so we have to look at all of them on each interrupt. 396 */ 397 static int 398 zshard(arg) 399 void *arg; 400 { 401 struct zsc_softc *zsc; 402 int unit, rval, softreq; 403 404 rval = softreq = 0; 405 for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) { 406 zsc = zsc_cd.cd_devs[unit]; 407 if (zsc == NULL) 408 continue; 409 rval |= zsc_intr_hard(zsc); 410 softreq |= zsc->zsc_cs[0]->cs_softreq; 411 softreq |= zsc->zsc_cs[1]->cs_softreq; 412 } 413 414 /* We are at splzs here, so no need to lock. */ 415 if (softreq && (zssoftpending == 0)) { 416 zssoftpending = ZSSOFT_PRI; 417 isr_soft_request(ZSSOFT_PRI); 418 } 419 return (rval); 420 } 421 422 /* 423 * Similar scheme as for zshard (look at all of them) 424 */ 425 static int 426 zssoft(arg) 427 void *arg; 428 { 429 struct zsc_softc *zsc; 430 int s, unit; 431 432 /* This is not the only ISR on this IPL. */ 433 if (zssoftpending == 0) 434 return (0); 435 436 /* 437 * The soft intr. bit will be set by zshard only if 438 * the variable zssoftpending is zero. The order of 439 * these next two statements prevents our clearing 440 * the soft intr bit just after zshard has set it. 441 */ 442 isr_soft_clear(ZSSOFT_PRI); 443 zssoftpending = 0; 444 445 /* Make sure we call the tty layer at spltty. */ 446 s = spltty(); 447 for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) { 448 zsc = zsc_cd.cd_devs[unit]; 449 if (zsc == NULL) 450 continue; 451 (void) zsc_intr_soft(zsc); 452 } 453 splx(s); 454 return (1); 455 } 456 457 458 /* 459 * Compute the current baud rate given a ZS channel. 460 */ 461 static int 462 zs_get_speed(cs) 463 struct zs_chanstate *cs; 464 { 465 int tconst; 466 467 tconst = zs_read_reg(cs, 12); 468 tconst |= zs_read_reg(cs, 13) << 8; 469 return (TCONST_TO_BPS(cs->cs_brg_clk, tconst)); 470 } 471 472 /* 473 * MD functions for setting the baud rate and control modes. 474 */ 475 int 476 zs_set_speed(cs, bps) 477 struct zs_chanstate *cs; 478 int bps; /* bits per second */ 479 { 480 int tconst, real_bps; 481 482 if (bps == 0) 483 return (0); 484 485 #ifdef DIAGNOSTIC 486 if (cs->cs_brg_clk == 0) 487 panic("zs_set_speed"); 488 #endif 489 490 tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps); 491 if (tconst < 0) 492 return (EINVAL); 493 494 /* Convert back to make sure we can do it. */ 495 real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst); 496 497 /* XXX - Allow some tolerance here? */ 498 if (real_bps != bps) 499 return (EINVAL); 500 501 cs->cs_preg[12] = tconst; 502 cs->cs_preg[13] = tconst >> 8; 503 504 /* Caller will stuff the pending registers. */ 505 return (0); 506 } 507 508 int 509 zs_set_modes(cs, cflag) 510 struct zs_chanstate *cs; 511 int cflag; /* bits per second */ 512 { 513 int s; 514 515 /* 516 * Output hardware flow control on the chip is horrendous: 517 * if carrier detect drops, the receiver is disabled, and if 518 * CTS drops, the transmitter is stoped IN MID CHARACTER! 519 * Therefore, NEVER set the HFC bit, and instead use the 520 * status interrupt to detect CTS changes. 521 */ 522 s = splzs(); 523 cs->cs_rr0_pps = 0; 524 if ((cflag & (CLOCAL | MDMBUF)) != 0) { 525 cs->cs_rr0_dcd = 0; 526 if ((cflag & MDMBUF) == 0) 527 cs->cs_rr0_pps = ZSRR0_DCD; 528 } else 529 cs->cs_rr0_dcd = ZSRR0_DCD; 530 if ((cflag & CRTSCTS) != 0) { 531 cs->cs_wr5_dtr = ZSWR5_DTR; 532 cs->cs_wr5_rts = ZSWR5_RTS; 533 cs->cs_rr0_cts = ZSRR0_CTS; 534 } else if ((cflag & MDMBUF) != 0) { 535 cs->cs_wr5_dtr = 0; 536 cs->cs_wr5_rts = ZSWR5_DTR; 537 cs->cs_rr0_cts = ZSRR0_DCD; 538 } else { 539 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 540 cs->cs_wr5_rts = 0; 541 cs->cs_rr0_cts = 0; 542 } 543 splx(s); 544 545 /* Caller will stuff the pending registers. */ 546 return (0); 547 } 548 549 550 /* 551 * Read or write the chip with suitable delays. 552 */ 553 554 u_char 555 zs_read_reg(cs, reg) 556 struct zs_chanstate *cs; 557 u_char reg; 558 { 559 u_char val; 560 561 *cs->cs_reg_csr = reg; 562 ZS_DELAY(); 563 val = *cs->cs_reg_csr; 564 ZS_DELAY(); 565 return val; 566 } 567 568 void 569 zs_write_reg(cs, reg, val) 570 struct zs_chanstate *cs; 571 u_char reg, val; 572 { 573 *cs->cs_reg_csr = reg; 574 ZS_DELAY(); 575 *cs->cs_reg_csr = val; 576 ZS_DELAY(); 577 } 578 579 u_char zs_read_csr(cs) 580 struct zs_chanstate *cs; 581 { 582 u_char val; 583 584 val = *cs->cs_reg_csr; 585 ZS_DELAY(); 586 return val; 587 } 588 589 void zs_write_csr(cs, val) 590 struct zs_chanstate *cs; 591 u_char val; 592 { 593 *cs->cs_reg_csr = val; 594 ZS_DELAY(); 595 } 596 597 u_char zs_read_data(cs) 598 struct zs_chanstate *cs; 599 { 600 u_char val; 601 602 val = *cs->cs_reg_data; 603 ZS_DELAY(); 604 return val; 605 } 606 607 void zs_write_data(cs, val) 608 struct zs_chanstate *cs; 609 u_char val; 610 { 611 *cs->cs_reg_data = val; 612 ZS_DELAY(); 613 } 614 615 /**************************************************************** 616 * Console support functions (Sun3 specific!) 617 * Note: this code is allowed to know about the layout of 618 * the chip registers, and uses that to keep things simple. 619 * XXX - I think I like the mvme167 code better. -gwr 620 ****************************************************************/ 621 622 void *zs_conschan; 623 624 /* 625 * Handle user request to enter kernel debugger. 626 */ 627 void 628 zs_abort(cs) 629 struct zs_chanstate *cs; 630 { 631 volatile struct zschan *zc = zs_conschan; 632 int rr0; 633 634 /* Wait for end of break to avoid PROM abort. */ 635 /* XXX - Limit the wait? */ 636 do { 637 rr0 = zc->zc_csr; 638 ZS_DELAY(); 639 } while (rr0 & ZSRR0_BREAK); 640 641 /* This is always available on the Sun3. */ 642 Debugger(); 643 } 644 645 /* 646 * Polled input char. 647 */ 648 int 649 zs_getc(arg) 650 void *arg; 651 { 652 volatile struct zschan *zc = arg; 653 int s, c, rr0; 654 655 s = splhigh(); 656 /* Wait for a character to arrive. */ 657 do { 658 rr0 = zc->zc_csr; 659 ZS_DELAY(); 660 } while ((rr0 & ZSRR0_RX_READY) == 0); 661 662 c = zc->zc_data; 663 ZS_DELAY(); 664 splx(s); 665 666 /* 667 * This is used by the kd driver to read scan codes, 668 * so don't translate '\r' ==> '\n' here... 669 */ 670 return (c); 671 } 672 673 /* 674 * Polled output char. 675 */ 676 void 677 zs_putc(arg, c) 678 void *arg; 679 int c; 680 { 681 volatile struct zschan *zc = arg; 682 int s, rr0; 683 684 s = splhigh(); 685 /* Wait for transmitter to become ready. */ 686 do { 687 rr0 = zc->zc_csr; 688 ZS_DELAY(); 689 } while ((rr0 & ZSRR0_TX_READY) == 0); 690 691 zc->zc_data = c; 692 ZS_DELAY(); 693 splx(s); 694 } 695 696 /*****************************************************************/ 697 698 static void zscninit __P((struct consdev *)); 699 static int zscngetc __P((dev_t)); 700 static void zscnputc __P((dev_t, int)); 701 702 /* 703 * Console table shared by ttya, ttyb 704 */ 705 struct consdev consdev_tty = { 706 nullcnprobe, 707 zscninit, 708 zscngetc, 709 zscnputc, 710 nullcnpollc, 711 NULL, 712 }; 713 714 static void 715 zscninit(cn) 716 struct consdev *cn; 717 { 718 } 719 720 /* 721 * Polled console input putchar. 722 */ 723 static int 724 zscngetc(dev) 725 dev_t dev; 726 { 727 return (zs_getc(zs_conschan)); 728 } 729 730 /* 731 * Polled console output putchar. 732 */ 733 static void 734 zscnputc(dev, c) 735 dev_t dev; 736 int c; 737 { 738 zs_putc(zs_conschan, c); 739 } 740 741 /*****************************************************************/ 742 743 static void prom_cninit __P((struct consdev *)); 744 static int prom_cngetc __P((dev_t)); 745 static void prom_cnputc __P((dev_t, int)); 746 747 /* 748 * The console is set to this one initially, 749 * which lets us use the PROM until consinit() 750 * is called to select a real console. 751 */ 752 struct consdev consdev_prom = { 753 nullcnprobe, 754 prom_cninit, 755 prom_cngetc, 756 prom_cnputc, 757 nullcnpollc, 758 }; 759 760 /* 761 * The console table pointer is statically initialized 762 * to point to the PROM (output only) table, so that 763 * early calls to printf will work. 764 */ 765 struct consdev *cn_tab = &consdev_prom; 766 767 void 768 nullcnprobe(cn) 769 struct consdev *cn; 770 { 771 } 772 773 static void 774 prom_cninit(cn) 775 struct consdev *cn; 776 { 777 } 778 779 /* 780 * PROM console input putchar. 781 * (dummy - this is output only) 782 */ 783 static int 784 prom_cngetc(dev) 785 dev_t dev; 786 { 787 return (0); 788 } 789 790 /* 791 * PROM console output putchar. 792 */ 793 static void 794 prom_cnputc(dev, c) 795 dev_t dev; 796 int c; 797 { 798 (*romVectorPtr->putChar)(c & 0x7f); 799 } 800 801 /*****************************************************************/ 802 803 extern struct consdev consdev_kd; 804 805 static struct { 806 int zs_unit, channel; 807 } zstty_conf[NZS*2] = { 808 /* XXX: knowledge from the config file here... */ 809 { 1, 0 }, /* ttya */ 810 { 1, 1 }, /* ttyb */ 811 { 0, 0 }, /* ttyc */ 812 { 0, 1 }, /* ttyd */ 813 }; 814 815 static char *prom_inSrc_name[] = { 816 "keyboard/display", 817 "ttya", "ttyb", 818 "ttyc", "ttyd" }; 819 820 /* 821 * This function replaces sys/dev/cninit.c 822 * Determine which device is the console using 823 * the PROM "input source" and "output sink". 824 */ 825 void 826 cninit() 827 { 828 struct sunromvec *v; 829 struct zschan *zc; 830 struct consdev *cn; 831 int channel, zs_unit, zstty_unit; 832 u_char inSource, outSink; 833 extern const struct cdevsw zstty_cdevsw; 834 835 /* Get the zs driver ready for console duty. */ 836 zs_init(); 837 838 v = romVectorPtr; 839 inSource = *v->inSource; 840 outSink = *v->outSink; 841 if (inSource != outSink) { 842 mon_printf("cninit: mismatched PROM output selector\n"); 843 } 844 845 switch (inSource) { 846 default: 847 mon_printf("cninit: invalid inSource=%d\n", inSource); 848 sunmon_abort(); 849 inSource = 0; 850 /* fall through */ 851 852 case 0: /* keyboard/display */ 853 #if NKBD > 0 854 zs_unit = 0; 855 channel = 0; 856 cn = &consdev_kd; 857 /* Set cn_dev, cn_pri in kd.c */ 858 break; 859 #else /* NKBD */ 860 mon_printf("cninit: kdb/display not configured\n"); 861 sunmon_abort(); 862 inSource = 1; 863 /* fall through */ 864 #endif /* NKBD */ 865 866 case 1: /* ttya */ 867 case 2: /* ttyb */ 868 case 3: /* ttyc (rewired keyboard connector) */ 869 case 4: /* ttyd (rewired mouse connector) */ 870 zstty_unit = inSource - 1; 871 zs_unit = zstty_conf[zstty_unit].zs_unit; 872 channel = zstty_conf[zstty_unit].channel; 873 cn = &consdev_tty; 874 cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw), 875 zstty_unit); 876 cn->cn_pri = CN_REMOTE; 877 break; 878 879 } 880 /* Now that inSource has been validated, print it. */ 881 mon_printf("console is %s\n", prom_inSrc_name[inSource]); 882 883 zc = zs_get_chan_addr(zs_unit, channel); 884 if (zc == NULL) { 885 mon_printf("cninit: zs not mapped.\n"); 886 return; 887 } 888 zs_conschan = zc; 889 zs_hwflags[zs_unit][channel] = ZS_HWFLAG_CONSOLE; 890 cn_tab = cn; 891 (*cn->cn_init)(cn); 892 #ifdef KGDB 893 zs_kgdb_init(); 894 #endif 895 } 896
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