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zs.c revision 1.74
      1 /*	$NetBSD: zs.c,v 1.74 2005/06/03 15:04:21 tsutsui Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Gordon W. Ross.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *        This product includes software developed by the NetBSD
     21  *        Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 /*
     40  * Zilog Z8530 Dual UART driver (machine-dependent part)
     41  *
     42  * Runs two serial lines per chip using slave drivers.
     43  * Plain tty/async lines use the zs_async slave.
     44  * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
     45  */
     46 
     47 #include <sys/cdefs.h>
     48 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.74 2005/06/03 15:04:21 tsutsui Exp $");
     49 
     50 #include "opt_kgdb.h"
     51 
     52 #include <sys/param.h>
     53 #include <sys/systm.h>
     54 #include <sys/conf.h>
     55 #include <sys/device.h>
     56 #include <sys/file.h>
     57 #include <sys/ioctl.h>
     58 #include <sys/kernel.h>
     59 #include <sys/proc.h>
     60 #include <sys/tty.h>
     61 #include <sys/time.h>
     62 #include <sys/syslog.h>
     63 
     64 #include <machine/autoconf.h>
     65 #include <machine/cpu.h>
     66 #include <machine/mon.h>
     67 #include <machine/z8530var.h>
     68 
     69 #include <sun3/sun3/machdep.h>
     70 #ifdef	_SUN3X_
     71 #include <sun3/sun3x/obio.h>
     72 #else
     73 #include <sun3/sun3/obio.h>
     74 #endif
     75 #include <sun3/dev/zs_cons.h>
     76 
     77 #include <dev/cons.h>
     78 #include <dev/ic/z8530reg.h>
     79 
     80 #include "kbd.h"	/* NKBD */
     81 #include "zsc.h"	/* NZSC */
     82 #define NZS NZSC
     83 
     84 /* Make life easier for the initialized arrays here. */
     85 #if NZS < 2
     86 #undef  NZS
     87 #define NZS 2
     88 #endif
     89 
     90 /*
     91  * Some warts needed by z8530tty.c -
     92  * The default parity REALLY needs to be the same as the PROM uses,
     93  * or you can not see messages done with printf during boot-up...
     94  */
     95 int zs_def_cflag = (CREAD | CS8 | HUPCL);
     96 
     97 /*
     98  * The Sun3 provides a 4.9152 MHz clock to the ZS chips.
     99  */
    100 #define PCLK	(9600 * 512)	/* PCLK pin input clock rate */
    101 
    102 /*
    103  * Define interrupt levels.
    104  */
    105 #define ZSHARD_PRI	6	/* Wired on the CPU board... */
    106 #define ZSSOFT_PRI	3	/* Want tty pri (4) but this is OK. */
    107 
    108 #define ZS_DELAY()			delay(2)
    109 
    110 /* The layout of this is hardware-dependent (padding, order). */
    111 struct zschan {
    112 	volatile u_char	zc_csr;		/* ctrl,status, and indirect access */
    113 	u_char		zc_xxx0;
    114 	volatile u_char	zc_data;	/* data */
    115 	u_char		zc_xxx1;
    116 };
    117 struct zsdevice {
    118 	/* Yes, they are backwards. */
    119 	struct	zschan zs_chan_b;
    120 	struct	zschan zs_chan_a;
    121 };
    122 
    123 
    124 /* Default OBIO addresses. */
    125 static int zs_physaddr[NZS] = {
    126 	OBIO_ZS_KBD_MS,
    127 	OBIO_ZS_TTY_AB };
    128 
    129 /* Saved PROM mappings */
    130 static struct zsdevice *zsaddr[NZS];
    131 
    132 /* Flags from cninit() */
    133 static int zs_hwflags[NZS][2];
    134 
    135 /* Default speed for each channel */
    136 static int zs_defspeed[NZS][2] = {
    137 	{ 1200, 	/* keyboard */
    138 	  1200 },	/* mouse */
    139 	{ 9600, 	/* ttya */
    140 	  9600 },	/* ttyb */
    141 };
    142 
    143 static u_char zs_init_reg[16] = {
    144 	0,	/* 0: CMD (reset, etc.) */
    145 	0,	/* 1: No interrupts yet. */
    146 	0x18 + ZSHARD_PRI,	/* IVECT */
    147 	ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
    148 	ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
    149 	ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
    150 	0,	/* 6: TXSYNC/SYNCLO */
    151 	0,	/* 7: RXSYNC/SYNCHI */
    152 	0,	/* 8: alias for data port */
    153 	ZSWR9_MASTER_IE,
    154 	0,	/*10: Misc. TX/RX control bits */
    155 	ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
    156 	((PCLK/32)/9600)-2,	/*12: BAUDLO (default=9600) */
    157 	0,			/*13: BAUDHI (default=9600) */
    158 	ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
    159 	ZSWR15_BREAK_IE,
    160 };
    161 
    162 
    163 /* Find PROM mappings (for console support). */
    164 void
    165 zs_init(void)
    166 {
    167 	int i;
    168 
    169 	for (i = 0; i < NZS; i++) {
    170 		zsaddr[i] = (struct zsdevice *)
    171 			obio_find_mapping(zs_physaddr[i], sizeof(struct zschan));
    172 	}
    173 }
    174 
    175 struct zschan *
    176 zs_get_chan_addr(int zs_unit, int channel)
    177 {
    178 	struct zsdevice *addr;
    179 	struct zschan *zc;
    180 
    181 	if (zs_unit >= NZS)
    182 		return NULL;
    183 	addr = zsaddr[zs_unit];
    184 	if (addr == NULL)
    185 		return NULL;
    186 	if (channel == 0) {
    187 		zc = &addr->zs_chan_a;
    188 	} else {
    189 		zc = &addr->zs_chan_b;
    190 	}
    191 	return (zc);
    192 }
    193 
    194 
    195 /****************************************************************
    196  * Autoconfig
    197  ****************************************************************/
    198 
    199 /* Definition of the driver for autoconfig. */
    200 static int	zs_match(struct device *, struct cfdata *, void *);
    201 static void	zs_attach(struct device *, struct device *, void *);
    202 static int	zs_print(void *, const char *);
    203 
    204 CFATTACH_DECL(zsc, sizeof(struct zsc_softc),
    205     zs_match, zs_attach, NULL, NULL);
    206 
    207 extern struct cfdriver zsc_cd;
    208 
    209 static int zshard(void *);
    210 static int zssoft(void *);
    211 static int zs_get_speed(struct zs_chanstate *);
    212 
    213 
    214 /*
    215  * Is the zs chip present?
    216  */
    217 static int
    218 zs_match(struct device *parent, struct cfdata *cf, void *aux)
    219 {
    220 	struct confargs *ca = aux;
    221 	int unit;
    222 	void *va;
    223 
    224 	/*
    225 	 * This driver only supports its wired-in mappings,
    226 	 * because the console support depends on those.
    227 	 */
    228 	if (ca->ca_paddr == zs_physaddr[0]) {
    229 		unit = 0;
    230 	} else if (ca->ca_paddr == zs_physaddr[1]) {
    231 		unit = 1;
    232 	} else {
    233 		return (0);
    234 	}
    235 
    236 	/* Make sure zs_init() found mappings. */
    237 	va = zsaddr[unit];
    238 	if (va == NULL)
    239 		return (0);
    240 
    241 	/* This returns -1 on a fault (bus error). */
    242 	if (peek_byte(va) == -1)
    243 		return (0);
    244 
    245 	/* Default interrupt priority (always splbio==2) */
    246 	if (ca->ca_intpri == -1)
    247 		ca->ca_intpri = ZSHARD_PRI;
    248 
    249 	return (1);
    250 }
    251 
    252 /*
    253  * Attach a found zs.
    254  *
    255  * Match slave number to zs unit number, so that misconfiguration will
    256  * not set up the keyboard as ttya, etc.
    257  */
    258 static void
    259 zs_attach(struct device *parent, struct device *self, void *aux)
    260 {
    261 	struct zsc_softc *zsc = (void *) self;
    262 	struct confargs *ca = aux;
    263 	struct zsc_attach_args zsc_args;
    264 	volatile struct zschan *zc;
    265 	struct zs_chanstate *cs;
    266 	int s, zs_unit, channel;
    267 	static int didintr;
    268 
    269 	zs_unit = zsc->zsc_dev.dv_unit;
    270 
    271 	printf(": (softpri %d)\n", ZSSOFT_PRI);
    272 
    273 	/* Use the mapping setup by the Sun PROM. */
    274 	if (zsaddr[zs_unit] == NULL)
    275 		panic("zs_attach: zs%d not mapped", zs_unit);
    276 
    277 	/*
    278 	 * Initialize software state for each channel.
    279 	 */
    280 	for (channel = 0; channel < 2; channel++) {
    281 		zsc_args.channel = channel;
    282 		zsc_args.hwflags = zs_hwflags[zs_unit][channel];
    283 		cs = &zsc->zsc_cs_store[channel];
    284 		zsc->zsc_cs[channel] = cs;
    285 
    286 		simple_lock_init(&cs->cs_lock);
    287 		cs->cs_channel = channel;
    288 		cs->cs_private = NULL;
    289 		cs->cs_ops = &zsops_null;
    290 		cs->cs_brg_clk = PCLK / 16;
    291 
    292 		zc = zs_get_chan_addr(zs_unit, channel);
    293 		cs->cs_reg_csr  = &zc->zc_csr;
    294 		cs->cs_reg_data = &zc->zc_data;
    295 
    296 		memcpy(cs->cs_creg, zs_init_reg, 16);
    297 		memcpy(cs->cs_preg, zs_init_reg, 16);
    298 
    299 		/* XXX: Get these from the EEPROM instead? */
    300 		/* XXX: See the mvme167 code.  Better. */
    301 		if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
    302 			cs->cs_defspeed = zs_get_speed(cs);
    303 		else
    304 			cs->cs_defspeed = zs_defspeed[zs_unit][channel];
    305 		cs->cs_defcflag = zs_def_cflag;
    306 
    307 		/* Make these correspond to cs_defcflag (-crtscts) */
    308 		cs->cs_rr0_dcd = ZSRR0_DCD;
    309 		cs->cs_rr0_cts = 0;
    310 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
    311 		cs->cs_wr5_rts = 0;
    312 
    313 		/*
    314 		 * Clear the master interrupt enable.
    315 		 * The INTENA is common to both channels,
    316 		 * so just do it on the A channel.
    317 		 */
    318 		if (channel == 0) {
    319 			zs_write_reg(cs, 9, 0);
    320 		}
    321 
    322 		/*
    323 		 * Look for a child driver for this channel.
    324 		 * The child attach will setup the hardware.
    325 		 */
    326 		if (!config_found(self, (void *)&zsc_args, zs_print)) {
    327 			/* No sub-driver.  Just reset it. */
    328 			u_char reset = (channel == 0) ?
    329 				ZSWR9_A_RESET : ZSWR9_B_RESET;
    330 			s = splhigh();
    331 			zs_write_reg(cs,  9, reset);
    332 			splx(s);
    333 		}
    334 	}
    335 
    336 	/*
    337 	 * Now safe to install interrupt handlers.  Note the arguments
    338 	 * to the interrupt handlers aren't used.  Note, we only do this
    339 	 * once since both SCCs interrupt at the same level and vector.
    340 	 */
    341 	if (!didintr) {
    342 		didintr = 1;
    343 		isr_add_autovect(zssoft, NULL, ZSSOFT_PRI);
    344 		isr_add_autovect(zshard, NULL, ca->ca_intpri);
    345 	}
    346 	/* XXX; evcnt_attach() ? */
    347 
    348 	/*
    349 	 * Set the master interrupt enable and interrupt vector.
    350 	 * (common to both channels, do it on A)
    351 	 */
    352 	cs = zsc->zsc_cs[0];
    353 	s = splhigh();
    354 	/* interrupt vector */
    355 	zs_write_reg(cs, 2, zs_init_reg[2]);
    356 	/* master interrupt control (enable) */
    357 	zs_write_reg(cs, 9, zs_init_reg[9]);
    358 	splx(s);
    359 
    360 	/*
    361 	 * XXX: L1A hack - We would like to be able to break into
    362 	 * the debugger during the rest of autoconfiguration, so
    363 	 * lower interrupts just enough to let zs interrupts in.
    364 	 * This is done after both zs devices are attached.
    365 	 */
    366 	if (zs_unit == 1) {
    367 		(void)spl5(); /* splzs - 1 */
    368 	}
    369 }
    370 
    371 static int
    372 zs_print(void *aux, const char *name)
    373 {
    374 	struct zsc_attach_args *args = aux;
    375 
    376 	if (name != NULL)
    377 		aprint_normal("%s: ", name);
    378 
    379 	if (args->channel != -1)
    380 		aprint_normal(" channel %d", args->channel);
    381 
    382 	return UNCONF;
    383 }
    384 
    385 static volatile int zssoftpending;
    386 
    387 /*
    388  * Our ZS chips all share a common, autovectored interrupt,
    389  * so we have to look at all of them on each interrupt.
    390  */
    391 static int
    392 zshard(void *arg)
    393 {
    394 	struct zsc_softc *zsc;
    395 	int unit, rval, softreq;
    396 
    397 	rval = softreq = 0;
    398 	for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
    399 		zsc = zsc_cd.cd_devs[unit];
    400 		if (zsc == NULL)
    401 			continue;
    402 		rval |= zsc_intr_hard(zsc);
    403 		softreq |= zsc->zsc_cs[0]->cs_softreq;
    404 		softreq |= zsc->zsc_cs[1]->cs_softreq;
    405 	}
    406 
    407 	/* We are at splzs here, so no need to lock. */
    408 	if (softreq && (zssoftpending == 0)) {
    409 		zssoftpending = ZSSOFT_PRI;
    410 		isr_soft_request(ZSSOFT_PRI);
    411 	}
    412 	return (rval);
    413 }
    414 
    415 /*
    416  * Similar scheme as for zshard (look at all of them)
    417  */
    418 static int
    419 zssoft(void *arg)
    420 {
    421 	struct zsc_softc *zsc;
    422 	int s, unit;
    423 
    424 	/* This is not the only ISR on this IPL. */
    425 	if (zssoftpending == 0)
    426 		return (0);
    427 
    428 	/*
    429 	 * The soft intr. bit will be set by zshard only if
    430 	 * the variable zssoftpending is zero.  The order of
    431 	 * these next two statements prevents our clearing
    432 	 * the soft intr bit just after zshard has set it.
    433 	 */
    434 	isr_soft_clear(ZSSOFT_PRI);
    435 	zssoftpending = 0;
    436 
    437 	/* Make sure we call the tty layer at spltty. */
    438 	s = spltty();
    439 	for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
    440 		zsc = zsc_cd.cd_devs[unit];
    441 		if (zsc == NULL)
    442 			continue;
    443 		(void) zsc_intr_soft(zsc);
    444 	}
    445 	splx(s);
    446 	return (1);
    447 }
    448 
    449 
    450 /*
    451  * Compute the current baud rate given a ZS channel.
    452  */
    453 static int
    454 zs_get_speed(struct zs_chanstate *cs)
    455 {
    456 	int tconst;
    457 
    458 	tconst = zs_read_reg(cs, 12);
    459 	tconst |= zs_read_reg(cs, 13) << 8;
    460 	return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
    461 }
    462 
    463 /*
    464  * MD functions for setting the baud rate and control modes.
    465  */
    466 int
    467 zs_set_speed(struct zs_chanstate *cs, int bps)
    468 {
    469 	int tconst, real_bps;
    470 
    471 	if (bps == 0)
    472 		return (0);
    473 
    474 #ifdef	DIAGNOSTIC
    475 	if (cs->cs_brg_clk == 0)
    476 		panic("zs_set_speed");
    477 #endif
    478 
    479 	tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
    480 	if (tconst < 0)
    481 		return (EINVAL);
    482 
    483 	/* Convert back to make sure we can do it. */
    484 	real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
    485 
    486 	/* XXX - Allow some tolerance here? */
    487 	if (real_bps != bps)
    488 		return (EINVAL);
    489 
    490 	cs->cs_preg[12] = tconst;
    491 	cs->cs_preg[13] = tconst >> 8;
    492 
    493 	/* Caller will stuff the pending registers. */
    494 	return (0);
    495 }
    496 
    497 int
    498 zs_set_modes(struct zs_chanstate *cs, int cflag	/* bits per second */)
    499 {
    500 	int s;
    501 
    502 	/*
    503 	 * Output hardware flow control on the chip is horrendous:
    504 	 * if carrier detect drops, the receiver is disabled, and if
    505 	 * CTS drops, the transmitter is stoped IN MID CHARACTER!
    506 	 * Therefore, NEVER set the HFC bit, and instead use the
    507 	 * status interrupt to detect CTS changes.
    508 	 */
    509 	s = splzs();
    510 	cs->cs_rr0_pps = 0;
    511 	if ((cflag & (CLOCAL | MDMBUF)) != 0) {
    512 		cs->cs_rr0_dcd = 0;
    513 		if ((cflag & MDMBUF) == 0)
    514 			cs->cs_rr0_pps = ZSRR0_DCD;
    515 	} else
    516 		cs->cs_rr0_dcd = ZSRR0_DCD;
    517 	if ((cflag & CRTSCTS) != 0) {
    518 		cs->cs_wr5_dtr = ZSWR5_DTR;
    519 		cs->cs_wr5_rts = ZSWR5_RTS;
    520 		cs->cs_rr0_cts = ZSRR0_CTS;
    521 	} else if ((cflag & MDMBUF) != 0) {
    522 		cs->cs_wr5_dtr = 0;
    523 		cs->cs_wr5_rts = ZSWR5_DTR;
    524 		cs->cs_rr0_cts = ZSRR0_DCD;
    525 	} else {
    526 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
    527 		cs->cs_wr5_rts = 0;
    528 		cs->cs_rr0_cts = 0;
    529 	}
    530 	splx(s);
    531 
    532 	/* Caller will stuff the pending registers. */
    533 	return (0);
    534 }
    535 
    536 
    537 /*
    538  * Read or write the chip with suitable delays.
    539  */
    540 
    541 u_char
    542 zs_read_reg(struct zs_chanstate *cs, u_char reg)
    543 {
    544 	u_char val;
    545 
    546 	*cs->cs_reg_csr = reg;
    547 	ZS_DELAY();
    548 	val = *cs->cs_reg_csr;
    549 	ZS_DELAY();
    550 	return val;
    551 }
    552 
    553 void
    554 zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val)
    555 {
    556 	*cs->cs_reg_csr = reg;
    557 	ZS_DELAY();
    558 	*cs->cs_reg_csr = val;
    559 	ZS_DELAY();
    560 }
    561 
    562 u_char
    563 zs_read_csr(struct zs_chanstate *cs)
    564 {
    565 	u_char val;
    566 
    567 	val = *cs->cs_reg_csr;
    568 	ZS_DELAY();
    569 	return val;
    570 }
    571 
    572 void
    573 zs_write_csr(struct zs_chanstate *cs, u_char val)
    574 {
    575 	*cs->cs_reg_csr = val;
    576 	ZS_DELAY();
    577 }
    578 
    579 u_char
    580 zs_read_data(struct zs_chanstate *cs)
    581 {
    582 	u_char val;
    583 
    584 	val = *cs->cs_reg_data;
    585 	ZS_DELAY();
    586 	return val;
    587 }
    588 
    589 void
    590 zs_write_data(struct zs_chanstate *cs, u_char val)
    591 {
    592 	*cs->cs_reg_data = val;
    593 	ZS_DELAY();
    594 }
    595 
    596 /****************************************************************
    597  * Console support functions (Sun3 specific!)
    598  * Note: this code is allowed to know about the layout of
    599  * the chip registers, and uses that to keep things simple.
    600  * XXX - I think I like the mvme167 code better. -gwr
    601  ****************************************************************/
    602 
    603 void *zs_conschan;
    604 
    605 /*
    606  * Handle user request to enter kernel debugger.
    607  */
    608 void
    609 zs_abort(struct zs_chanstate *cs)
    610 {
    611 	volatile struct zschan *zc = zs_conschan;
    612 	int rr0;
    613 
    614 	/* Wait for end of break to avoid PROM abort. */
    615 	/* XXX - Limit the wait? */
    616 	do {
    617 		rr0 = zc->zc_csr;
    618 		ZS_DELAY();
    619 	} while (rr0 & ZSRR0_BREAK);
    620 
    621 	/* This is always available on the Sun3. */
    622 	Debugger();
    623 }
    624 
    625 /*
    626  * Polled input char.
    627  */
    628 int
    629 zs_getc(void *arg)
    630 {
    631 	volatile struct zschan *zc = arg;
    632 	int s, c, rr0;
    633 
    634 	s = splhigh();
    635 	/* Wait for a character to arrive. */
    636 	do {
    637 		rr0 = zc->zc_csr;
    638 		ZS_DELAY();
    639 	} while ((rr0 & ZSRR0_RX_READY) == 0);
    640 
    641 	c = zc->zc_data;
    642 	ZS_DELAY();
    643 	splx(s);
    644 
    645 	/*
    646 	 * This is used by the kd driver to read scan codes,
    647 	 * so don't translate '\r' ==> '\n' here...
    648 	 */
    649 	return (c);
    650 }
    651 
    652 /*
    653  * Polled output char.
    654  */
    655 void
    656 zs_putc(void *arg, int c)
    657 {
    658 	volatile struct zschan *zc = arg;
    659 	int s, rr0;
    660 
    661 	s = splhigh();
    662 	/* Wait for transmitter to become ready. */
    663 	do {
    664 		rr0 = zc->zc_csr;
    665 		ZS_DELAY();
    666 	} while ((rr0 & ZSRR0_TX_READY) == 0);
    667 
    668 	zc->zc_data = c;
    669 	ZS_DELAY();
    670 	splx(s);
    671 }
    672 
    673 /*****************************************************************/
    674 
    675 static void zscninit(struct consdev *);
    676 static int  zscngetc(dev_t);
    677 static void zscnputc(dev_t, int);
    678 
    679 /*
    680  * Console table shared by ttya, ttyb
    681  */
    682 struct consdev consdev_tty = {
    683 	nullcnprobe,
    684 	zscninit,
    685 	zscngetc,
    686 	zscnputc,
    687 	nullcnpollc,
    688 	NULL,
    689 };
    690 
    691 static void
    692 zscninit(struct consdev *cn)
    693 {
    694 }
    695 
    696 /*
    697  * Polled console input putchar.
    698  */
    699 static int
    700 zscngetc(dev_t dev)
    701 {
    702 	return (zs_getc(zs_conschan));
    703 }
    704 
    705 /*
    706  * Polled console output putchar.
    707  */
    708 static void
    709 zscnputc(dev_t dev, int c)
    710 {
    711 	zs_putc(zs_conschan, c);
    712 }
    713 
    714 /*****************************************************************/
    715 
    716 static void prom_cninit(struct consdev *);
    717 static int  prom_cngetc(dev_t);
    718 static void prom_cnputc(dev_t, int);
    719 
    720 /*
    721  * The console is set to this one initially,
    722  * which lets us use the PROM until consinit()
    723  * is called to select a real console.
    724  */
    725 struct consdev consdev_prom = {
    726 	nullcnprobe,
    727 	prom_cninit,
    728 	prom_cngetc,
    729 	prom_cnputc,
    730 	nullcnpollc,
    731 };
    732 
    733 /*
    734  * The console table pointer is statically initialized
    735  * to point to the PROM (output only) table, so that
    736  * early calls to printf will work.
    737  */
    738 struct consdev *cn_tab = &consdev_prom;
    739 
    740 void
    741 nullcnprobe(struct consdev *cn)
    742 {
    743 }
    744 
    745 static void
    746 prom_cninit(struct consdev *cn)
    747 {
    748 }
    749 
    750 /*
    751  * PROM console input putchar.
    752  * (dummy - this is output only)
    753  */
    754 static int
    755 prom_cngetc(dev_t dev)
    756 {
    757 	return (0);
    758 }
    759 
    760 /*
    761  * PROM console output putchar.
    762  */
    763 static void
    764 prom_cnputc(dev_t dev, int c)
    765 {
    766 	(*romVectorPtr->putChar)(c & 0x7f);
    767 }
    768 
    769 /*****************************************************************/
    770 
    771 extern struct consdev consdev_kd;
    772 
    773 static struct {
    774 	int zs_unit, channel;
    775 } zstty_conf[NZS*2] = {
    776 	/* XXX: knowledge from the config file here... */
    777 	{ 1, 0 },	/* ttya */
    778 	{ 1, 1 },	/* ttyb */
    779 	{ 0, 0 },	/* ttyc */
    780 	{ 0, 1 },	/* ttyd */
    781 };
    782 
    783 static const char *prom_inSrc_name[] = {
    784 	"keyboard/display",
    785 	"ttya", "ttyb",
    786 	"ttyc", "ttyd" };
    787 
    788 /*
    789  * This function replaces sys/dev/cninit.c
    790  * Determine which device is the console using
    791  * the PROM "input source" and "output sink".
    792  */
    793 void
    794 cninit(void)
    795 {
    796 	struct sunromvec *v;
    797 	struct zschan *zc;
    798 	struct consdev *cn;
    799 	int channel, zs_unit, zstty_unit;
    800 	u_char inSource, outSink;
    801 	extern const struct cdevsw zstty_cdevsw;
    802 
    803 	/* Get the zs driver ready for console duty. */
    804 	zs_init();
    805 
    806 	v = romVectorPtr;
    807 	inSource = *v->inSource;
    808 	outSink  = *v->outSink;
    809 	if (inSource != outSink) {
    810 		mon_printf("cninit: mismatched PROM output selector\n");
    811 	}
    812 
    813 	switch (inSource) {
    814 	default:
    815 		mon_printf("cninit: invalid inSource=%d\n", inSource);
    816 		sunmon_abort();
    817 		inSource = 0;
    818 		/* fall through */
    819 
    820 	case 0:	/* keyboard/display */
    821 #if NKBD > 0
    822 		zs_unit = 0;
    823 		channel = 0;
    824 		cn = &consdev_kd;
    825 		/* Set cn_dev, cn_pri in kd.c */
    826 		break;
    827 #else	/* NKBD */
    828 		mon_printf("cninit: kdb/display not configured\n");
    829 		sunmon_abort();
    830 		inSource = 1;
    831 		/* fall through */
    832 #endif	/* NKBD */
    833 
    834 	case 1:	/* ttya */
    835 	case 2:	/* ttyb */
    836 	case 3:	/* ttyc (rewired keyboard connector) */
    837 	case 4:	/* ttyd (rewired mouse connector)   */
    838 		zstty_unit = inSource - 1;
    839 		zs_unit = zstty_conf[zstty_unit].zs_unit;
    840 		channel = zstty_conf[zstty_unit].channel;
    841 		cn = &consdev_tty;
    842 		cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw),
    843 				     zstty_unit);
    844 		cn->cn_pri = CN_REMOTE;
    845 		break;
    846 
    847 	}
    848 	/* Now that inSource has been validated, print it. */
    849 	mon_printf("console is %s\n", prom_inSrc_name[inSource]);
    850 
    851 	zc = zs_get_chan_addr(zs_unit, channel);
    852 	if (zc == NULL) {
    853 		mon_printf("cninit: zs not mapped.\n");
    854 		return;
    855 	}
    856 	zs_conschan = zc;
    857 	zs_hwflags[zs_unit][channel] = ZS_HWFLAG_CONSOLE;
    858 	cn_tab = cn;
    859 	(*cn->cn_init)(cn);
    860 #ifdef	KGDB
    861 	zs_kgdb_init();
    862 #endif
    863 }
    864