zs.c revision 1.85
1 /* $NetBSD: zs.c,v 1.85 2010/06/26 01:48:57 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Gordon W. Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Zilog Z8530 Dual UART driver (machine-dependent part) 34 * 35 * Runs two serial lines per chip using slave drivers. 36 * Plain tty/async lines use the zs_async slave. 37 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.85 2010/06/26 01:48:57 tsutsui Exp $"); 42 43 #include "opt_kgdb.h" 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/conf.h> 48 #include <sys/device.h> 49 #include <sys/file.h> 50 #include <sys/ioctl.h> 51 #include <sys/kernel.h> 52 #include <sys/proc.h> 53 #include <sys/tty.h> 54 #include <sys/time.h> 55 #include <sys/syslog.h> 56 #include <sys/cpu.h> 57 #include <sys/intr.h> 58 59 #include <uvm/uvm_extern.h> 60 61 #include <machine/autoconf.h> 62 #include <machine/mon.h> 63 #include <machine/z8530var.h> 64 65 #include <sun3/sun3/machdep.h> 66 #ifdef _SUN3X_ 67 #include <sun3/sun3x/obio.h> 68 #else 69 #include <sun3/sun3/obio.h> 70 #endif 71 #include <sun3/dev/zs_cons.h> 72 73 #include <dev/cons.h> 74 #include <dev/ic/z8530reg.h> 75 76 #include "ioconf.h" 77 #include "kbd.h" /* NKBD */ 78 #include "zsc.h" /* NZSC */ 79 #define NZS NZSC 80 81 /* Make life easier for the initialized arrays here. */ 82 #if NZS < 2 83 #undef NZS 84 #define NZS 2 85 #endif 86 87 /* 88 * Some warts needed by z8530tty.c - 89 * The default parity REALLY needs to be the same as the PROM uses, 90 * or you can not see messages done with printf during boot-up... 91 */ 92 int zs_def_cflag = (CREAD | CS8 | HUPCL); 93 94 /* 95 * The Sun3 provides a 4.9152 MHz clock to the ZS chips. 96 */ 97 #define PCLK (9600 * 512) /* PCLK pin input clock rate */ 98 99 /* 100 * Define interrupt levels. 101 */ 102 #define ZSHARD_PRI 6 /* Wired on the CPU board... */ 103 #define ZSSOFT_PRI _IPL_SOFT_LEVEL3 /* Want tty pri (4) but this is OK. */ 104 105 #define ZS_DELAY() delay(2) 106 107 /* The layout of this is hardware-dependent (padding, order). */ 108 struct zschan { 109 volatile uint8_t zc_csr; /* ctrl,status, and indirect access */ 110 uint8_t zc_xxx0; 111 volatile uint8_t zc_data; /* data */ 112 uint8_t zc_xxx1; 113 }; 114 struct zsdevice { 115 /* Yes, they are backwards. */ 116 struct zschan zs_chan_b; 117 struct zschan zs_chan_a; 118 }; 119 120 121 /* Default OBIO addresses. */ 122 static int zs_physaddr[NZS] = { 123 OBIO_ZS_KBD_MS, 124 OBIO_ZS_TTY_AB }; 125 126 /* Saved PROM mappings */ 127 static struct zsdevice *zsaddr[NZS]; 128 129 /* Flags from cninit() */ 130 static int zs_hwflags[NZS][2]; 131 132 /* Default speed for each channel */ 133 static int zs_defspeed[NZS][2] = { 134 { 1200, /* keyboard */ 135 1200 }, /* mouse */ 136 { 9600, /* ttya */ 137 9600 }, /* ttyb */ 138 }; 139 140 static uint8_t zs_init_reg[16] = { 141 0, /* 0: CMD (reset, etc.) */ 142 0, /* 1: No interrupts yet. */ 143 0x18 + ZSHARD_PRI, /* IVECT */ 144 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 145 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 146 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 147 0, /* 6: TXSYNC/SYNCLO */ 148 0, /* 7: RXSYNC/SYNCHI */ 149 0, /* 8: alias for data port */ 150 ZSWR9_MASTER_IE, 151 0, /*10: Misc. TX/RX control bits */ 152 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 153 ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */ 154 0, /*13: BAUDHI (default=9600) */ 155 ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK, 156 ZSWR15_BREAK_IE, 157 }; 158 159 160 /* Find PROM mappings (for console support). */ 161 void 162 zs_init(void) 163 { 164 vaddr_t va; 165 int i; 166 167 for (i = 0; i < NZS; i++) { 168 if (find_prom_map(zs_physaddr[i], PMAP_OBIO, 169 sizeof(struct zschan), &va) == 0) 170 zsaddr[i] = (void *)va; 171 } 172 } 173 174 struct zschan * 175 zs_get_chan_addr(int zs_unit, int channel) 176 { 177 struct zsdevice *addr; 178 struct zschan *zc; 179 180 if (zs_unit >= NZS) 181 return NULL; 182 addr = zsaddr[zs_unit]; 183 if (addr == NULL) 184 return NULL; 185 if (channel == 0) { 186 zc = &addr->zs_chan_a; 187 } else { 188 zc = &addr->zs_chan_b; 189 } 190 return (zc); 191 } 192 193 194 /**************************************************************** 195 * Autoconfig 196 ****************************************************************/ 197 198 /* Definition of the driver for autoconfig. */ 199 static int zs_match(device_t, cfdata_t, void *); 200 static void zs_attach(device_t, device_t, void *); 201 static int zs_print(void *, const char *); 202 203 CFATTACH_DECL_NEW(zsc, sizeof(struct zsc_softc), 204 zs_match, zs_attach, NULL, NULL); 205 206 static int zshard(void *); 207 static int zs_get_speed(struct zs_chanstate *); 208 209 210 /* 211 * Is the zs chip present? 212 */ 213 static int 214 zs_match(device_t parent, cfdata_t cf, void *aux) 215 { 216 struct confargs *ca = aux; 217 int unit; 218 void *va; 219 220 /* 221 * This driver only supports its wired-in mappings, 222 * because the console support depends on those. 223 */ 224 if (ca->ca_paddr == zs_physaddr[0]) { 225 unit = 0; 226 } else if (ca->ca_paddr == zs_physaddr[1]) { 227 unit = 1; 228 } else { 229 return (0); 230 } 231 232 /* Make sure zs_init() found mappings. */ 233 va = zsaddr[unit]; 234 if (va == NULL) 235 return (0); 236 237 /* This returns -1 on a fault (bus error). */ 238 if (peek_byte(va) == -1) 239 return (0); 240 241 /* Default interrupt priority (always splbio==2) */ 242 if (ca->ca_intpri == -1) 243 ca->ca_intpri = ZSHARD_PRI; 244 245 return (1); 246 } 247 248 /* 249 * Attach a found zs. 250 * 251 * Match slave number to zs unit number, so that misconfiguration will 252 * not set up the keyboard as ttya, etc. 253 */ 254 static void 255 zs_attach(device_t parent, device_t self, void *aux) 256 { 257 struct zsc_softc *zsc = device_private(self); 258 struct confargs *ca = aux; 259 struct zsc_attach_args zsc_args; 260 volatile struct zschan *zc; 261 struct zs_chanstate *cs; 262 int s, zs_unit, channel; 263 264 zsc->zsc_dev = self; 265 zs_unit = device_unit(self); 266 267 aprint_normal(": (softpri %d)\n", ZSSOFT_PRI); 268 269 /* Use the mapping setup by the Sun PROM. */ 270 if (zsaddr[zs_unit] == NULL) 271 panic("zs_attach: zs%d not mapped", zs_unit); 272 273 /* 274 * Initialize software state for each channel. 275 */ 276 for (channel = 0; channel < 2; channel++) { 277 zsc_args.channel = channel; 278 zsc_args.hwflags = zs_hwflags[zs_unit][channel]; 279 cs = &zsc->zsc_cs_store[channel]; 280 zsc->zsc_cs[channel] = cs; 281 282 zs_lock_init(cs); 283 cs->cs_channel = channel; 284 cs->cs_private = NULL; 285 cs->cs_ops = &zsops_null; 286 cs->cs_brg_clk = PCLK / 16; 287 288 zc = zs_get_chan_addr(zs_unit, channel); 289 cs->cs_reg_csr = &zc->zc_csr; 290 cs->cs_reg_data = &zc->zc_data; 291 292 memcpy(cs->cs_creg, zs_init_reg, 16); 293 memcpy(cs->cs_preg, zs_init_reg, 16); 294 295 /* XXX: Get these from the EEPROM instead? */ 296 /* XXX: See the mvme167 code. Better. */ 297 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) 298 cs->cs_defspeed = zs_get_speed(cs); 299 else 300 cs->cs_defspeed = zs_defspeed[zs_unit][channel]; 301 cs->cs_defcflag = zs_def_cflag; 302 303 /* Make these correspond to cs_defcflag (-crtscts) */ 304 cs->cs_rr0_dcd = ZSRR0_DCD; 305 cs->cs_rr0_cts = 0; 306 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 307 cs->cs_wr5_rts = 0; 308 309 /* 310 * Clear the master interrupt enable. 311 * The INTENA is common to both channels, 312 * so just do it on the A channel. 313 */ 314 if (channel == 0) { 315 zs_write_reg(cs, 9, 0); 316 } 317 318 /* 319 * Look for a child driver for this channel. 320 * The child attach will setup the hardware. 321 */ 322 if (!config_found(self, (void *)&zsc_args, zs_print)) { 323 /* No sub-driver. Just reset it. */ 324 uint8_t reset = (channel == 0) ? 325 ZSWR9_A_RESET : ZSWR9_B_RESET; 326 s = splhigh(); 327 zs_write_reg(cs, 9, reset); 328 splx(s); 329 } 330 } 331 332 /* 333 * Now safe to install interrupt handlers. 334 */ 335 isr_add_autovect(zshard, zsc, ca->ca_intpri); 336 zsc->zs_si = softint_establish(SOFTINT_SERIAL, 337 (void (*)(void *))zsc_intr_soft, zsc); 338 /* XXX; evcnt_attach() ? */ 339 340 /* 341 * Set the master interrupt enable and interrupt vector. 342 * (common to both channels, do it on A) 343 */ 344 cs = zsc->zsc_cs[0]; 345 s = splhigh(); 346 /* interrupt vector */ 347 zs_write_reg(cs, 2, zs_init_reg[2]); 348 /* master interrupt control (enable) */ 349 zs_write_reg(cs, 9, zs_init_reg[9]); 350 splx(s); 351 352 /* 353 * XXX: L1A hack - We would like to be able to break into 354 * the debugger during the rest of autoconfiguration, so 355 * lower interrupts just enough to let zs interrupts in. 356 * This is done after both zs devices are attached. 357 */ 358 if (zs_unit == 1) { 359 (void)spl5(); /* splzs - 1 */ 360 } 361 } 362 363 static int 364 zs_print(void *aux, const char *name) 365 { 366 struct zsc_attach_args *args = aux; 367 368 if (name != NULL) 369 aprint_normal("%s: ", name); 370 371 if (args->channel != -1) 372 aprint_normal(" channel %d", args->channel); 373 374 return UNCONF; 375 } 376 377 /* 378 * Our ZS chips all share a common, autovectored interrupt, 379 * but we establish zshard handler per each ZS chip 380 * to avoid holding unnecessary locks in interrupt context. 381 */ 382 static int 383 zshard(void *arg) 384 { 385 struct zsc_softc *zsc = arg; 386 int rval; 387 388 rval = zsc_intr_hard(zsc); 389 if (zsc->zsc_cs[0]->cs_softreq || zsc->zsc_cs[1]->cs_softreq) 390 softint_schedule(zsc->zs_si); 391 392 return (rval); 393 } 394 395 /* 396 * Compute the current baud rate given a ZS channel. 397 */ 398 static int 399 zs_get_speed(struct zs_chanstate *cs) 400 { 401 int tconst; 402 403 tconst = zs_read_reg(cs, 12); 404 tconst |= zs_read_reg(cs, 13) << 8; 405 return (TCONST_TO_BPS(cs->cs_brg_clk, tconst)); 406 } 407 408 /* 409 * MD functions for setting the baud rate and control modes. 410 */ 411 int 412 zs_set_speed(struct zs_chanstate *cs, int bps) 413 { 414 int tconst, real_bps; 415 416 if (bps == 0) 417 return (0); 418 419 #ifdef DIAGNOSTIC 420 if (cs->cs_brg_clk == 0) 421 panic("zs_set_speed"); 422 #endif 423 424 tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps); 425 if (tconst < 0) 426 return (EINVAL); 427 428 /* Convert back to make sure we can do it. */ 429 real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst); 430 431 /* XXX - Allow some tolerance here? */ 432 if (real_bps != bps) 433 return (EINVAL); 434 435 cs->cs_preg[12] = tconst; 436 cs->cs_preg[13] = tconst >> 8; 437 438 /* Caller will stuff the pending registers. */ 439 return (0); 440 } 441 442 int 443 zs_set_modes(struct zs_chanstate *cs, int cflag /* bits per second */) 444 { 445 int s; 446 447 /* 448 * Output hardware flow control on the chip is horrendous: 449 * if carrier detect drops, the receiver is disabled, and if 450 * CTS drops, the transmitter is stoped IN MID CHARACTER! 451 * Therefore, NEVER set the HFC bit, and instead use the 452 * status interrupt to detect CTS changes. 453 */ 454 s = splzs(); 455 cs->cs_rr0_pps = 0; 456 if ((cflag & (CLOCAL | MDMBUF)) != 0) { 457 cs->cs_rr0_dcd = 0; 458 if ((cflag & MDMBUF) == 0) 459 cs->cs_rr0_pps = ZSRR0_DCD; 460 } else 461 cs->cs_rr0_dcd = ZSRR0_DCD; 462 if ((cflag & CRTSCTS) != 0) { 463 cs->cs_wr5_dtr = ZSWR5_DTR; 464 cs->cs_wr5_rts = ZSWR5_RTS; 465 cs->cs_rr0_cts = ZSRR0_CTS; 466 } else if ((cflag & MDMBUF) != 0) { 467 cs->cs_wr5_dtr = 0; 468 cs->cs_wr5_rts = ZSWR5_DTR; 469 cs->cs_rr0_cts = ZSRR0_DCD; 470 } else { 471 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 472 cs->cs_wr5_rts = 0; 473 cs->cs_rr0_cts = 0; 474 } 475 splx(s); 476 477 /* Caller will stuff the pending registers. */ 478 return (0); 479 } 480 481 482 /* 483 * Read or write the chip with suitable delays. 484 */ 485 486 uint8_t 487 zs_read_reg(struct zs_chanstate *cs, uint8_t reg) 488 { 489 uint8_t val; 490 491 *cs->cs_reg_csr = reg; 492 ZS_DELAY(); 493 val = *cs->cs_reg_csr; 494 ZS_DELAY(); 495 return val; 496 } 497 498 void 499 zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val) 500 { 501 *cs->cs_reg_csr = reg; 502 ZS_DELAY(); 503 *cs->cs_reg_csr = val; 504 ZS_DELAY(); 505 } 506 507 uint8_t 508 zs_read_csr(struct zs_chanstate *cs) 509 { 510 uint8_t val; 511 512 val = *cs->cs_reg_csr; 513 ZS_DELAY(); 514 return val; 515 } 516 517 void 518 zs_write_csr(struct zs_chanstate *cs, uint8_t val) 519 { 520 *cs->cs_reg_csr = val; 521 ZS_DELAY(); 522 } 523 524 uint8_t 525 zs_read_data(struct zs_chanstate *cs) 526 { 527 uint8_t val; 528 529 val = *cs->cs_reg_data; 530 ZS_DELAY(); 531 return val; 532 } 533 534 void 535 zs_write_data(struct zs_chanstate *cs, uint8_t val) 536 { 537 *cs->cs_reg_data = val; 538 ZS_DELAY(); 539 } 540 541 /**************************************************************** 542 * Console support functions (Sun3 specific!) 543 * Note: this code is allowed to know about the layout of 544 * the chip registers, and uses that to keep things simple. 545 * XXX - I think I like the mvme167 code better. -gwr 546 ****************************************************************/ 547 548 void *zs_conschan; 549 550 /* 551 * Handle user request to enter kernel debugger. 552 */ 553 void 554 zs_abort(struct zs_chanstate *cs) 555 { 556 volatile struct zschan *zc = zs_conschan; 557 int rr0; 558 559 /* Wait for end of break to avoid PROM abort. */ 560 /* XXX - Limit the wait? */ 561 do { 562 rr0 = zc->zc_csr; 563 ZS_DELAY(); 564 } while (rr0 & ZSRR0_BREAK); 565 566 /* This is always available on the Sun3. */ 567 Debugger(); 568 } 569 570 /* 571 * Polled input char. 572 */ 573 int 574 zs_getc(void *arg) 575 { 576 volatile struct zschan *zc = arg; 577 int s, c, rr0; 578 579 s = splhigh(); 580 /* Wait for a character to arrive. */ 581 do { 582 rr0 = zc->zc_csr; 583 ZS_DELAY(); 584 } while ((rr0 & ZSRR0_RX_READY) == 0); 585 586 c = zc->zc_data; 587 ZS_DELAY(); 588 splx(s); 589 590 /* 591 * This is used by the kd driver to read scan codes, 592 * so don't translate '\r' ==> '\n' here... 593 */ 594 return (c); 595 } 596 597 /* 598 * Polled output char. 599 */ 600 void 601 zs_putc(void *arg, int c) 602 { 603 volatile struct zschan *zc = arg; 604 int s, rr0; 605 606 s = splhigh(); 607 /* Wait for transmitter to become ready. */ 608 do { 609 rr0 = zc->zc_csr; 610 ZS_DELAY(); 611 } while ((rr0 & ZSRR0_TX_READY) == 0); 612 613 zc->zc_data = c; 614 ZS_DELAY(); 615 splx(s); 616 } 617 618 /*****************************************************************/ 619 620 static void zscninit(struct consdev *); 621 static int zscngetc(dev_t); 622 static void zscnputc(dev_t, int); 623 624 /* 625 * Console table shared by ttya, ttyb 626 */ 627 struct consdev consdev_tty = { 628 nullcnprobe, 629 zscninit, 630 zscngetc, 631 zscnputc, 632 nullcnpollc, 633 NULL, 634 }; 635 636 static void 637 zscninit(struct consdev *cn) 638 { 639 } 640 641 /* 642 * Polled console input putchar. 643 */ 644 static int 645 zscngetc(dev_t dev) 646 { 647 return (zs_getc(zs_conschan)); 648 } 649 650 /* 651 * Polled console output putchar. 652 */ 653 static void 654 zscnputc(dev_t dev, int c) 655 { 656 zs_putc(zs_conschan, c); 657 } 658 659 /*****************************************************************/ 660 661 static void prom_cninit(struct consdev *); 662 static int prom_cngetc(dev_t); 663 static void prom_cnputc(dev_t, int); 664 665 /* 666 * The console is set to this one initially, 667 * which lets us use the PROM until consinit() 668 * is called to select a real console. 669 */ 670 struct consdev consdev_prom = { 671 nullcnprobe, 672 prom_cninit, 673 prom_cngetc, 674 prom_cnputc, 675 nullcnpollc, 676 }; 677 678 /* 679 * The console table pointer is statically initialized 680 * to point to the PROM (output only) table, so that 681 * early calls to printf will work. 682 */ 683 struct consdev *cn_tab = &consdev_prom; 684 685 void 686 nullcnprobe(struct consdev *cn) 687 { 688 } 689 690 static void 691 prom_cninit(struct consdev *cn) 692 { 693 } 694 695 /* 696 * PROM console input putchar. 697 * (dummy - this is output only) 698 */ 699 static int 700 prom_cngetc(dev_t dev) 701 { 702 return (0); 703 } 704 705 /* 706 * PROM console output putchar. 707 */ 708 static void 709 prom_cnputc(dev_t dev, int c) 710 { 711 (*romVectorPtr->putChar)(c & 0x7f); 712 } 713 714 /*****************************************************************/ 715 716 extern struct consdev consdev_kd; 717 718 static struct { 719 int zs_unit, channel; 720 } zstty_conf[NZS*2] = { 721 /* XXX: knowledge from the config file here... */ 722 { 1, 0 }, /* ttya */ 723 { 1, 1 }, /* ttyb */ 724 { 0, 0 }, /* ttyc */ 725 { 0, 1 }, /* ttyd */ 726 }; 727 728 static const char *prom_inSrc_name[] = { 729 "keyboard/display", 730 "ttya", "ttyb", 731 "ttyc", "ttyd" }; 732 733 /* 734 * This function replaces sys/dev/cninit.c 735 * Determine which device is the console using 736 * the PROM "input source" and "output sink". 737 */ 738 void 739 cninit(void) 740 { 741 struct sunromvec *v; 742 struct zschan *zc; 743 struct consdev *cn; 744 int channel, zs_unit, zstty_unit; 745 uint8_t inSource, outSink; 746 extern const struct cdevsw zstty_cdevsw; 747 748 /* Get the zs driver ready for console duty. */ 749 zs_init(); 750 751 v = romVectorPtr; 752 inSource = *v->inSource; 753 outSink = *v->outSink; 754 if (inSource != outSink) { 755 mon_printf("cninit: mismatched PROM output selector\n"); 756 } 757 758 switch (inSource) { 759 default: 760 mon_printf("cninit: invalid inSource=%d\n", inSource); 761 sunmon_abort(); 762 inSource = 0; 763 /* fall through */ 764 765 case 0: /* keyboard/display */ 766 #if NKBD > 0 767 zs_unit = 0; 768 channel = 0; 769 cn = &consdev_kd; 770 /* Set cn_dev, cn_pri in kd.c */ 771 break; 772 #else /* NKBD */ 773 mon_printf("cninit: kdb/display not configured\n"); 774 sunmon_abort(); 775 inSource = 1; 776 /* fall through */ 777 #endif /* NKBD */ 778 779 case 1: /* ttya */ 780 case 2: /* ttyb */ 781 case 3: /* ttyc (rewired keyboard connector) */ 782 case 4: /* ttyd (rewired mouse connector) */ 783 zstty_unit = inSource - 1; 784 zs_unit = zstty_conf[zstty_unit].zs_unit; 785 channel = zstty_conf[zstty_unit].channel; 786 cn = &consdev_tty; 787 cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw), 788 zstty_unit); 789 cn->cn_pri = CN_REMOTE; 790 break; 791 792 } 793 /* Now that inSource has been validated, print it. */ 794 mon_printf("console is %s\n", prom_inSrc_name[inSource]); 795 796 zc = zs_get_chan_addr(zs_unit, channel); 797 if (zc == NULL) { 798 mon_printf("cninit: zs not mapped.\n"); 799 return; 800 } 801 zs_conschan = zc; 802 zs_hwflags[zs_unit][channel] = ZS_HWFLAG_CONSOLE; 803 cn_tab = cn; 804 (*cn->cn_init)(cn); 805 #ifdef KGDB 806 zs_kgdb_init(); 807 #endif 808 } 809
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