zs_kgdb.c revision 1.1 1 1.1 gwr
2 1.1 gwr /*
3 1.1 gwr * Copyright (c) 1994 Gordon W. Ross
4 1.1 gwr * Copyright (c) 1992, 1993
5 1.1 gwr * The Regents of the University of California. All rights reserved.
6 1.1 gwr *
7 1.1 gwr * This software was developed by the Computer Systems Engineering group
8 1.1 gwr * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9 1.1 gwr * contributed to Berkeley.
10 1.1 gwr *
11 1.1 gwr * All advertising materials mentioning features or use of this software
12 1.1 gwr * must display the following acknowledgement:
13 1.1 gwr * This product includes software developed by the University of
14 1.1 gwr * California, Lawrence Berkeley Laboratory.
15 1.1 gwr *
16 1.1 gwr * Redistribution and use in source and binary forms, with or without
17 1.1 gwr * modification, are permitted provided that the following conditions
18 1.1 gwr * are met:
19 1.1 gwr * 1. Redistributions of source code must retain the above copyright
20 1.1 gwr * notice, this list of conditions and the following disclaimer.
21 1.1 gwr * 2. Redistributions in binary form must reproduce the above copyright
22 1.1 gwr * notice, this list of conditions and the following disclaimer in the
23 1.1 gwr * documentation and/or other materials provided with the distribution.
24 1.1 gwr * 3. All advertising materials mentioning features or use of this software
25 1.1 gwr * must display the following acknowledgement:
26 1.1 gwr * This product includes software developed by the University of
27 1.1 gwr * California, Berkeley and its contributors.
28 1.1 gwr * 4. Neither the name of the University nor the names of its contributors
29 1.1 gwr * may be used to endorse or promote products derived from this software
30 1.1 gwr * without specific prior written permission.
31 1.1 gwr *
32 1.1 gwr * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33 1.1 gwr * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34 1.1 gwr * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35 1.1 gwr * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36 1.1 gwr * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 1.1 gwr * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38 1.1 gwr * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39 1.1 gwr * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40 1.1 gwr * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41 1.1 gwr * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42 1.1 gwr * SUCH DAMAGE.
43 1.1 gwr *
44 1.1 gwr * @(#)zs.c 8.1 (Berkeley) 7/19/93
45 1.1 gwr */
46 1.1 gwr
47 1.1 gwr /*
48 1.1 gwr * Hooks for kgdb when attached vi the z8530 driver
49 1.1 gwr * XXX - not tested yet...
50 1.1 gwr */
51 1.1 gwr
52 1.1 gwr #include <sys/param.h>
53 1.1 gwr #include <sys/systm.h>
54 1.1 gwr #include <sys/proc.h>
55 1.1 gwr #include <sys/device.h>
56 1.1 gwr #include <sys/conf.h>
57 1.1 gwr #include <sys/ioctl.h>
58 1.1 gwr #include <sys/kernel.h>
59 1.1 gwr #include <sys/syslog.h>
60 1.1 gwr
61 1.1 gwr #include <dev/ic/z8530reg.h>
62 1.1 gwr #include <machine/z8530var.h>
63 1.1 gwr
64 1.1 gwr #include <machine/remote-sl.h>
65 1.1 gwr
66 1.1 gwr /* The Sun3 provides a 4.9152 MHz clock to the ZS chips. */
67 1.1 gwr #define PCLK (9600 * 512) /* PCLK pin input clock rate */
68 1.1 gwr
69 1.1 gwr extern int kgdb_dev;
70 1.1 gwr extern int kgdb_rate;
71 1.1 gwr
72 1.1 gwr struct zschan * zs_get_chan_addr __P((int zsc_unit, int channel));
73 1.1 gwr
74 1.1 gwr extern int zs_getc __P((void *arg));
75 1.1 gwr extern void zs_putc __P((void *arg, int c));
76 1.1 gwr
77 1.1 gwr struct zsops zsops_kgdb;
78 1.1 gwr
79 1.1 gwr static u_char zs_kgdb_regs[16] = {
80 1.1 gwr 0, /* 0: CMD (reset, etc.) */
81 1.1 gwr ZSWR1_RIE, /* NOT: (ZSWR1_TIE | ZSWR1_SIE) */
82 1.1 gwr 0x18 + ZSHARD_PRI, /* IVECT */
83 1.1 gwr ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
84 1.1 gwr ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
85 1.1 gwr ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
86 1.1 gwr 0, /* 6: TXSYNC/SYNCLO */
87 1.1 gwr 0, /* 7: RXSYNC/SYNCHI */
88 1.1 gwr 0, /* 8: alias for data port */
89 1.1 gwr ZSWR9_MASTER_IE,
90 1.1 gwr 0, /*10: Misc. TX/RX control bits */
91 1.1 gwr ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
92 1.1 gwr 14, /*12: BAUDLO (default=9600) */
93 1.1 gwr 0, /*13: BAUDHI (default=9600) */
94 1.1 gwr ZSWR14_BAUD_FROM_PCLK | ZSWR14_BAUD_ENA,
95 1.1 gwr ZSWR15_BREAK_IE | ZSWR15_DCD_IE,
96 1.1 gwr };
97 1.1 gwr
98 1.1 gwr static void
99 1.1 gwr zs_setparam(cs, iena, rate)
100 1.1 gwr struct zs_chanstate *cs;
101 1.1 gwr int iena;
102 1.1 gwr int rate;
103 1.1 gwr {
104 1.1 gwr int s, tconst;
105 1.1 gwr
106 1.1 gwr bcopy(zs_kgdb_regs, cs->cs_preg, 16);
107 1.1 gwr
108 1.1 gwr if (iena == 0) {
109 1.1 gwr cs->cs_preg[1] = 0;
110 1.1 gwr }
111 1.1 gwr
112 1.1 gwr /* Initialize the speed, etc. */
113 1.1 gwr tconst = BPS_TO_TCONST(cs->cs_pclk_div16, rate);
114 1.1 gwr cs->cs_preg[5] |= ZSWR5_DTR | ZSWR5_RTS;
115 1.1 gwr cs->cs_preg[12] = tconst;
116 1.1 gwr cs->cs_preg[13] = tconst >> 8;
117 1.1 gwr
118 1.1 gwr s = splhigh();
119 1.1 gwr zs_loadchannelregs(cs);
120 1.1 gwr splx(s);
121 1.1 gwr
122 1.1 gwr
123 1.1 gwr /*
124 1.1 gwr * Set up for kgdb; called at boot time before configuration.
125 1.1 gwr * KGDB interrupts will be enabled later when zs0 is configured.
126 1.1 gwr */
127 1.1 gwr void
128 1.1 gwr zs_kgdb_init()
129 1.1 gwr {
130 1.1 gwr struct zs_chanstate cs;
131 1.1 gwr volatile struct zschan *zc;
132 1.1 gwr int channel, zsc_unit;
133 1.1 gwr
134 1.1 gwr if (major(kgdb_dev) != ZSMAJOR)
135 1.1 gwr return;
136 1.1 gwr
137 1.1 gwr zsc_unit = 1; /* XXX */
138 1.1 gwr channel = minor(kgdb_dev) & 1;
139 1.1 gwr printf("zs_kgdb_init: attaching zstty%d at %d baud\n",
140 1.1 gwr channel, kgdb_rate);
141 1.1 gwr
142 1.1 gwr /* Setup temporary chanstate. */
143 1.1 gwr bzero((caddr_t)&cs, sizeof(cs));
144 1.1 gwr zc = zs_get_chan_addr(zsc_unit, channel);
145 1.1 gwr cs.cs_reg_csr = &zc->zc_csr;
146 1.1 gwr cs.cs_reg_data = &zc->zc_data;
147 1.1 gwr cs.cs_channel = channel;
148 1.1 gwr cs.cs_pclk_div16 = PCLK / 16;
149 1.1 gwr
150 1.1 gwr /* Now set parameters. (interrupts disabled) */
151 1.1 gwr zs_setparam(&cs, 0, kgdb_rate);
152 1.1 gwr
153 1.1 gwr /* Store the getc/putc functions and arg. */
154 1.1 gwr kgdb_attach(zs_getc, zs_putc, (void *)zc);
155 1.1 gwr }
156 1.1 gwr
157 1.1 gwr /*
158 1.1 gwr * This is a "hook" called by zstty_attach to allow the tty
159 1.1 gwr * to be "taken over" for exclusive use by kgdb.
160 1.1 gwr * Return non-zero if this is the kgdb port.
161 1.1 gwr *
162 1.1 gwr * Set the speed to kgdb_rate, CS8, etc.
163 1.1 gwr */
164 1.1 gwr int
165 1.1 gwr zs_check_kgdb(cs, dev)
166 1.1 gwr struct zs_chanstate *cs;
167 1.1 gwr int dev;
168 1.1 gwr {
169 1.1 gwr int tconst;
170 1.1 gwr
171 1.1 gwr if (dev != kgdb_dev)
172 1.1 gwr return (0);
173 1.1 gwr
174 1.1 gwr /*
175 1.1 gwr * Yes, this is the kgdb port. Finish the autoconfig
176 1.1 gwr * message and set up the port for our exclusive use.
177 1.1 gwr */
178 1.1 gwr printf(" (kgdb,%d)\n", kgdb_rate);
179 1.1 gwr
180 1.1 gwr cs->cs_private = NULL;
181 1.1 gwr cs->cs_ops = &zsops_kgdb;
182 1.1 gwr
183 1.1 gwr /* Now set parameters. (interrupts enabled) */
184 1.1 gwr zs_setparam(&cs, 1, kgdb_rate);
185 1.1 gwr
186 1.1 gwr return (1);
187 1.1 gwr }
188 1.1 gwr
189 1.1 gwr /*
190 1.1 gwr * KGDB framing character received: enter kernel debugger. This probably
191 1.1 gwr * should time out after a few seconds to avoid hanging on spurious input.
192 1.1 gwr */
193 1.1 gwr zskgdb()
194 1.1 gwr {
195 1.1 gwr unit = minor(kgdb_dev);
196 1.1 gwr
197 1.1 gwr printf("zstty%d: kgdb interrupt\n", unit);
198 1.1 gwr /* This will trap into the debugger. */
199 1.1 gwr kgdb_connect(1);
200 1.1 gwr }
201 1.1 gwr
202 1.1 gwr
203 1.1 gwr /****************************************************************
204 1.1 gwr * Interface to the lower layer (zscc)
205 1.1 gwr ****************************************************************/
206 1.1 gwr
207 1.1 gwr int kgdb_input_lost;
208 1.1 gwr
209 1.1 gwr static int
210 1.1 gwr zs_kgdb_rxint(cs)
211 1.1 gwr register struct zs_chanstate *cs;
212 1.1 gwr {
213 1.1 gwr register u_char c, rr1;
214 1.1 gwr
215 1.1 gwr /* Read the input data ASAP. */
216 1.1 gwr c = *(cs->cs_reg_data);
217 1.1 gwr ZS_DELAY();
218 1.1 gwr
219 1.1 gwr /* Save the status register too. */
220 1.1 gwr rr1 = ZS_READ(cs, 1);
221 1.1 gwr
222 1.1 gwr if (rr1 & (ZSRR1_FE | ZSRR1_DO | ZSRR1_PE)) {
223 1.1 gwr /* Clear the receive error. */
224 1.1 gwr *(cs->cs_reg_csr) = ZSWR0_RESET_ERRORS;
225 1.1 gwr ZS_DELAY();
226 1.1 gwr }
227 1.1 gwr
228 1.1 gwr if (c == FRAME_START) {
229 1.1 gwr zskgdb();
230 1.1 gwr } else {
231 1.1 gwr kgdb_input_lost++;
232 1.1 gwr }
233 1.1 gwr
234 1.1 gwr return(0);
235 1.1 gwr }
236 1.1 gwr
237 1.1 gwr static int
238 1.1 gwr zs_kgdb_txint(cs)
239 1.1 gwr register struct zs_chanstate *cs;
240 1.1 gwr {
241 1.1 gwr register int count, rval;
242 1.1 gwr
243 1.1 gwr *(cs->cs_reg_csr) = ZSWR0_RESET_TXINT;
244 1.1 gwr ZS_DELAY();
245 1.1 gwr
246 1.1 gwr return (0);
247 1.1 gwr }
248 1.1 gwr
249 1.1 gwr static int
250 1.1 gwr zs_kgdb_stint(cs)
251 1.1 gwr register struct zs_chanstate *cs;
252 1.1 gwr {
253 1.1 gwr register int rr0;
254 1.1 gwr
255 1.1 gwr rr0 = *(cs->cs_reg_csr);
256 1.1 gwr ZS_DELAY();
257 1.1 gwr
258 1.1 gwr *(cs->cs_reg_csr) = ZSWR0_RESET_STATUS;
259 1.1 gwr ZS_DELAY();
260 1.1 gwr
261 1.1 gwr return (0);
262 1.1 gwr }
263 1.1 gwr
264 1.1 gwr static int
265 1.1 gwr zs_kgdb_softint(cs)
266 1.1 gwr struct zs_chanstate *cs;
267 1.1 gwr {
268 1.1 gwr printf("zs_kgdb_softint?\n");
269 1.1 gwr return (0);
270 1.1 gwr }
271 1.1 gwr
272 1.1 gwr struct zsops zsops_kgdb = {
273 1.1 gwr zs_kgdb_rxint, /* receive char available */
274 1.1 gwr zs_kgdb_stint, /* external/status */
275 1.1 gwr zs_kgdb_txint, /* xmit buffer empty */
276 1.1 gwr zs_kgdb_softint, /* process software interrupt */
277 1.1 gwr };
278