cpu.h revision 1.7 1 1.1 glass /* Copyright (c) 1993 Adam Glass
2 1.1 glass * Copyright (c) 1988 University of Utah.
3 1.1 glass * Copyright (c) 1982, 1990 The Regents of the University of California.
4 1.1 glass * All rights reserved.
5 1.1 glass *
6 1.1 glass * This code is derived from software contributed to Berkeley by
7 1.1 glass * the Systems Programming Group of the University of Utah Computer
8 1.1 glass * Science Department.
9 1.1 glass *
10 1.1 glass * Redistribution and use in source and binary forms, with or without
11 1.1 glass * modification, are permitted provided that the following conditions
12 1.1 glass * are met:
13 1.1 glass * 1. Redistributions of source code must retain the above copyright
14 1.1 glass * notice, this list of conditions and the following disclaimer.
15 1.1 glass * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 glass * notice, this list of conditions and the following disclaimer in the
17 1.1 glass * documentation and/or other materials provided with the distribution.
18 1.1 glass * 3. All advertising materials mentioning features or use of this software
19 1.1 glass * must display the following acknowledgement:
20 1.1 glass * This product includes software developed by the University of
21 1.1 glass * California, Berkeley and its contributors.
22 1.1 glass * 4. Neither the name of the University nor the names of its contributors
23 1.1 glass * may be used to endorse or promote products derived from this software
24 1.1 glass * without specific prior written permission.
25 1.1 glass *
26 1.1 glass * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 1.1 glass * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 1.1 glass * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 1.1 glass * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 1.1 glass * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 1.1 glass * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 1.1 glass * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 1.1 glass * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 1.1 glass * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 1.1 glass * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 1.1 glass * SUCH DAMAGE.
37 1.1 glass *
38 1.1 glass * from: Utah $Hdr: cpu.h 1.16 91/03/25$
39 1.1 glass *
40 1.1 glass * from: @(#)cpu.h 7.7 (Berkeley) 6/27/91
41 1.1 glass * cpu.h,v 1.2 1993/05/22 07:58:17 cgd Exp
42 1.1 glass */
43 1.1 glass
44 1.6 glass #ifdef KERNEL
45 1.6 glass
46 1.1 glass /*
47 1.1 glass * Exported definitions unique to sun3/68k cpu support.
48 1.1 glass */
49 1.1 glass
50 1.1 glass /*
51 1.1 glass * definitions of cpu-dependent requirements
52 1.1 glass * referenced in generic code
53 1.1 glass */
54 1.1 glass #define COPY_SIGCODE /* copy sigcode above user stack in exec */
55 1.1 glass
56 1.1 glass #define cpu_exec(p) /* nothing */
57 1.1 glass #define cpu_wait(p) /* nothing */
58 1.1 glass
59 1.1 glass /*
60 1.1 glass * Arguments to hardclock, softclock and gatherstats
61 1.1 glass * encapsulate the previous machine state in an opaque
62 1.1 glass * clockframe; for hp300, use just what the hardware
63 1.1 glass * leaves on the stack.
64 1.1 glass */
65 1.6 glass struct clockframe {
66 1.1 glass int pc;
67 1.1 glass int ps;
68 1.6 glass };
69 1.1 glass
70 1.1 glass #define CLKF_USERMODE(framep) (((framep)->ps & PSL_S) == 0)
71 1.1 glass #define CLKF_BASEPRI(framep) (((framep)->ps & PSL_IPL7) == 0)
72 1.1 glass #define CLKF_PC(framep) ((framep)->pc)
73 1.6 glass #define CLKF_INTR(framep) (0) /* XXX laziness */
74 1.1 glass
75 1.7 glass typedef struct clockframe clockframe;
76 1.1 glass /*
77 1.1 glass * Preempt the current process if in interrupt from user mode,
78 1.1 glass * or after the current trap/syscall if in system mode.
79 1.1 glass */
80 1.1 glass #define need_resched() { want_resched++; aston(); }
81 1.1 glass
82 1.1 glass /*
83 1.1 glass * Give a profiling tick to the current process from the softclock
84 1.1 glass * interrupt. On hp300, request an ast to send us through trap(),
85 1.1 glass * marking the proc as needing a profiling tick.
86 1.1 glass */
87 1.7 glass #define profile_tick(p, framep) { (p)->p_flag |= SOWEUPC; aston();}
88 1.1 glass
89 1.1 glass /*
90 1.1 glass * Notify the current process (p) that it has a signal pending,
91 1.1 glass * process as soon as possible.
92 1.1 glass */
93 1.1 glass #define signotify(p) aston()
94 1.1 glass
95 1.1 glass #define aston() (astpending++)
96 1.1 glass
97 1.6 glass int astpending; /* need to trap before returning to user mode */
98 1.6 glass int want_resched; /* resched() was called */
99 1.6 glass
100 1.6 glass #define fuswintr(x) (-1)
101 1.6 glass #define suswintr(x,y) (-1)
102 1.1 glass
103 1.5 glass #include <machine/mtpr.h>
104 1.1 glass
105 1.1 glass /* values for machineid */
106 1.1 glass
107 1.1 glass #define CPU_ARCH_MASK 0xf0
108 1.1 glass #define SUN3_ARCH 0x10
109 1.1 glass #define SUN3_IMPL_MASK 0x0f
110 1.1 glass #define SUN3_MACH_160 0x01
111 1.1 glass #define SUN3_MACH_50 0x02
112 1.1 glass #define SUN3_MACH_260 0x03
113 1.1 glass #define SUN3_MACH_110 0x04
114 1.1 glass #define SUN3_MACH_60 0x07
115 1.1 glass #define SUN3_MACH_E 0x08
116 1.1 glass
117 1.1 glass extern int machineid, mmutype, ectype;
118 1.1 glass extern char *intiobase, *intiolimit;
119 1.1 glass
120 1.1 glass /* 680X0 function codes */
121 1.1 glass #define FC_USERD 1 /* user data space */
122 1.1 glass #define FC_USERP 2 /* user program space */
123 1.1 glass #define FC_CONTROL 3 /* HPMMU: clear TLB entries */
124 1.1 glass #define FC_SUPERD 5 /* supervisor data space */
125 1.1 glass #define FC_SUPERP 6 /* supervisor program space */
126 1.1 glass #define FC_CPU 7 /* CPU space */
127 1.1 glass
128 1.1 glass /* fields in the 68020 cache control register */
129 1.1 glass #define IC_ENABLE 0x0001 /* enable instruction cache */
130 1.1 glass #define IC_FREEZE 0x0002 /* freeze instruction cache */
131 1.1 glass #define IC_CE 0x0004 /* clear instruction cache entry */
132 1.1 glass #define IC_CLR 0x0008 /* clear entire instruction cache */
133 1.7 glass
134 1.7 glass #define IC_CLEAR (IC_CLR|IC_ENABLE)
135 1.2 glass
136 1.6 glass #endif
137