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intr.h revision 1.1 
      1 /*	$NetBSD: intr.h,v 1.1 2001/05/28 21:06:19 chs Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Gordon W. Ross.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *        This product includes software developed by the NetBSD
     21  *        Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 #ifndef _SUN3_INTR_H_
     40 #define _SUN3_INTR_H_ 1
     41 
     42 #include <machine/psl.h>
     43 
     44 /*
     45  * These are identical to the values used by hp300, but are not meaningful
     46  * to sun3 code at this time.
     47  */
     48 #define	IPL_NONE	0	/* disable only this interrupt */
     49 #define	IPL_BIO		1	/* disable block I/O interrupts */
     50 #define	IPL_NET		2	/* disable network interrupts */
     51 #define	IPL_TTY		3	/* disable terminal interrupts */
     52 #define	IPL_TTYNOBUF	4	/* IPL_TTY + higher ISR priority */
     53 #define	IPL_SERIAL	4	/* disable serial interrupts */
     54 #define	IPL_CLOCK	5	/* disable clock interrupts */
     55 #define	IPL_HIGH	6	/* disable all interrupts */
     56 
     57 #if defined(_KERNEL) && !defined(_LOCORE)
     58 
     59 /*
     60  * Define inline functions for PSL manipulation.
     61  * These are as close to macros as one can get.
     62  * When not optimizing gcc will call the locore.s
     63  * functions by the same names, so breakpoints on
     64  * these functions will work normally, etc.
     65  * (See the GCC extensions info document.)
     66  */
     67 
     68 static __inline int _getsr __P((void));
     69 
     70 /* Get current sr value. */
     71 static __inline int
     72 _getsr(void)
     73 {
     74 	int rv;
     75 
     76 	__asm __volatile ("clrl %0; movew %%sr,%0" : "&=d" (rv));
     77 	return (rv);
     78 }
     79 
     80 /*
     81  * The rest of this is sun3 specific, because other ports may
     82  * need to do special things in spl0() (i.e. simulate SIR).
     83  * Suns have a REAL interrupt register, so spl0() and splx(s)
     84  * have no need to check for any simulated interrupts, etc.
     85  */
     86 
     87 #define spl0()  _spl0()		/* we have real software interrupts */
     88 #define splx(x)	_spl(x)
     89 
     90 /* IPL used by soft interrupts: netintr(), softclock() */
     91 #define	spllowersoftclock() spl1()
     92 #define splsoftclock()  splraise1()
     93 #define splsoftnet()    splraise1()
     94 
     95 /* Highest block device (strategy) IPL. */
     96 #define splbio()        splraise2()
     97 
     98 /* Highest network interface IPL. */
     99 #define splnet()        splraise3()
    100 
    101 /* Highest tty device IPL. */
    102 #define spltty()        splraise4()
    103 
    104 /* Highest network, tty, or disk IPL. */
    105 #define splvm()         _splraise(PSL_S|PSL_IPL4)
    106 
    107 /* Intersil clock hardware interrupts (hard-wired at 5) */
    108 #define splclock()      splraise5()
    109 #define splstatclock()  splclock()
    110 
    111 /* Block out all interrupts (except NMI of course). */
    112 #define splhigh()       spl7()
    113 #define splsched()      spl7()
    114 #define spllock()	spl7()
    115 
    116 #endif	/* KERNEL && !_LOCORE */
    117 #endif	/* _SUN3_INTR_H_ */
    118