db_memrw.c revision 1.13 1 1.13 gwr /* $NetBSD: db_memrw.c,v 1.13 1996/11/20 18:57:28 gwr Exp $ */
2 1.1 gwr
3 1.13 gwr /*-
4 1.13 gwr * Copyright (c) 1996 The NetBSD Foundation, Inc.
5 1.1 gwr * All rights reserved.
6 1.1 gwr *
7 1.13 gwr * This code is derived from software contributed to The NetBSD Foundation
8 1.13 gwr * by Gordon W. Ross.
9 1.13 gwr *
10 1.1 gwr * Redistribution and use in source and binary forms, with or without
11 1.1 gwr * modification, are permitted provided that the following conditions
12 1.1 gwr * are met:
13 1.1 gwr * 1. Redistributions of source code must retain the above copyright
14 1.1 gwr * notice, this list of conditions and the following disclaimer.
15 1.1 gwr * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 gwr * notice, this list of conditions and the following disclaimer in the
17 1.1 gwr * documentation and/or other materials provided with the distribution.
18 1.13 gwr * 3. All advertising materials mentioning features or use of this software
19 1.13 gwr * must display the following acknowledgement:
20 1.13 gwr * This product includes software developed by the NetBSD
21 1.13 gwr * Foundation, Inc. and its contributors.
22 1.13 gwr * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.13 gwr * contributors may be used to endorse or promote products derived
24 1.13 gwr * from this software without specific prior written permission.
25 1.1 gwr *
26 1.13 gwr * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.13 gwr * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.13 gwr * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.13 gwr * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE
30 1.13 gwr * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.13 gwr * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.13 gwr * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.13 gwr * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.13 gwr * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.13 gwr * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.13 gwr * POSSIBILITY OF SUCH DAMAGE.
37 1.1 gwr */
38 1.1 gwr
39 1.1 gwr /*
40 1.9 gwr * Interface to the debugger for virtual memory read/write.
41 1.12 gwr * This file is shared by DDB and KGDB, and must work even
42 1.12 gwr * when only KGDB is included (thus no db_printf calls).
43 1.9 gwr *
44 1.9 gwr * To write in the text segment, we have to first make
45 1.9 gwr * the page writable, do the write, then restore the PTE.
46 1.9 gwr * For writes outside the text segment, and all reads,
47 1.9 gwr * just do the access -- if it causes a fault, the debugger
48 1.9 gwr * will recover with a longjmp to an appropriate place.
49 1.9 gwr *
50 1.9 gwr * ALERT! If you want to access device registers with a
51 1.9 gwr * specific size, then the read/write functions have to
52 1.9 gwr * make sure to do the correct sized pointer access.
53 1.1 gwr */
54 1.1 gwr
55 1.1 gwr #include <sys/param.h>
56 1.1 gwr #include <sys/proc.h>
57 1.1 gwr
58 1.1 gwr #include <vm/vm.h>
59 1.1 gwr
60 1.10 gwr #include <machine/pte.h>
61 1.1 gwr #include <machine/db_machdep.h>
62 1.10 gwr
63 1.10 gwr #include <ddb/db_access.h>
64 1.1 gwr
65 1.9 gwr #include "cache.h"
66 1.7 gwr
67 1.7 gwr /*
68 1.3 gwr * Read bytes from kernel address space for debugger.
69 1.5 gwr * This used to check for valid PTEs, but now that
70 1.5 gwr * traps in DDB work correctly, "Just Do It!"
71 1.3 gwr */
72 1.3 gwr void
73 1.3 gwr db_read_bytes(addr, size, data)
74 1.3 gwr vm_offset_t addr;
75 1.10 gwr register size_t size;
76 1.3 gwr register char *data;
77 1.3 gwr {
78 1.9 gwr register char *src = (char*)addr;
79 1.9 gwr
80 1.9 gwr if (size == 4) {
81 1.9 gwr *((int*)data) = *((int*)src);
82 1.9 gwr return;
83 1.9 gwr }
84 1.9 gwr
85 1.9 gwr if (size == 2) {
86 1.9 gwr *((short*)data) = *((short*)src);
87 1.9 gwr return;
88 1.9 gwr }
89 1.3 gwr
90 1.11 gwr while (size > 0) {
91 1.11 gwr --size;
92 1.5 gwr *data++ = *src++;
93 1.11 gwr }
94 1.3 gwr }
95 1.3 gwr
96 1.3 gwr /*
97 1.9 gwr * Write bytes somewhere in kernel text.
98 1.9 gwr * Makes text page writable temporarily.
99 1.1 gwr */
100 1.1 gwr static void
101 1.9 gwr db_write_text(addr, size, data)
102 1.9 gwr vm_offset_t addr;
103 1.10 gwr register size_t size;
104 1.9 gwr register char *data;
105 1.1 gwr {
106 1.9 gwr register char *dst;
107 1.9 gwr int ch, oldpte, tmppte;
108 1.9 gwr vm_offset_t pgva, prevpg;
109 1.9 gwr
110 1.9 gwr /* Prevent restoring a garbage PTE. */
111 1.9 gwr if (size <= 0)
112 1.9 gwr return;
113 1.1 gwr
114 1.9 gwr dst = (char*)addr;
115 1.1 gwr pgva = sun3_trunc_page((long)dst);
116 1.1 gwr
117 1.9 gwr goto firstpage;
118 1.9 gwr do {
119 1.9 gwr
120 1.9 gwr /*
121 1.9 gwr * If we are on a new page, restore the PTE
122 1.9 gwr * for the previous page, and make the new
123 1.9 gwr * page writable.
124 1.9 gwr */
125 1.9 gwr pgva = sun3_trunc_page((long)dst);
126 1.9 gwr if (pgva != prevpg) {
127 1.9 gwr /*
128 1.9 gwr * Restore old PTE. No cache flush,
129 1.9 gwr * because the tmp PTE has no-cache.
130 1.9 gwr */
131 1.9 gwr set_pte(prevpg, oldpte);
132 1.9 gwr
133 1.9 gwr firstpage:
134 1.9 gwr /*
135 1.9 gwr * Flush the VAC to prevent a cache hit
136 1.9 gwr * on the old, read-only PTE.
137 1.9 gwr */
138 1.9 gwr #ifdef HAVECACHE
139 1.9 gwr if (cache_size)
140 1.9 gwr cache_flush_page(pgva);
141 1.9 gwr #endif
142 1.9 gwr oldpte = get_pte(pgva);
143 1.9 gwr if ((oldpte & PG_VALID) == 0) {
144 1.12 gwr printf(" address 0x%x not a valid page\n", dst);
145 1.9 gwr return;
146 1.9 gwr }
147 1.9 gwr tmppte = oldpte | PG_WRITE | PG_NC;
148 1.9 gwr set_pte(pgva, tmppte);
149 1.9 gwr
150 1.9 gwr prevpg = pgva;
151 1.9 gwr }
152 1.9 gwr
153 1.9 gwr /* Now we can write in this page of kernel text... */
154 1.9 gwr *dst++ = *data++;
155 1.1 gwr
156 1.9 gwr } while (--size > 0);
157 1.1 gwr
158 1.9 gwr /* Restore old PTE for the last page touched. */
159 1.9 gwr set_pte(prevpg, oldpte);
160 1.1 gwr
161 1.9 gwr /* Finally, clear the instruction cache. */
162 1.9 gwr ICIA();
163 1.1 gwr }
164 1.1 gwr
165 1.1 gwr /*
166 1.1 gwr * Write bytes to kernel address space for debugger.
167 1.1 gwr */
168 1.9 gwr extern char kernel_text[], etext[];
169 1.1 gwr void
170 1.1 gwr db_write_bytes(addr, size, data)
171 1.1 gwr vm_offset_t addr;
172 1.10 gwr register size_t size;
173 1.9 gwr register char *data;
174 1.1 gwr {
175 1.9 gwr register char *dst = (char *)addr;
176 1.1 gwr
177 1.9 gwr /* If any part is in kernel text, use db_write_text() */
178 1.9 gwr if ((dst < etext) && ((dst + size) > kernel_text)) {
179 1.9 gwr db_write_text(dst, size, data);
180 1.9 gwr return;
181 1.1 gwr }
182 1.7 gwr
183 1.9 gwr if (size == 4) {
184 1.9 gwr *((int*)dst) = *((int*)data);
185 1.9 gwr return;
186 1.9 gwr }
187 1.7 gwr
188 1.9 gwr if (size == 2) {
189 1.9 gwr *((short*)dst) = *((short*)data);
190 1.9 gwr return;
191 1.9 gwr }
192 1.7 gwr
193 1.11 gwr while (size > 0) {
194 1.11 gwr --size;
195 1.9 gwr *dst++ = *data++;
196 1.11 gwr }
197 1.7 gwr }
198 1.7 gwr
199