db_memrw.c revision 1.28 1 1.28 tsutsui /* $NetBSD: db_memrw.c,v 1.28 2013/09/07 15:56:11 tsutsui Exp $ */
2 1.1 gwr
3 1.13 gwr /*-
4 1.13 gwr * Copyright (c) 1996 The NetBSD Foundation, Inc.
5 1.1 gwr * All rights reserved.
6 1.1 gwr *
7 1.13 gwr * This code is derived from software contributed to The NetBSD Foundation
8 1.19 gwr * by Gordon W. Ross and Jeremy Cooper.
9 1.13 gwr *
10 1.1 gwr * Redistribution and use in source and binary forms, with or without
11 1.1 gwr * modification, are permitted provided that the following conditions
12 1.1 gwr * are met:
13 1.1 gwr * 1. Redistributions of source code must retain the above copyright
14 1.1 gwr * notice, this list of conditions and the following disclaimer.
15 1.1 gwr * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 gwr * notice, this list of conditions and the following disclaimer in the
17 1.1 gwr * documentation and/or other materials provided with the distribution.
18 1.1 gwr *
19 1.13 gwr * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.13 gwr * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.13 gwr * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.15 gwr * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.15 gwr * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.13 gwr * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.13 gwr * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.13 gwr * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.13 gwr * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.13 gwr * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.13 gwr * POSSIBILITY OF SUCH DAMAGE.
30 1.1 gwr */
31 1.1 gwr
32 1.1 gwr /*
33 1.9 gwr * Interface to the debugger for virtual memory read/write.
34 1.12 gwr * This file is shared by DDB and KGDB, and must work even
35 1.12 gwr * when only KGDB is included (thus no db_printf calls).
36 1.9 gwr *
37 1.9 gwr * To write in the text segment, we have to first make
38 1.9 gwr * the page writable, do the write, then restore the PTE.
39 1.9 gwr * For writes outside the text segment, and all reads,
40 1.9 gwr * just do the access -- if it causes a fault, the debugger
41 1.9 gwr * will recover with a longjmp to an appropriate place.
42 1.9 gwr *
43 1.9 gwr * ALERT! If you want to access device registers with a
44 1.9 gwr * specific size, then the read/write functions have to
45 1.9 gwr * make sure to do the correct sized pointer access.
46 1.1 gwr */
47 1.23 lukem
48 1.23 lukem #include <sys/cdefs.h>
49 1.28 tsutsui __KERNEL_RCSID(0, "$NetBSD: db_memrw.c,v 1.28 2013/09/07 15:56:11 tsutsui Exp $");
50 1.1 gwr
51 1.1 gwr #include <sys/param.h>
52 1.14 gwr #include <sys/systm.h>
53 1.1 gwr #include <sys/proc.h>
54 1.1 gwr
55 1.20 mrg #include <uvm/uvm_extern.h>
56 1.1 gwr
57 1.19 gwr #include <machine/db_machdep.h>
58 1.10 gwr #include <machine/pte.h>
59 1.22 chs #include <m68k/cacheops.h>
60 1.19 gwr
61 1.19 gwr #include <sun3/sun3/machdep.h>
62 1.10 gwr
63 1.10 gwr #include <ddb/db_access.h>
64 1.14 gwr
65 1.14 gwr extern char etext[]; /* defined by the linker */
66 1.14 gwr extern char kernel_text[]; /* locore.s */
67 1.14 gwr
68 1.25 tsutsui static void db_write_text(char *, size_t size, const char *);
69 1.14 gwr
70 1.7 gwr
71 1.7 gwr /*
72 1.3 gwr * Read bytes from kernel address space for debugger.
73 1.5 gwr * This used to check for valid PTEs, but now that
74 1.5 gwr * traps in DDB work correctly, "Just Do It!"
75 1.3 gwr */
76 1.28 tsutsui void
77 1.24 chs db_read_bytes(db_addr_t addr, size_t size, char *data)
78 1.3 gwr {
79 1.28 tsutsui char *src = (char *)addr;
80 1.9 gwr
81 1.9 gwr if (size == 4) {
82 1.24 chs *((int *)data) = *((int *)src);
83 1.9 gwr return;
84 1.9 gwr }
85 1.9 gwr
86 1.9 gwr if (size == 2) {
87 1.24 chs *((short *)data) = *((short *)src);
88 1.9 gwr return;
89 1.9 gwr }
90 1.3 gwr
91 1.11 gwr while (size > 0) {
92 1.11 gwr --size;
93 1.5 gwr *data++ = *src++;
94 1.11 gwr }
95 1.3 gwr }
96 1.3 gwr
97 1.3 gwr /*
98 1.9 gwr * Write bytes somewhere in kernel text.
99 1.9 gwr * Makes text page writable temporarily.
100 1.1 gwr */
101 1.28 tsutsui static void
102 1.25 tsutsui db_write_text(char *dst, size_t size, const char *data)
103 1.1 gwr {
104 1.24 chs int oldpte, tmppte;
105 1.21 tsutsui vaddr_t pgva, prevpg;
106 1.9 gwr
107 1.9 gwr /* Prevent restoring a garbage PTE. */
108 1.9 gwr if (size <= 0)
109 1.9 gwr return;
110 1.1 gwr
111 1.18 veego pgva = m68k_trunc_page((long)dst);
112 1.1 gwr
113 1.9 gwr goto firstpage;
114 1.9 gwr do {
115 1.9 gwr
116 1.9 gwr /*
117 1.9 gwr * If we are on a new page, restore the PTE
118 1.9 gwr * for the previous page, and make the new
119 1.9 gwr * page writable.
120 1.9 gwr */
121 1.18 veego pgva = m68k_trunc_page((long)dst);
122 1.9 gwr if (pgva != prevpg) {
123 1.9 gwr /*
124 1.9 gwr * Restore old PTE. No cache flush,
125 1.9 gwr * because the tmp PTE has no-cache.
126 1.9 gwr */
127 1.9 gwr set_pte(prevpg, oldpte);
128 1.9 gwr
129 1.9 gwr firstpage:
130 1.9 gwr /*
131 1.9 gwr * Flush the VAC to prevent a cache hit
132 1.9 gwr * on the old, read-only PTE.
133 1.9 gwr */
134 1.9 gwr #ifdef HAVECACHE
135 1.9 gwr if (cache_size)
136 1.9 gwr cache_flush_page(pgva);
137 1.9 gwr #endif
138 1.9 gwr oldpte = get_pte(pgva);
139 1.9 gwr if ((oldpte & PG_VALID) == 0) {
140 1.14 gwr printf(" address %p not a valid page\n", dst);
141 1.9 gwr return;
142 1.9 gwr }
143 1.19 gwr
144 1.19 gwr /*
145 1.19 gwr * Make the pte writable and non-cached.
146 1.19 gwr */
147 1.19 gwr tmppte = oldpte;
148 1.19 gwr #ifdef _SUN3_
149 1.19 gwr tmppte |= (PG_WRITE | PG_NC);
150 1.19 gwr #endif
151 1.19 gwr #ifdef _SUN3X_
152 1.19 gwr tmppte &= ~MMU_SHORT_PTE_WP;
153 1.19 gwr tmppte |= MMU_SHORT_PTE_CI;
154 1.19 gwr #endif
155 1.19 gwr
156 1.9 gwr set_pte(pgva, tmppte);
157 1.9 gwr prevpg = pgva;
158 1.9 gwr }
159 1.9 gwr
160 1.9 gwr /* Now we can write in this page of kernel text... */
161 1.9 gwr *dst++ = *data++;
162 1.1 gwr
163 1.9 gwr } while (--size > 0);
164 1.1 gwr
165 1.9 gwr /* Restore old PTE for the last page touched. */
166 1.9 gwr set_pte(prevpg, oldpte);
167 1.1 gwr
168 1.9 gwr /* Finally, clear the instruction cache. */
169 1.9 gwr ICIA();
170 1.1 gwr }
171 1.1 gwr
172 1.1 gwr /*
173 1.1 gwr * Write bytes to kernel address space for debugger.
174 1.1 gwr */
175 1.28 tsutsui void
176 1.25 tsutsui db_write_bytes(db_addr_t addr, size_t size, const char *data)
177 1.1 gwr {
178 1.21 tsutsui char *dst = (char *)addr;
179 1.1 gwr
180 1.9 gwr /* If any part is in kernel text, use db_write_text() */
181 1.9 gwr if ((dst < etext) && ((dst + size) > kernel_text)) {
182 1.9 gwr db_write_text(dst, size, data);
183 1.9 gwr return;
184 1.1 gwr }
185 1.7 gwr
186 1.9 gwr if (size == 4) {
187 1.25 tsutsui *((int *)dst) = *((const int *)data);
188 1.9 gwr return;
189 1.9 gwr }
190 1.7 gwr
191 1.9 gwr if (size == 2) {
192 1.25 tsutsui *((short *)dst) = *((const short *)data);
193 1.9 gwr return;
194 1.9 gwr }
195 1.7 gwr
196 1.11 gwr while (size > 0) {
197 1.11 gwr --size;
198 1.9 gwr *dst++ = *data++;
199 1.11 gwr }
200 1.7 gwr }
201 1.7 gwr
202