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dvma.c revision 1.1
      1  1.1  gwr /*	$NetBSD: dvma.c,v 1.1 1997/01/14 20:57:07 gwr Exp $	*/
      2  1.1  gwr 
      3  1.1  gwr /*-
      4  1.1  gwr  * Copyright (c) 1996 The NetBSD Foundation, Inc.
      5  1.1  gwr  * All rights reserved.
      6  1.1  gwr  *
      7  1.1  gwr  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1  gwr  * by Gordon W. Ross and Jeremy Cooper.
      9  1.1  gwr  *
     10  1.1  gwr  * Redistribution and use in source and binary forms, with or without
     11  1.1  gwr  * modification, are permitted provided that the following conditions
     12  1.1  gwr  * are met:
     13  1.1  gwr  * 1. Redistributions of source code must retain the above copyright
     14  1.1  gwr  *    notice, this list of conditions and the following disclaimer.
     15  1.1  gwr  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1  gwr  *    notice, this list of conditions and the following disclaimer in the
     17  1.1  gwr  *    documentation and/or other materials provided with the distribution.
     18  1.1  gwr  * 3. All advertising materials mentioning features or use of this software
     19  1.1  gwr  *    must display the following acknowledgement:
     20  1.1  gwr  *        This product includes software developed by the NetBSD
     21  1.1  gwr  *        Foundation, Inc. and its contributors.
     22  1.1  gwr  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.1  gwr  *    contributors may be used to endorse or promote products derived
     24  1.1  gwr  *    from this software without specific prior written permission.
     25  1.1  gwr  *
     26  1.1  gwr  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.1  gwr  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.1  gwr  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.1  gwr  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.1  gwr  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.1  gwr  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.1  gwr  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.1  gwr  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.1  gwr  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.1  gwr  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.1  gwr  * POSSIBILITY OF SUCH DAMAGE.
     37  1.1  gwr  */
     38  1.1  gwr 
     39  1.1  gwr /*
     40  1.1  gwr  * DVMA (Direct Virtual Memory Access - like DMA)
     41  1.1  gwr  *
     42  1.1  gwr  * In the Sun3 architecture, memory cycles initiated by secondary bus
     43  1.1  gwr  * masters (DVMA devices) passed through the same MMU that governed CPU
     44  1.1  gwr  * accesses.  All DVMA devices were wired in such a way so that an offset
     45  1.1  gwr  * was added to the addresses they issued, causing them to access virtual
     46  1.1  gwr  * memory starting at address 0x0FF00000 - the offset.  The task of
     47  1.1  gwr  * enabling a DVMA device to access main memory only involved creating
     48  1.1  gwr  * valid mapping in the MMU that translated these high addresses into the
     49  1.1  gwr  * appropriate physical addresses.
     50  1.1  gwr  *
     51  1.1  gwr  * The Sun3x presents a challenge to programming DVMA because the MMU is no
     52  1.1  gwr  * longer shared by both secondary bus masters and the CPU.  The MC68030's
     53  1.1  gwr  * built-in MMU serves only to manage virtual memory accesses initiated by
     54  1.1  gwr  * the CPU.  Secondary bus master bus accesses pass through a different MMU,
     55  1.1  gwr  * aptly named the 'I/O Mapper'.  To enable every device driver that uses
     56  1.1  gwr  * DVMA to understand that these two address spaces are disconnected would
     57  1.1  gwr  * require a tremendous amount of code re-writing. To avoid this, we will
     58  1.1  gwr  * ensure that the I/O Mapper and the MC68030 MMU are programmed together,
     59  1.1  gwr  * so that DVMA mappings are consistent in both the CPU virtual address
     60  1.1  gwr  * space and secondary bus master address space - creating an environment
     61  1.1  gwr  * just like the Sun3 system.
     62  1.1  gwr  *
     63  1.1  gwr  * The maximum address space that any DVMA device in the Sun3x architecture
     64  1.1  gwr  * is capable of addressing is 24 bits wide (16 Megabytes.)  We can alias
     65  1.1  gwr  * all of the mappings that exist in the I/O mapper by duplicating them in
     66  1.1  gwr  * a specially reserved section of the CPU's virtual address space, 16
     67  1.1  gwr  * Megabytes in size.  Whenever a DVMA buffer is allocated, the allocation
     68  1.1  gwr  * code will enter in a mapping both in the MC68030 MMU page tables and the
     69  1.1  gwr  * I/O mapper.
     70  1.1  gwr  *
     71  1.1  gwr  * The address returned by the allocation routine is a virtual address that
     72  1.1  gwr  * the requesting driver must use to access the buffer.  It is up to the
     73  1.1  gwr  * device driver to convert this virtual address into the appropriate slave
     74  1.1  gwr  * address that its device should issue to access the buffer.  (The will be
     75  1.1  gwr  * routines that will assist the driver in doing so.)
     76  1.1  gwr  *
     77  1.1  gwr  * XXX - This needs work.  The address from dvma_malloc() faults!
     78  1.1  gwr  */
     79  1.1  gwr #include <sys/param.h>
     80  1.1  gwr #include <sys/systm.h>
     81  1.1  gwr #include <sys/device.h>
     82  1.1  gwr #include <sys/proc.h>
     83  1.1  gwr #include <sys/malloc.h>
     84  1.1  gwr #include <sys/map.h>
     85  1.1  gwr #include <sys/buf.h>
     86  1.1  gwr #include <sys/vnode.h>
     87  1.1  gwr #include <sys/user.h>
     88  1.1  gwr #include <sys/core.h>
     89  1.1  gwr #include <sys/exec.h>
     90  1.1  gwr 
     91  1.1  gwr #include <vm/vm.h>
     92  1.1  gwr #include <vm/vm_kern.h>
     93  1.1  gwr #include <vm/vm_map.h>
     94  1.1  gwr 
     95  1.1  gwr #include <machine/autoconf.h>
     96  1.1  gwr #include <machine/cpu.h>
     97  1.1  gwr #include <machine/enable.h>
     98  1.1  gwr #include <machine/reg.h>
     99  1.1  gwr #include <machine/pmap.h>
    100  1.1  gwr #include <machine/dvma.h>
    101  1.1  gwr 
    102  1.1  gwr #include "machdep.h"
    103  1.1  gwr #include "iommu.h"
    104  1.1  gwr 
    105  1.1  gwr /*
    106  1.1  gwr  * Use a resource map to manage DVMA scratch-memory pages.
    107  1.1  gwr  */
    108  1.1  gwr 
    109  1.1  gwr /* Number of slots in dvmamap. */
    110  1.1  gwr int dvma_max_segs = 256;
    111  1.1  gwr struct map *dvmamap;
    112  1.1  gwr 
    113  1.1  gwr void
    114  1.1  gwr dvma_init()
    115  1.1  gwr {
    116  1.1  gwr 
    117  1.1  gwr 	/*
    118  1.1  gwr 	 * Create the resource map for DVMA pages.
    119  1.1  gwr 	 */
    120  1.1  gwr 	dvmamap = malloc((sizeof(struct map) * dvma_max_segs),
    121  1.1  gwr 					 M_DEVBUF, M_WAITOK);
    122  1.1  gwr 
    123  1.1  gwr 	rminit(dvmamap, btoc(DVMA_SPACE_LENGTH), btoc(0xFF000000),
    124  1.1  gwr 		   "dvmamap", dvma_max_segs);
    125  1.1  gwr 
    126  1.1  gwr 	/*
    127  1.1  gwr 	 * Enable DVMA in the System Enable register.
    128  1.1  gwr 	 * Note:  This is only necessary for VME slave accesses.
    129  1.1  gwr 	 *        On-board devices are always capable of DVMA.
    130  1.1  gwr 	 * *enable_reg |= ENA_SDVMA;
    131  1.1  gwr 	 */
    132  1.1  gwr }
    133  1.1  gwr 
    134  1.1  gwr 
    135  1.1  gwr /*
    136  1.1  gwr  * Given a DVMA address, return the physical address that
    137  1.1  gwr  * would be used by some OTHER bus-master besides the CPU.
    138  1.1  gwr  * (Examples: on-board ie/le, VME xy board).
    139  1.1  gwr  */
    140  1.1  gwr u_long
    141  1.1  gwr dvma_kvtopa(kva, bustype)
    142  1.1  gwr 	void * kva;
    143  1.1  gwr 	int bustype;
    144  1.1  gwr {
    145  1.1  gwr 	u_long addr, mask;
    146  1.1  gwr 
    147  1.1  gwr 	addr = (u_long)kva;
    148  1.1  gwr 	if ((addr & DVMA_SPACE_START) != DVMA_SPACE_START)
    149  1.1  gwr 		panic("dvma_kvtopa: bad dmva addr=0x%x\n", addr);
    150  1.1  gwr 
    151  1.1  gwr 	/* Everything has just 24 bits. */
    152  1.1  gwr 	mask = DVMA_SLAVE_MASK;
    153  1.1  gwr 
    154  1.1  gwr 	return(addr & mask);
    155  1.1  gwr }
    156  1.1  gwr 
    157  1.1  gwr 
    158  1.1  gwr /*
    159  1.1  gwr  * Map a range [va, va+len] of wired virtual addresses in the given map
    160  1.1  gwr  * to a kernel address in DVMA space.
    161  1.1  gwr  */
    162  1.1  gwr void *
    163  1.1  gwr dvma_mapin(kmem_va, len, canwait)
    164  1.1  gwr 	void *	kmem_va;
    165  1.1  gwr 	int		len, canwait;
    166  1.1  gwr {
    167  1.1  gwr 	void * dvma_addr;
    168  1.1  gwr 	vm_offset_t kva, tva;
    169  1.1  gwr 	register int npf, s;
    170  1.1  gwr 	register vm_offset_t pa;
    171  1.1  gwr 	long off, pn;
    172  1.1  gwr 
    173  1.1  gwr 	kva = (u_long)kmem_va;
    174  1.1  gwr 	if (kva < VM_MIN_KERNEL_ADDRESS)
    175  1.1  gwr 		panic("dvma_mapin: bad kva");
    176  1.1  gwr 
    177  1.1  gwr 	off = (int)kva & PGOFSET;
    178  1.1  gwr 	kva -= off;
    179  1.1  gwr 	len = round_page(len + off);
    180  1.1  gwr 	npf = btoc(len);
    181  1.1  gwr 
    182  1.1  gwr 	s = splimp();
    183  1.1  gwr 	for (;;) {
    184  1.1  gwr 
    185  1.1  gwr 		pn = rmalloc(dvmamap, npf);
    186  1.1  gwr 
    187  1.1  gwr 		if (pn != 0)
    188  1.1  gwr 			break;
    189  1.1  gwr 		if (canwait) {
    190  1.1  gwr 			(void)tsleep(dvmamap, PRIBIO+1, "physio", 0);
    191  1.1  gwr 			continue;
    192  1.1  gwr 		}
    193  1.1  gwr 		splx(s);
    194  1.1  gwr 		return NULL;
    195  1.1  gwr 	}
    196  1.1  gwr 	splx(s);
    197  1.1  gwr 
    198  1.1  gwr 	tva = ctob(pn);
    199  1.1  gwr 	dvma_addr = (void *) (tva + off);
    200  1.1  gwr 
    201  1.1  gwr 	while (npf--) {
    202  1.1  gwr 		pa = pmap_extract(pmap_kernel(), kva);
    203  1.1  gwr 		if (pa == 0)
    204  1.1  gwr 			panic("dvma_mapin: null page frame");
    205  1.1  gwr 		pa = trunc_page(pa);
    206  1.1  gwr 
    207  1.1  gwr 		iommu_enter((tva & DVMA_SLAVE_MASK), pa);
    208  1.1  gwr 
    209  1.1  gwr 		pmap_enter(pmap_kernel(), tva, pa | PMAP_NC,
    210  1.1  gwr 			VM_PROT_READ|VM_PROT_WRITE, 1);
    211  1.1  gwr 
    212  1.1  gwr 		kva += NBPG;
    213  1.1  gwr 		tva += NBPG;
    214  1.1  gwr 	}
    215  1.1  gwr 
    216  1.1  gwr 	return (dvma_addr);
    217  1.1  gwr }
    218  1.1  gwr 
    219  1.1  gwr /*
    220  1.1  gwr  * Remove double map of `va' in DVMA space at `kva'.
    221  1.1  gwr  */
    222  1.1  gwr void
    223  1.1  gwr dvma_mapout(dvma_addr, len)
    224  1.1  gwr 	void *	dvma_addr;
    225  1.1  gwr 	int		len;
    226  1.1  gwr {
    227  1.1  gwr 	u_long kva;
    228  1.1  gwr 	int s, off;
    229  1.1  gwr 
    230  1.1  gwr 	kva = (u_long)dvma_addr;
    231  1.1  gwr 	off = (int)kva & PGOFSET;
    232  1.1  gwr 	kva -= off;
    233  1.1  gwr 	len = round_page(len + off);
    234  1.1  gwr 
    235  1.1  gwr 	iommu_remove((kva & DVMA_SLAVE_MASK), len);
    236  1.1  gwr 
    237  1.1  gwr 	pmap_remove(pmap_kernel(), kva, kva + len);
    238  1.1  gwr 
    239  1.1  gwr 	s = splimp();
    240  1.1  gwr 	rmfree(dvmamap, btoc(len), btoc(kva));
    241  1.1  gwr 	wakeup(dvmamap);
    242  1.1  gwr 	splx(s);
    243  1.1  gwr }
    244