locore.s revision 1.51
1 /* $NetBSD: locore.s,v 1.51 2003/01/18 07:03:36 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1988 University of Utah. 5 * Copyright (c) 1980, 1990, 1993 6 * The Regents of the University of California. All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * the Systems Programming Group of the University of Utah Computer 10 * Science Department. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the University of 23 * California, Berkeley and its contributors. 24 * 4. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * from: Utah $Hdr: locore.s 1.66 92/12/22$ 41 * @(#)locore.s 8.6 (Berkeley) 5/27/94 42 */ 43 44 #include "opt_compat_netbsd.h" 45 #include "opt_compat_svr4.h" 46 #include "opt_compat_sunos.h" 47 #include "opt_kgdb.h" 48 #include "opt_lockdebug.h" 49 50 #include "assym.h" 51 #include <machine/asm.h> 52 #include <machine/trap.h> 53 54 | Remember this is a fun project! 55 56 .data 57 GLOBAL(mon_crp) 58 .long 0,0 59 60 | This is for kvm_mkdb, and should be the address of the beginning 61 | of the kernel text segment (not necessarily the same as kernbase). 62 .text 63 GLOBAL(kernel_text) 64 65 | This is the entry point, as well as the end of the temporary stack 66 | used during process switch (one 8K page ending at start) 67 ASGLOBAL(tmpstk) 68 ASGLOBAL(start) 69 70 | The first step, after disabling interrupts, is to map enough of the kernel 71 | into high virtual address space so that we can use position dependent code. 72 | This is a tricky task on the sun3x because the MMU is already enabled and 73 | the ROM monitor provides no indication of where the root MMU table is mapped. 74 | Therefore we must use one of the 68030's 'transparent translation' registers 75 | to define a range in the address space where the MMU translation is 76 | turned off. Once this is complete we can modify the MMU table directly 77 | without the need for it to be mapped into virtual memory. 78 | All code must be position independent until otherwise noted, as the 79 | boot loader has loaded us into low memory but all the symbols in this 80 | code have been linked high. 81 movw #PSL_HIGHIPL,%sr | no interrupts 82 movl #KERNBASE,%a5 | for vtop conversion 83 lea _C_LABEL(mon_crp),%a0 | where to store the CRP 84 subl %a5,%a0 85 | Note: borrowing mon_crp for tt0 setup... 86 movl #0x3F8107,%a0@ | map the low 1GB v=p with the 87 .long 0xf0100800 | transparent translation reg0 88 | [ pmove a0@, tt0 ] 89 | In order to map the kernel into high memory we will copy the root table 90 | entry which maps the 16 megabytes of memory starting at 0x0 into the 91 | entry which maps the 16 megabytes starting at KERNBASE. 92 pmove %crp,%a0@ | Get monitor CPU root pointer 93 movl %a0@(4),%a1 | 2nd word is PA of level A table 94 95 movl %a1,%a0 | compute the descriptor address 96 addl #0x3e0,%a1 | for VA starting at KERNBASE 97 movl %a0@,%a1@ | copy descriptor type 98 movl %a0@(4),%a1@(4) | copy physical address 99 100 | Kernel is now double mapped at zero and KERNBASE. 101 | Force a long jump to the relocated code (high VA). 102 movl #IC_CLEAR,%d0 | Flush the I-cache 103 movc %d0,%cacr 104 jmp L_high_code:l | long jump 105 106 L_high_code: 107 | We are now running in the correctly relocated kernel, so 108 | we are no longer restricted to position-independent code. 109 | It is handy to leave transparent translation enabled while 110 | for the low 1GB while _bootstrap() is doing its thing. 111 112 | Do bootstrap stuff needed before main() gets called. 113 | Our boot loader leaves a copy of the kernel's exec header 114 | just before the start of the kernel text segment, so the 115 | kernel can sanity-check the DDB symbols at [end...esym]. 116 | Pass the struct exec at tmpstk-32 to _bootstrap(). 117 | Also, make sure the initial frame pointer is zero so that 118 | the backtrace algorithm used by KGDB terminates nicely. 119 lea _ASM_LABEL(tmpstk)-32,%sp 120 movl #0,%a6 121 jsr _C_LABEL(_bootstrap) | See locore2.c 122 123 | Now turn off the transparent translation of the low 1GB. 124 | (this also flushes the ATC) 125 clrl %sp@- 126 .long 0xf0170800 | pmove sp@,tt0 127 addql #4,%sp 128 129 | Now that _bootstrap() is done using the PROM functions, 130 | we can safely set the sfc/dfc to something != FC_CONTROL 131 moveq #FC_USERD,%d0 | make movs access "user data" 132 movc %d0,%sfc | space for copyin/copyout 133 movc %d0,%dfc 134 135 | Setup process zero user/kernel stacks. 136 movl _C_LABEL(proc0paddr),%a1| get lwp0 pcb addr 137 lea %a1@(USPACE-4),%sp | set SSP to last word 138 movl #USRSTACK-4,%a2 139 movl %a2,%usp | init user SP 140 141 | Note curpcb was already set in _bootstrap(). 142 | Will do fpu initialization during autoconfig (see fpu.c) 143 | The interrupt vector table and stack are now ready. 144 | Interrupts will be enabled later, AFTER autoconfiguration 145 | is finished, to avoid spurrious interrupts. 146 147 /* 148 * Create a fake exception frame so that cpu_fork() can copy it. 149 * main() nevers returns; we exit to user mode from a forked process 150 * later on. 151 */ 152 clrw %sp@- | tf_format,tf_vector 153 clrl %sp@- | tf_pc (filled in later) 154 movw #PSL_USER,%sp@- | tf_sr for user mode 155 clrl %sp@- | tf_stackadj 156 lea %sp@(-64),%sp | tf_regs[16] 157 lea _C_LABEL(lwp0),%a0 | proc0.p_md.md_regs = 158 movl %a1,%a0@(L_MD_REGS) | trapframe 159 jbsr _C_LABEL(main) | main(&trapframe) 160 PANIC("main() returned") 161 162 /* 163 * proc_trampoline: call function in register %a2 with %a3 as an arg 164 * and then rei. 165 */ 166 GLOBAL(proc_trampoline) 167 movl %a3,%sp@- | push function arg 168 jbsr %a2@ | call function 169 addql #4,%sp | pop arg 170 movl %sp@(FR_SP),%a0 | grab and load 171 movl %a0,%usp | user SP 172 moveml %sp@+,#0x7FFF | restore most user regs 173 addql #8,%sp | toss SP and stack adjust 174 jra _ASM_LABEL(rei) | and return 175 176 | That is all the assembly startup code we need on the sun3x! 177 | The rest of this is like the hp300/locore.s where possible. 178 179 /* 180 * Trap/interrupt vector routines 181 */ 182 #include <m68k/m68k/trap_subr.s> 183 184 GLOBAL(buserr) 185 tstl _C_LABEL(nofault) | device probe? 186 jeq _C_LABEL(addrerr) | no, handle as usual 187 movl _C_LABEL(nofault),%sp@- | yes, 188 jbsr _C_LABEL(longjmp) | longjmp(nofault) 189 GLOBAL(addrerr) 190 clrl %sp@- | stack adjust count 191 moveml #0xFFFF,%sp@- | save user registers 192 movl %usp,%a0 | save the user SP 193 movl %a0,%sp@(FR_SP) | in the savearea 194 lea %sp@(FR_HW),%a1 | grab base of HW berr frame 195 moveq #0,%d0 196 movw %a1@(10),%d0 | grab SSW for fault processing 197 btst #12,%d0 | RB set? 198 jeq LbeX0 | no, test RC 199 bset #14,%d0 | yes, must set FB 200 movw %d0,%a1@(10) | for hardware too 201 LbeX0: 202 btst #13,%d0 | RC set? 203 jeq LbeX1 | no, skip 204 bset #15,%d0 | yes, must set FC 205 movw %d0,%a1@(10) | for hardware too 206 LbeX1: 207 btst #8,%d0 | data fault? 208 jeq Lbe0 | no, check for hard cases 209 movl %a1@(16),%d1 | fault address is as given in frame 210 jra Lbe10 | thats it 211 Lbe0: 212 btst #4,%a1@(6) | long (type B) stack frame? 213 jne Lbe4 | yes, go handle 214 movl %a1@(2),%d1 | no, can use save PC 215 btst #14,%d0 | FB set? 216 jeq Lbe3 | no, try FC 217 addql #4,%d1 | yes, adjust address 218 jra Lbe10 | done 219 Lbe3: 220 btst #15,%d0 | FC set? 221 jeq Lbe10 | no, done 222 addql #2,%d1 | yes, adjust address 223 jra Lbe10 | done 224 Lbe4: 225 movl %a1@(36),%d1 | long format, use stage B address 226 btst #15,%d0 | FC set? 227 jeq Lbe10 | no, all done 228 subql #2,%d1 | yes, adjust address 229 Lbe10: 230 movl %d1,%sp@- | push fault VA 231 movl %d0,%sp@- | and padded SSW 232 movw %a1@(6),%d0 | get frame format/vector offset 233 andw #0x0FFF,%d0 | clear out frame format 234 cmpw #12,%d0 | address error vector? 235 jeq Lisaerr | yes, go to it 236 237 /* MMU-specific code to determine reason for bus error. */ 238 movl %d1,%a0 | fault address 239 movl %sp@,%d0 | function code from ssw 240 btst #8,%d0 | data fault? 241 jne Lbe10a 242 movql #1,%d0 | user program access FC 243 | (we dont separate data/program) 244 btst #5,%a1@ | supervisor mode? 245 jeq Lbe10a | if no, done 246 movql #5,%d0 | else supervisor program access 247 Lbe10a: 248 ptestr %d0,%a0@,#7 | do a table search 249 pmove %psr,%sp@ | save result 250 movb %sp@,%d1 251 btst #2,%d1 | invalid? (incl. limit viol and berr) 252 jeq Lmightnotbemerr | no -> wp check 253 btst #7,%d1 | is it MMU table berr? 254 jeq Lismerr | no, must be fast 255 jra Lisberr1 | real bus err needs not be fast 256 Lmightnotbemerr: 257 btst #3,%d1 | write protect bit set? 258 jeq Lisberr1 | no, must be bus error 259 movl %sp@,%d0 | ssw into low word of d0 260 andw #0xc0,%d0 | write protect is set on page: 261 cmpw #0x40,%d0 | was it read cycle? 262 jeq Lisberr1 | yes, was not WPE, must be bus err 263 /* End of MMU-specific bus error code. */ 264 265 Lismerr: 266 movl #T_MMUFLT,%sp@- | show that we are an MMU fault 267 jra _ASM_LABEL(faultstkadj) | and deal with it 268 Lisaerr: 269 movl #T_ADDRERR,%sp@- | mark address error 270 jra _ASM_LABEL(faultstkadj) | and deal with it 271 Lisberr1: 272 clrw %sp@ | re-clear pad word 273 Lisberr: 274 movl #T_BUSERR,%sp@- | mark bus error 275 jra _ASM_LABEL(faultstkadj) | and deal with it 276 277 /* 278 * FP exceptions. 279 */ 280 GLOBAL(fpfline) 281 clrl %sp@- | stack adjust count 282 moveml #0xFFFF,%sp@- | save registers 283 moveq #T_FPEMULI,%d0 | denote as FP emulation trap 284 jra _ASM_LABEL(fault) | do it 285 286 GLOBAL(fpunsupp) 287 clrl %sp@- | stack adjust count 288 moveml #0xFFFF,%sp@- | save registers 289 moveq #T_FPEMULD,%d0 | denote as FP emulation trap 290 jra _ASM_LABEL(fault) | do it 291 292 /* 293 * Handles all other FP coprocessor exceptions. 294 * Note that since some FP exceptions generate mid-instruction frames 295 * and may cause signal delivery, we need to test for stack adjustment 296 * after the trap call. 297 */ 298 GLOBAL(fpfault) 299 clrl %sp@- | stack adjust count 300 moveml #0xFFFF,%sp@- | save user registers 301 movl %usp,%a0 | and save 302 movl %a0,%sp@(FR_SP) | the user stack pointer 303 clrl %sp@- | no VA arg 304 movl _C_LABEL(curpcb),%a0 | current pcb 305 lea %a0@(PCB_FPCTX),%a0 | address of FP savearea 306 fsave %a0@ | save state 307 tstb %a0@ | null state frame? 308 jeq Lfptnull | yes, safe 309 clrw %d0 | no, need to tweak BIU 310 movb %a0@(1),%d0 | get frame size 311 bset #3,%a0@(0,%d0:w) | set exc_pend bit of BIU 312 Lfptnull: 313 fmovem %fpsr,%sp@- | push fpsr as code argument 314 frestore %a0@ | restore state 315 movl #T_FPERR,%sp@- | push type arg 316 jra _ASM_LABEL(faultstkadj) | call trap and deal with stack cleanup 317 318 /* 319 * Other exceptions only cause four and six word stack frame and require 320 * no post-trap stack adjustment. 321 */ 322 GLOBAL(badtrap) 323 clrl %sp@- | stack adjust count 324 moveml #0xFFFF,%sp@- | save std frame regs 325 jbsr _C_LABEL(straytrap) | report 326 moveml %sp@+,#0xFFFF | restore regs 327 addql #4,%sp | stack adjust count 328 jra _ASM_LABEL(rei) | all done 329 330 /* 331 * Trap 0 is for system calls 332 */ 333 GLOBAL(trap0) 334 clrl %sp@- | stack adjust count 335 moveml #0xFFFF,%sp@- | save user registers 336 movl %usp,%a0 | save the user SP 337 movl %a0,%sp@(FR_SP) | in the savearea 338 movl %d0,%sp@- | push syscall number 339 jbsr _C_LABEL(syscall) | handle it 340 addql #4,%sp | pop syscall arg 341 movl %sp@(FR_SP),%a0 | grab and restore 342 movl %a0,%usp | user SP 343 moveml %sp@+,#0x7FFF | restore most registers 344 addql #8,%sp | pop SP and stack adjust 345 jra _ASM_LABEL(rei) | all done 346 347 /* 348 * Trap 12 is the entry point for the cachectl "syscall" 349 * cachectl(command, addr, length) 350 * command in d0, addr in a1, length in d1 351 */ 352 GLOBAL(trap12) 353 movl _C_LABEL(curlwp),%a0 354 movl %a0@(L_PROC),%sp@- | push curproc pointer 355 movl %d1,%sp@- | push length 356 movl %a1,%sp@- | push addr 357 movl %d0,%sp@- | push command 358 jbsr _C_LABEL(cachectl1) | do it 359 lea %sp@(16),%sp | pop args 360 jra _ASM_LABEL(rei) | all done 361 362 /* 363 * Trace (single-step) trap. Kernel-mode is special. 364 * User mode traps are simply passed on to trap(). 365 */ 366 GLOBAL(trace) 367 clrl %sp@- | stack adjust count 368 moveml #0xFFFF,%sp@- 369 moveq #T_TRACE,%d0 370 371 | Check PSW and see what happen. 372 | T=0 S=0 (should not happen) 373 | T=1 S=0 trace trap from user mode 374 | T=0 S=1 trace trap on a trap instruction 375 | T=1 S=1 trace trap from system mode (kernel breakpoint) 376 377 movw %sp@(FR_HW),%d1 | get PSW 378 notw %d1 | XXX no support for T0 on 680[234]0 379 andw #PSL_TS,%d1 | from system mode (T=1, S=1)? 380 jeq _ASM_LABEL(kbrkpt) | yes, kernel brkpt 381 jra _ASM_LABEL(fault) | no, user-mode fault 382 383 /* 384 * Trap 15 is used for: 385 * - GDB breakpoints (in user programs) 386 * - KGDB breakpoints (in the kernel) 387 * - trace traps for SUN binaries (not fully supported yet) 388 * User mode traps are simply passed to trap(). 389 */ 390 GLOBAL(trap15) 391 clrl %sp@- | stack adjust count 392 moveml #0xFFFF,%sp@- 393 moveq #T_TRAP15,%d0 394 btst #5,%sp@(FR_HW) | was supervisor mode? 395 jne _ASM_LABEL(kbrkpt) | yes, kernel brkpt 396 jra _ASM_LABEL(fault) | no, user-mode fault 397 398 ASLOCAL(kbrkpt) 399 | Kernel-mode breakpoint or trace trap. (%d0=trap_type) 400 | Save the system sp rather than the user sp. 401 movw #PSL_HIGHIPL,%sr | lock out interrupts 402 lea %sp@(FR_SIZE),%a6 | Save stack pointer 403 movl %a6,%sp@(FR_SP) | from before trap 404 405 | If we are not on tmpstk switch to it. 406 | (so debugger can change the stack pointer) 407 movl %a6,%d1 408 cmpl #_ASM_LABEL(tmpstk),%d1 409 jls Lbrkpt2 | already on tmpstk 410 | Copy frame to the temporary stack 411 movl %sp,%a0 | %a0=src 412 lea _ASM_LABEL(tmpstk)-96,%a1 | %a1=dst 413 movl %a1,%sp | sp=new frame 414 moveq #FR_SIZE,%d1 415 Lbrkpt1: 416 movl %a0@+,%a1@+ 417 subql #4,%d1 418 bgt Lbrkpt1 419 420 Lbrkpt2: 421 | Call the trap handler for the kernel debugger. 422 | Do not call trap() to handle it, so that we can 423 | set breakpoints in trap() if we want. We know 424 | the trap type is either T_TRACE or T_BREAKPOINT. 425 movl %d0,%sp@- | push trap type 426 jbsr _C_LABEL(trap_kdebug) 427 addql #4,%sp | pop args 428 429 | The stack pointer may have been modified, or 430 | data below it modified (by kgdb push call), 431 | so push the hardware frame at the current sp 432 | before restoring registers and returning. 433 movl %sp@(FR_SP),%a0 | modified sp 434 lea %sp@(FR_SIZE),%a1 | end of our frame 435 movl %a1@-,%a0@- | copy 2 longs with 436 movl %a1@-,%a0@- | ... predecrement 437 movl %a0,%sp@(FR_SP) | sp = h/w frame 438 moveml %sp@+,#0x7FFF | restore all but sp 439 movl %sp@,%sp | ... and sp 440 rte | all done 441 442 /* Use common m68k sigreturn */ 443 #include <m68k/m68k/sigreturn.s> 444 445 /* 446 * Interrupt handlers. Most are auto-vectored, 447 * and hard-wired the same way on all sun3 models. 448 * Format in the stack is: 449 * %d0,%d1,%a0,%a1, sr, pc, vo 450 */ 451 452 #define INTERRUPT_SAVEREG \ 453 moveml #0xC0C0,%sp@- 454 455 #define INTERRUPT_RESTORE \ 456 moveml %sp@+,#0x0303 457 458 /* 459 * This is the common auto-vector interrupt handler, 460 * for which the CPU provides the vector=0x18+level. 461 * These are installed in the interrupt vector table. 462 */ 463 #ifdef __ELF__ 464 .align 4 465 #else 466 .align 2 467 #endif 468 GLOBAL(_isr_autovec) 469 INTERRUPT_SAVEREG 470 jbsr _C_LABEL(isr_autovec) 471 INTERRUPT_RESTORE 472 jra _ASM_LABEL(rei) 473 474 /* clock: see clock.c */ 475 #ifdef __ELF__ 476 .align 4 477 #else 478 .align 2 479 #endif 480 GLOBAL(_isr_clock) 481 INTERRUPT_SAVEREG 482 jbsr _C_LABEL(clock_intr) 483 INTERRUPT_RESTORE 484 jra _ASM_LABEL(rei) 485 486 | Handler for all vectored interrupts (i.e. VME interrupts) 487 #ifdef __ELF__ 488 .align 4 489 #else 490 .align 2 491 #endif 492 GLOBAL(_isr_vectored) 493 INTERRUPT_SAVEREG 494 jbsr _C_LABEL(isr_vectored) 495 INTERRUPT_RESTORE 496 jra _ASM_LABEL(rei) 497 498 #undef INTERRUPT_SAVEREG 499 #undef INTERRUPT_RESTORE 500 501 /* interrupt counters (needed by vmstat) */ 502 GLOBAL(intrnames) 503 .asciz "spur" | 0 504 .asciz "lev1" | 1 505 .asciz "lev2" | 2 506 .asciz "lev3" | 3 507 .asciz "lev4" | 4 508 .asciz "clock" | 5 509 .asciz "lev6" | 6 510 .asciz "nmi" | 7 511 GLOBAL(eintrnames) 512 513 .data 514 .even 515 GLOBAL(intrcnt) 516 .long 0,0,0,0,0,0,0,0,0,0 517 GLOBAL(eintrcnt) 518 .text 519 520 /* 521 * Emulation of VAX REI instruction. 522 * 523 * This code is (mostly) un-altered from the hp300 code, 524 * except that sun machines do not need a simulated SIR 525 * because they have a real software interrupt register. 526 * 527 * This code deals with checking for and servicing ASTs 528 * (profiling, scheduling) and software interrupts (network, softclock). 529 * We check for ASTs first, just like the VAX. To avoid excess overhead 530 * the T_ASTFLT handling code will also check for software interrupts so we 531 * do not have to do it here. After identifying that we need an AST we 532 * drop the IPL to allow device interrupts. 533 * 534 * This code is complicated by the fact that sendsig may have been called 535 * necessitating a stack cleanup. 536 */ 537 538 ASGLOBAL(rei) 539 #ifdef DIAGNOSTIC 540 tstl _C_LABEL(panicstr) | have we paniced? 541 jne Ldorte | yes, do not make matters worse 542 #endif 543 tstl _C_LABEL(astpending) | AST pending? 544 jeq Ldorte | no, done 545 Lrei1: 546 btst #5,%sp@ | yes, are we returning to user mode? 547 jne Ldorte | no, done 548 movw #PSL_LOWIPL,%sr | lower SPL 549 clrl %sp@- | stack adjust 550 moveml #0xFFFF,%sp@- | save all registers 551 movl %usp,%a1 | including 552 movl %a1,%sp@(FR_SP) | the users SP 553 clrl %sp@- | VA == none 554 clrl %sp@- | code == none 555 movl #T_ASTFLT,%sp@- | type == async system trap 556 jbsr _C_LABEL(trap) | go handle it 557 lea %sp@(12),%sp | pop value args 558 movl %sp@(FR_SP),%a0 | restore user SP 559 movl %a0,%usp | from save area 560 movw %sp@(FR_ADJ),%d0 | need to adjust stack? 561 jne Laststkadj | yes, go to it 562 moveml %sp@+,#0x7FFF | no, restore most user regs 563 addql #8,%sp | toss SP and stack adjust 564 rte | and do real RTE 565 Laststkadj: 566 lea %sp@(FR_HW),%a1 | pointer to HW frame 567 addql #8,%a1 | source pointer 568 movl %a1,%a0 | source 569 addw %d0,%a0 | + hole size = dest pointer 570 movl %a1@-,%a0@- | copy 571 movl %a1@-,%a0@- | 8 bytes 572 movl %a0,%sp@(FR_SP) | new SSP 573 moveml %sp@+,#0x7FFF | restore user registers 574 movl %sp@,%sp | and our SP 575 Ldorte: 576 rte | real return 577 578 /* 579 * Initialization is at the beginning of this file, because the 580 * kernel entry point needs to be at zero for compatibility with 581 * the Sun boot loader. This works on Sun machines because the 582 * interrupt vector table for reset is NOT at address zero. 583 * (The MMU has a "boot" bit that forces access to the PROM) 584 */ 585 586 /* 587 * Use common m68k sigcode. 588 */ 589 #include <m68k/m68k/sigcode.s> 590 #ifdef COMPAT_SUNOS 591 #include <m68k/m68k/sunos_sigcode.s> 592 #endif 593 #ifdef COMPAT_SVR4 594 #include <m68k/m68k/svr4_sigcode.s> 595 #endif 596 597 .text 598 599 /* 600 * Primitives 601 */ 602 603 /* 604 * Use common m68k support routines. 605 */ 606 #include <m68k/m68k/support.s> 607 608 BSS(want_resched,4) 609 610 /* 611 * Use common m68k process manipulation routines. 612 */ 613 #include <m68k/m68k/proc_subr.s> 614 615 /* 616 * Use common m68k process/lwp switch and context save subroutines. 617 */ 618 #define FPCOPROC /* XXX: Temp. Reqd. */ 619 #include <m68k/m68k/switch_subr.s> 620 621 622 /* suline() */ 623 624 #ifdef DEBUG 625 .data 626 ASGLOBAL(fulltflush) 627 .long 0 628 ASGLOBAL(fullcflush) 629 .long 0 630 .text 631 #endif 632 633 ENTRY(ecacheon) 634 rts 635 636 ENTRY(ecacheoff) 637 rts 638 639 /* 640 * Get callers current SP value. 641 * Note that simply taking the address of a local variable in a C function 642 * doesn't work because callee saved registers may be outside the stack frame 643 * defined by A6 (e.g. GCC generated code). 644 * 645 * [I don't think the ENTRY() macro will do the right thing with this -- glass] 646 */ 647 GLOBAL(getsp) 648 movl %sp,%d0 | get current SP 649 addql #4,%d0 | compensate for return address 650 movl %d0,%a0 651 rts 652 653 ENTRY(getsfc) 654 movc %sfc,%d0 655 movl %d0,%a0 656 rts 657 658 ENTRY(getdfc) 659 movc %dfc,%d0 660 movl %d0,%a0 661 rts 662 663 ENTRY(getvbr) 664 movc %vbr,%d0 665 movl %d0,%a0 666 rts 667 668 ENTRY(setvbr) 669 movl %sp@(4),%d0 670 movc %d0,%vbr 671 rts 672 673 /* 674 * Load a new CPU Root Pointer (CRP) into the MMU. 675 * void loadcrp(struct mmu_rootptr *); 676 */ 677 ENTRY(loadcrp) 678 movl %sp@(4),%a0 | arg1: &CRP 679 movl #CACHE_CLR,%d0 680 movc %d0,%cacr | invalidate cache(s) 681 pflusha | flush entire TLB 682 pmove %a0@,%crp | load new user root pointer 683 rts 684 685 ENTRY(getcrp) 686 movl %sp@(4),%a0 | arg1: &crp 687 pmove %crp,%a0@ | *crpp = %crp 688 rts 689 690 /* 691 * Get the physical address of the PTE for a given VA. 692 */ 693 ENTRY(ptest_addr) 694 movl %sp@(4),%a1 | VA 695 ptestr #5,%a1@,#7,%a0 | %a0 = addr of PTE 696 movl %a0,%d0 | Result in %d0 (not a pointer return) 697 rts 698 699 /* 700 * Set processor priority level calls. Most are implemented with 701 * inline asm expansions. However, we need one instantiation here 702 * in case some non-optimized code makes external references. 703 * Most places will use the inlined functions param.h supplies. 704 */ 705 706 ENTRY(_getsr) 707 clrl %d0 708 movw %sr,%d0 709 movl %a1,%d0 710 rts 711 712 ENTRY(_spl) 713 clrl %d0 714 movw %sr,%d0 715 movl %sp@(4),%d1 716 movw %d1,%sr 717 rts 718 719 ENTRY(_splraise) 720 clrl %d0 721 movw %sr,%d0 722 movl %d0,%d1 723 andl #PSL_HIGHIPL,%d1 | old &= PSL_HIGHIPL 724 cmpl %sp@(4),%d1 | (old - new) 725 bge Lsplr 726 movl %sp@(4),%d1 727 movw %d1,%sr 728 Lsplr: 729 rts 730 731 /* 732 * Save and restore 68881 state. 733 */ 734 ENTRY(m68881_save) 735 movl %sp@(4),%a0 | save area pointer 736 fsave %a0@ | save state 737 tstb %a0@ | null state frame? 738 jeq Lm68881sdone | yes, all done 739 fmovem %fp0-%fp7,%a0@(FPF_REGS) | save FP general regs 740 fmovem %fpcr/%fpsr/%fpi,%a0@(FPF_FPCR) | save FP control regs 741 Lm68881sdone: 742 rts 743 744 ENTRY(m68881_restore) 745 movl %sp@(4),%a0 | save area pointer 746 tstb %a0@ | null state frame? 747 jeq Lm68881rdone | yes, easy 748 fmovem %a0@(FPF_FPCR),%fpcr/%fpsr/%fpi | restore FP control regs 749 fmovem %a0@(FPF_REGS),%fp0-%fp7 | restore FP general regs 750 Lm68881rdone: 751 frestore %a0@ | restore state 752 rts 753 754 /* 755 * _delay(unsigned N) 756 * Delay for at least (N/256) microseconds. 757 * This routine depends on the variable: delay_divisor 758 * which should be set based on the CPU clock rate. 759 * XXX: Currently this is set based on the CPU model, 760 * XXX: but this should be determined at run time... 761 */ 762 GLOBAL(_delay) 763 | %d0 = arg = (usecs << 8) 764 movl %sp@(4),%d0 765 | %d1 = delay_divisor; 766 movl _C_LABEL(delay_divisor),%d1 767 jra L_delay /* Jump into the loop! */ 768 769 /* 770 * Align the branch target of the loop to a half-line (8-byte) 771 * boundary to minimize cache effects. This guarantees both 772 * that there will be no prefetch stalls due to cache line burst 773 * operations and that the loop will run from a single cache 774 * half-line. 775 */ 776 #ifdef __ELF__ 777 .align 8 778 #else 779 .align 3 780 #endif 781 L_delay: 782 subl %d1,%d0 783 jgt L_delay 784 rts 785 786 | Define some addresses, mostly so DDB can print useful info. 787 | Not using _C_LABEL() here because these symbols are never 788 | referenced by any C code, and if the leading underscore 789 | ever goes away, these lines turn into syntax errors... 790 .set _KERNBASE,KERNBASE 791 .set _MONSTART,SUN3X_MONSTART 792 .set _PROM_BASE,SUN3X_PROM_BASE 793 .set _MONEND,SUN3X_MONEND 794 795 |The end! 796
Indexes created Sun Oct 12 09:09:55 GMT 2025