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pmap_pvt.h revision 1.12.8.1
      1  1.12.8.1     yamt /*	$NetBSD: pmap_pvt.h,v 1.12.8.1 2006/12/30 20:47:13 yamt Exp $	*/
      2       1.1      gwr 
      3       1.1      gwr /*-
      4       1.1      gwr  * Copyright (c) 1996 The NetBSD Foundation, Inc.
      5       1.1      gwr  * All rights reserved.
      6       1.1      gwr  *
      7       1.1      gwr  * This code is derived from software contributed to The NetBSD Foundation
      8       1.1      gwr  * by Jeremy Cooper.
      9       1.1      gwr  *
     10       1.1      gwr  * Redistribution and use in source and binary forms, with or without
     11       1.1      gwr  * modification, are permitted provided that the following conditions
     12       1.1      gwr  * are met:
     13       1.1      gwr  * 1. Redistributions of source code must retain the above copyright
     14       1.1      gwr  *    notice, this list of conditions and the following disclaimer.
     15       1.1      gwr  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.1      gwr  *    notice, this list of conditions and the following disclaimer in the
     17       1.1      gwr  *    documentation and/or other materials provided with the distribution.
     18       1.1      gwr  * 3. All advertising materials mentioning features or use of this software
     19       1.1      gwr  *    must display the following acknowledgement:
     20       1.1      gwr  *        This product includes software developed by the NetBSD
     21       1.1      gwr  *        Foundation, Inc. and its contributors.
     22       1.1      gwr  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23       1.1      gwr  *    contributors may be used to endorse or promote products derived
     24       1.1      gwr  *    from this software without specific prior written permission.
     25       1.1      gwr  *
     26       1.1      gwr  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27       1.1      gwr  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28       1.1      gwr  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29       1.1      gwr  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30       1.1      gwr  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31       1.1      gwr  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32       1.1      gwr  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33       1.1      gwr  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34       1.1      gwr  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35       1.1      gwr  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36       1.1      gwr  * POSSIBILITY OF SUCH DAMAGE.
     37       1.1      gwr  */
     38       1.1      gwr 
     39       1.1      gwr #ifndef _SUN3X_PMAPPVT_H
     40       1.1      gwr #define _SUN3X_PMAPPVT_H
     41      1.10   martin 
     42      1.10   martin #include "opt_pmap_debug.h"
     43       1.1      gwr 
     44       1.1      gwr /*************************** TMGR STRUCTURES ***************************
     45       1.1      gwr  * The sun3x 'tmgr' structures contain MMU tables and additional       *
     46       1.1      gwr  * information about their current usage and availability.             *
     47       1.1      gwr  ***********************************************************************/
     48       1.1      gwr typedef struct a_tmgr_struct a_tmgr_t;
     49       1.1      gwr typedef struct b_tmgr_struct b_tmgr_t;
     50       1.1      gwr typedef struct c_tmgr_struct c_tmgr_t;
     51       1.1      gwr 
     52       1.1      gwr /* A level A table manager contains a pointer to an MMU table of long
     53       1.1      gwr  * format table descriptors (an 'A' table), a pointer to the pmap
     54       1.1      gwr  * currently using the table, and the number of wired and active entries
     55       1.1      gwr  * it contains.
     56       1.1      gwr  */
     57       1.1      gwr struct a_tmgr_struct {
     58       1.1      gwr 	pmap_t		at_parent; /* pmap currently using this table    */
     59       1.1      gwr 	mmu_long_dte_t	*at_dtbl;  /* the MMU table being managed        */
     60      1.12      chs 	uint8_t         at_wcnt;   /* no. of wired entries in this table */
     61      1.12      chs 	uint8_t         at_ecnt;   /* no. of valid entries in this table */
     62      1.12      chs 	uint16_t	at_dum1;   /* structure padding                  */
     63      1.11  tsutsui 	TAILQ_ENTRY(a_tmgr_struct) at_link;  /* list linker              */
     64       1.1      gwr };
     65       1.1      gwr 
     66       1.1      gwr /* A level B table manager contains a pointer to an MMU table of
     67       1.1      gwr  * short format table descriptors (a 'B' table), a pointer to the level
     68       1.1      gwr  * A table manager currently using it, the index of this B table
     69       1.1      gwr  * within that parent A table, and the number of wired and active entries
     70       1.1      gwr  * it currently contains.
     71       1.1      gwr  */
     72       1.1      gwr struct b_tmgr_struct {
     73       1.1      gwr 	a_tmgr_t	*bt_parent; /* Parent 'A' table manager         */
     74       1.1      gwr 	mmu_short_dte_t *bt_dtbl;   /* the MMU table being managed      */
     75      1.12      chs 	uint8_t		bt_pidx;    /* this table's index in the parent */
     76      1.12      chs 	uint8_t		bt_wcnt;    /* no. of wired entries in table    */
     77      1.12      chs 	uint8_t		bt_ecnt;    /* no. of valid entries in table    */
     78      1.12      chs 	uint8_t		bt_dum1;    /* structure padding                */
     79       1.1      gwr     	TAILQ_ENTRY(b_tmgr_struct) bt_link; /* list linker              */
     80       1.1      gwr };
     81       1.1      gwr 
     82       1.1      gwr /* A level 'C' table manager consists of pointer to an MMU table of short
     83       1.1      gwr  * format page descriptors (a 'C' table), a pointer to the level B table
     84       1.1      gwr  * manager currently using it, and the number of wired and active pages
     85       1.1      gwr  * it currently contains.
     86       1.6   jeremy  *
     87       1.6   jeremy  * Additionally, the table manager contains a pointer to the pmap
     88       1.6   jeremy  * that is currently using it and the starting virtual address of the
     89       1.6   jeremy  * range that the MMU table manages.  These two items can be obtained
     90       1.6   jeremy  * through the traversal of other table manager structures, but having
     91       1.6   jeremy  * them close at hand helps speed up operations in the PV system.
     92       1.1      gwr  */
     93       1.1      gwr struct c_tmgr_struct {
     94       1.1      gwr 	b_tmgr_t	*ct_parent; /* Parent 'B' table manager         */
     95       1.1      gwr 	mmu_short_pte_t	*ct_dtbl;   /* the MMU table being managed      */
     96      1.12      chs 	uint8_t		ct_pidx;    /* this table's index in the parent */
     97      1.12      chs 	uint8_t		ct_wcnt;    /* no. of wired entries in table    */
     98      1.12      chs 	uint8_t		ct_ecnt;    /* no. of valid entries in table    */
     99      1.12      chs 	uint8_t		ct_dum1;    /* structure padding                */
    100       1.1      gwr 	TAILQ_ENTRY(c_tmgr_struct) ct_link; /* list linker              */
    101       1.1      gwr #define	MMU_SHORT_PTE_WIRED	MMU_SHORT_PTE_UN1
    102       1.1      gwr #define MMU_PTE_WIRED		((*pte)->attr.raw & MMU_SHORT_PTE_WIRED)
    103       1.6   jeremy 	pmap_t		ct_pmap;    /* pmap currently using this table  */
    104       1.9  tsutsui 	vaddr_t		ct_va;      /* starting va that this table maps */
    105       1.1      gwr };
    106       1.1      gwr 
    107       1.1      gwr /* The Mach VM code requires that the pmap module be able to apply
    108       1.1      gwr  * several different operations on all page descriptors that map to a
    109       1.1      gwr  * given physical address.  A few of these are:
    110       1.1      gwr  *  + invalidate all mappings to a page.
    111       1.1      gwr  *  + change the type of protection on all mappings to a page.
    112       1.1      gwr  *  + determine if a physical page has been written to
    113       1.1      gwr  *  + determine if a physical page has been accessed (read from)
    114       1.1      gwr  *  + clear such information
    115       1.1      gwr  * The collection of structures and tables which we used to make this
    116       1.1      gwr  * possible is known as the 'Physical to Virtual' or 'PV' system.
    117       1.1      gwr  *
    118       1.1      gwr  * Every physical page of memory managed by the virtual memory system
    119       1.1      gwr  * will have a structure which describes whether or not it has been
    120       1.1      gwr  * modified or referenced, and contains a list of page descriptors that
    121       1.1      gwr  * are currently mapped to it (if any).  This array of structures is
    122       1.1      gwr  * known as the 'PV' list.
    123       1.1      gwr  *
    124       1.2      gwr  ** Old PV Element structure
    125       1.1      gwr  * To keep a list of page descriptors currently using the page, another
    126       1.1      gwr  * structure had to be invented.  Its sole purpose is to be a link in
    127       1.1      gwr  * a chain of such structures.  No other information is contained within
    128       1.1      gwr  * the structure however!  The other piece of information it holds is
    129       1.1      gwr  * hidden within its address.  By maintaining a one-to-one correspondence
    130       1.1      gwr  * of page descriptors in the system and such structures, this address can
    131       1.1      gwr  * readily be translated into its associated page descriptor by using a
    132       1.1      gwr  * simple macro.  This bizzare structure is simply known as a 'PV
    133       1.1      gwr  * Element', or 'pve' for short.
    134       1.2      gwr  *
    135       1.2      gwr  ** New PV Element structure
    136       1.2      gwr  * To keep a list of page descriptors currently using the page, another
    137       1.2      gwr  * structure had to be invented.  Its sole purpose is to indicate the index
    138       1.2      gwr  * of the next PTE currently referencing the page.  By maintaining a one-to-
    139       1.2      gwr  * one correspondence of page descriptors in the system and such structures,
    140       1.2      gwr  * this same index is also the index of the next PV element, which describes
    141       1.2      gwr  * the index of yet another page mapped to the same address and so on.  The
    142       1.2      gwr  * special index 'PVE_EOL' is used to represent the end of the list.
    143       1.1      gwr  */
    144       1.1      gwr struct pv_struct {
    145       1.2      gwr 	u_short	pv_idx;		/* Index of PTE using this page */
    146       1.2      gwr 	u_short	pv_flags;	/* Physical page status flags */
    147       1.1      gwr #define PV_FLAGS_USED	MMU_SHORT_PTE_USED
    148       1.1      gwr #define PV_FLAGS_MDFY	MMU_SHORT_PTE_M
    149       1.1      gwr };
    150       1.1      gwr typedef struct pv_struct pv_t;
    151       1.1      gwr 
    152       1.1      gwr struct pv_elem_struct {
    153       1.2      gwr 	u_short	pve_next;
    154       1.2      gwr #define	PVE_EOL	0xffff		/* End-of-list marker */
    155       1.1      gwr };
    156       1.1      gwr typedef struct pv_elem_struct pv_elem_t;
    157       1.1      gwr 
    158       1.1      gwr /* Physical memory on the 3/80 is not contiguous.  The ROM Monitor
    159       1.1      gwr  * provides us with a linked list of memory segments describing each
    160       1.1      gwr  * segment with its base address and its size.
    161       1.1      gwr  */
    162       1.1      gwr struct pmap_physmem_struct {
    163       1.9  tsutsui 	paddr_t		pmem_start;  /* Starting physical address      */
    164       1.9  tsutsui 	paddr_t		pmem_end;    /* First byte outside of range    */
    165       1.1      gwr 	int             pmem_pvbase; /* Offset within the pv list      */
    166       1.1      gwr 	struct pmap_physmem_struct *pmem_next; /* Next block of memory */
    167       1.1      gwr };
    168       1.1      gwr 
    169       1.1      gwr /* These are defined in pmap.c */
    170       1.1      gwr extern struct pmap_physmem_struct avail_mem[];
    171       1.1      gwr 
    172  1.12.8.1     yamt #endif /* _SUN3X_PMAPPVT_H */
    173