pmap_pvt.h revision 1.11.8.1
1 /* $NetBSD: pmap_pvt.h,v 1.11.8.1 2005/04/29 11:28:27 kent Exp $ */ 2 3 /*- 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jeremy Cooper. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #ifndef _SUN3X_PMAPPVT_H 40 #define _SUN3X_PMAPPVT_H 41 42 #include "opt_pmap_debug.h" 43 44 /*************************** TMGR STRUCTURES *************************** 45 * The sun3x 'tmgr' structures contain MMU tables and additional * 46 * information about their current usage and availability. * 47 ***********************************************************************/ 48 typedef struct a_tmgr_struct a_tmgr_t; 49 typedef struct b_tmgr_struct b_tmgr_t; 50 typedef struct c_tmgr_struct c_tmgr_t; 51 52 /* A level A table manager contains a pointer to an MMU table of long 53 * format table descriptors (an 'A' table), a pointer to the pmap 54 * currently using the table, and the number of wired and active entries 55 * it contains. 56 */ 57 struct a_tmgr_struct { 58 pmap_t at_parent; /* pmap currently using this table */ 59 mmu_long_dte_t *at_dtbl; /* the MMU table being managed */ 60 uint8_t at_wcnt; /* no. of wired entries in this table */ 61 uint8_t at_ecnt; /* no. of valid entries in this table */ 62 uint16_t at_dum1; /* structure padding */ 63 TAILQ_ENTRY(a_tmgr_struct) at_link; /* list linker */ 64 }; 65 66 /* A level B table manager contains a pointer to an MMU table of 67 * short format table descriptors (a 'B' table), a pointer to the level 68 * A table manager currently using it, the index of this B table 69 * within that parent A table, and the number of wired and active entries 70 * it currently contains. 71 */ 72 struct b_tmgr_struct { 73 a_tmgr_t *bt_parent; /* Parent 'A' table manager */ 74 mmu_short_dte_t *bt_dtbl; /* the MMU table being managed */ 75 uint8_t bt_pidx; /* this table's index in the parent */ 76 uint8_t bt_wcnt; /* no. of wired entries in table */ 77 uint8_t bt_ecnt; /* no. of valid entries in table */ 78 uint8_t bt_dum1; /* structure padding */ 79 TAILQ_ENTRY(b_tmgr_struct) bt_link; /* list linker */ 80 }; 81 82 /* A level 'C' table manager consists of pointer to an MMU table of short 83 * format page descriptors (a 'C' table), a pointer to the level B table 84 * manager currently using it, and the number of wired and active pages 85 * it currently contains. 86 * 87 * Additionally, the table manager contains a pointer to the pmap 88 * that is currently using it and the starting virtual address of the 89 * range that the MMU table manages. These two items can be obtained 90 * through the traversal of other table manager structures, but having 91 * them close at hand helps speed up operations in the PV system. 92 */ 93 struct c_tmgr_struct { 94 b_tmgr_t *ct_parent; /* Parent 'B' table manager */ 95 mmu_short_pte_t *ct_dtbl; /* the MMU table being managed */ 96 uint8_t ct_pidx; /* this table's index in the parent */ 97 uint8_t ct_wcnt; /* no. of wired entries in table */ 98 uint8_t ct_ecnt; /* no. of valid entries in table */ 99 uint8_t ct_dum1; /* structure padding */ 100 TAILQ_ENTRY(c_tmgr_struct) ct_link; /* list linker */ 101 #define MMU_SHORT_PTE_WIRED MMU_SHORT_PTE_UN1 102 #define MMU_PTE_WIRED ((*pte)->attr.raw & MMU_SHORT_PTE_WIRED) 103 pmap_t ct_pmap; /* pmap currently using this table */ 104 vaddr_t ct_va; /* starting va that this table maps */ 105 }; 106 107 /* The Mach VM code requires that the pmap module be able to apply 108 * several different operations on all page descriptors that map to a 109 * given physical address. A few of these are: 110 * + invalidate all mappings to a page. 111 * + change the type of protection on all mappings to a page. 112 * + determine if a physical page has been written to 113 * + determine if a physical page has been accessed (read from) 114 * + clear such information 115 * The collection of structures and tables which we used to make this 116 * possible is known as the 'Physical to Virtual' or 'PV' system. 117 * 118 * Every physical page of memory managed by the virtual memory system 119 * will have a structure which describes whether or not it has been 120 * modified or referenced, and contains a list of page descriptors that 121 * are currently mapped to it (if any). This array of structures is 122 * known as the 'PV' list. 123 * 124 ** Old PV Element structure 125 * To keep a list of page descriptors currently using the page, another 126 * structure had to be invented. Its sole purpose is to be a link in 127 * a chain of such structures. No other information is contained within 128 * the structure however! The other piece of information it holds is 129 * hidden within its address. By maintaining a one-to-one correspondence 130 * of page descriptors in the system and such structures, this address can 131 * readily be translated into its associated page descriptor by using a 132 * simple macro. This bizzare structure is simply known as a 'PV 133 * Element', or 'pve' for short. 134 * 135 ** New PV Element structure 136 * To keep a list of page descriptors currently using the page, another 137 * structure had to be invented. Its sole purpose is to indicate the index 138 * of the next PTE currently referencing the page. By maintaining a one-to- 139 * one correspondence of page descriptors in the system and such structures, 140 * this same index is also the index of the next PV element, which describes 141 * the index of yet another page mapped to the same address and so on. The 142 * special index 'PVE_EOL' is used to represent the end of the list. 143 */ 144 struct pv_struct { 145 u_short pv_idx; /* Index of PTE using this page */ 146 u_short pv_flags; /* Physical page status flags */ 147 #define PV_FLAGS_USED MMU_SHORT_PTE_USED 148 #define PV_FLAGS_MDFY MMU_SHORT_PTE_M 149 }; 150 typedef struct pv_struct pv_t; 151 152 struct pv_elem_struct { 153 u_short pve_next; 154 #define PVE_EOL 0xffff /* End-of-list marker */ 155 }; 156 typedef struct pv_elem_struct pv_elem_t; 157 158 /* Physical memory on the 3/80 is not contiguous. The ROM Monitor 159 * provides us with a linked list of memory segments describing each 160 * segment with its base address and its size. 161 */ 162 struct pmap_physmem_struct { 163 paddr_t pmem_start; /* Starting physical address */ 164 paddr_t pmem_end; /* First byte outside of range */ 165 int pmem_pvbase; /* Offset within the pv list */ 166 struct pmap_physmem_struct *pmem_next; /* Next block of memory */ 167 }; 168 169 /* Internal function definitions. */ 170 a_tmgr_t *get_a_table(void); 171 b_tmgr_t *get_b_table(void); 172 c_tmgr_t *get_c_table(void); 173 int free_a_table(a_tmgr_t *, boolean_t); 174 int free_b_table(b_tmgr_t *, boolean_t); 175 int free_c_table(c_tmgr_t *, boolean_t); 176 void pmap_bootstrap_aalign(int); 177 void pmap_alloc_usermmu(void); 178 void pmap_alloc_usertmgr(void); 179 void pmap_alloc_pv(void); 180 void pmap_init_a_tables(void); 181 void pmap_init_b_tables(void); 182 void pmap_init_c_tables(void); 183 void pmap_init_pv(void); 184 void pmap_clear_pv(paddr_t, int); 185 boolean_t pmap_remove_a(a_tmgr_t *, vaddr_t, vaddr_t); 186 boolean_t pmap_remove_b(b_tmgr_t *, vaddr_t, vaddr_t); 187 boolean_t pmap_remove_c(c_tmgr_t *, vaddr_t, vaddr_t); 188 void pmap_remove_pte(mmu_short_pte_t *); 189 void pmap_enter_kernel(vaddr_t, paddr_t, vm_prot_t); 190 void pmap_remove_kernel(vaddr_t, vaddr_t); 191 void pmap_protect_kernel(vaddr_t, vaddr_t, vm_prot_t); 192 boolean_t pmap_extract_kernel(vaddr_t, paddr_t *); 193 vaddr_t pmap_get_pteinfo(u_int, pmap_t *, c_tmgr_t **); 194 void pmap_pinit(pmap_t); 195 int pmap_dereference(pmap_t); 196 boolean_t is_managed(paddr_t); 197 boolean_t pmap_stroll(pmap_t, vaddr_t, a_tmgr_t **, b_tmgr_t **, c_tmgr_t **, 198 mmu_short_pte_t **, int *, int *, int *); 199 void pmap_bootstrap_copyprom(void); 200 void pmap_takeover_mmu(void); 201 void pmap_bootstrap_setprom(void); 202 203 #ifdef PMAP_DEBUG 204 /* Debugging function definitions */ 205 void pv_list(paddr_t, int); 206 #endif /* PMAP_DEBUG */ 207 208 /* These are defined in pmap.c */ 209 extern struct pmap_physmem_struct avail_mem[]; 210 211 #endif /* _SUN3X_MYPMAP_H */ 212
Indexes created Sun Oct 26 21:10:03 GMT 2025