intr.h revision 1.20 1 1.20 tsutsui /* $NetBSD: intr.h,v 1.20 2008/06/22 17:34:25 tsutsui Exp $ */
2 1.1 fredette
3 1.1 fredette /*
4 1.1 fredette * Copyright (c) 2001 Matt Fredette.
5 1.1 fredette * Copyright (c) 1998 Matt Thomas.
6 1.1 fredette * All rights reserved.
7 1.1 fredette *
8 1.1 fredette * Redistribution and use in source and binary forms, with or without
9 1.1 fredette * modification, are permitted provided that the following conditions
10 1.1 fredette * are met:
11 1.1 fredette * 1. Redistributions of source code must retain the above copyright
12 1.1 fredette * notice, this list of conditions and the following disclaimer.
13 1.1 fredette * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 fredette * notice, this list of conditions and the following disclaimer in the
15 1.1 fredette * documentation and/or other materials provided with the distribution.
16 1.1 fredette * 3. The name of the company nor the names of the authors may be used to
17 1.1 fredette * endorse or promote products derived from this software without specific
18 1.1 fredette * prior written permission.
19 1.1 fredette *
20 1.1 fredette * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR IMPLIED
21 1.1 fredette * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
22 1.1 fredette * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 1.1 fredette * IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
24 1.1 fredette * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
25 1.1 fredette * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
26 1.1 fredette * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 1.1 fredette * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 1.1 fredette * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 1.1 fredette * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 1.1 fredette * SUCH DAMAGE.
31 1.1 fredette */
32 1.1 fredette
33 1.1 fredette #ifndef _SUN68K_INTR_H_
34 1.1 fredette #define _SUN68K_INTR_H_
35 1.1 fredette
36 1.1 fredette #include <sys/queue.h>
37 1.3 chs #include <m68k/psl.h>
38 1.1 fredette
39 1.1 fredette /*
40 1.10 yamt * Interrupt levels.
41 1.1 fredette */
42 1.10 yamt #define IPL_NONE 0
43 1.10 yamt #define IPL_SOFTCLOCK 1
44 1.16 ad #define IPL_SOFTBIO 2
45 1.16 ad #define IPL_SOFTNET 3
46 1.16 ad #define IPL_SOFTSERIAL 4
47 1.16 ad #define IPL_VM 5
48 1.16 ad #define IPL_SCHED 6
49 1.16 ad #define IPL_HIGH 7
50 1.19 tsutsui #define NIPL 8
51 1.10 yamt
52 1.1 fredette #define _IPL_SOFT_LEVEL1 1
53 1.1 fredette #define _IPL_SOFT_LEVEL2 2
54 1.1 fredette #define _IPL_SOFT_LEVEL3 3
55 1.1 fredette #define _IPL_SOFT_LEVEL_MIN 1
56 1.1 fredette #define _IPL_SOFT_LEVEL_MAX 3
57 1.7 yamt
58 1.10 yamt #ifdef _KERNEL
59 1.10 yamt
60 1.18 tsutsui extern int idepth;
61 1.20 tsutsui
62 1.20 tsutsui static inline bool
63 1.20 tsutsui cpu_intr_p(void)
64 1.20 tsutsui {
65 1.20 tsutsui
66 1.20 tsutsui return idepth != 0;
67 1.20 tsutsui }
68 1.20 tsutsui
69 1.19 tsutsui extern const uint16_t ipl2psl_table[NIPL];
70 1.18 tsutsui
71 1.10 yamt typedef int ipl_t;
72 1.10 yamt typedef struct {
73 1.13 thorpej uint16_t _psl;
74 1.10 yamt } ipl_cookie_t;
75 1.10 yamt
76 1.19 tsutsui static inline ipl_cookie_t
77 1.19 tsutsui makeiplcookie(ipl_t ipl)
78 1.19 tsutsui {
79 1.19 tsutsui
80 1.19 tsutsui return (ipl_cookie_t){._psl = ipl2psl_table[ipl]};
81 1.19 tsutsui }
82 1.10 yamt
83 1.10 yamt static inline int
84 1.10 yamt splraiseipl(ipl_cookie_t icookie)
85 1.10 yamt {
86 1.10 yamt
87 1.10 yamt return _splraise(icookie._psl);
88 1.10 yamt }
89 1.1 fredette
90 1.1 fredette /* These connect interrupt handlers. */
91 1.2 chs typedef int (*isr_func_t)(void *);
92 1.9 tsutsui void isr_add_autovect(isr_func_t, void *, int);
93 1.9 tsutsui void isr_add_vectored(isr_func_t, void *, int, int);
94 1.9 tsutsui void isr_add_custom(int, void *);
95 1.1 fredette
96 1.3 chs /*
97 1.3 chs * Define inline functions for PSL manipulation.
98 1.3 chs * These are as close to macros as one can get.
99 1.3 chs * When not optimizing gcc will call the locore.s
100 1.3 chs * functions by the same names, so breakpoints on
101 1.3 chs * these functions will work normally, etc.
102 1.3 chs * (See the GCC extensions info document.)
103 1.3 chs */
104 1.3 chs
105 1.6 perry static __inline int _getsr(void);
106 1.3 chs
107 1.3 chs /* Get current sr value. */
108 1.6 perry static __inline int
109 1.3 chs _getsr(void)
110 1.3 chs {
111 1.3 chs int rv;
112 1.3 chs
113 1.5 perry __asm volatile ("clrl %0; movew %%sr,%0" : "=&d" (rv));
114 1.3 chs return (rv);
115 1.3 chs }
116 1.3 chs
117 1.3 chs /*
118 1.3 chs * The rest of this is sun68k specific, because other ports may
119 1.3 chs * need to do special things in spl0() (i.e. simulate SIR).
120 1.3 chs * Suns have a REAL interrupt register, so spl0() and splx(s)
121 1.3 chs * have no need to check for any simulated interrupts, etc.
122 1.3 chs */
123 1.3 chs
124 1.3 chs #define spl0() _spl0() /* we have real software interrupts */
125 1.3 chs #define splx(x) _spl(x)
126 1.3 chs
127 1.3 chs /* IPL used by soft interrupts: netintr(), softclock() */
128 1.10 yamt #define splsoftclock() splraise1()
129 1.16 ad #define splsoftbio() splraise1()
130 1.10 yamt #define splsoftnet() splraise1()
131 1.10 yamt #define splsoftserial() splraise3()
132 1.10 yamt
133 1.10 yamt /*
134 1.10 yamt * Note that the VM code runs at spl7 during kernel
135 1.10 yamt * initialization, and later at spl0, so we have to
136 1.10 yamt * use splraise to avoid enabling interrupts early.
137 1.10 yamt */
138 1.14 tsutsui #define splvm() splraise4()
139 1.10 yamt
140 1.3 chs /* Zilog Serial hardware interrupts (hard-wired at 6) */
141 1.17 tsutsui #define splzs() splserial()
142 1.15 ad #define IPL_ZS IPL_SERIAL
143 1.10 yamt
144 1.10 yamt /* Block out all interrupts (except NMI of course). */
145 1.10 yamt #define splhigh() spl7()
146 1.10 yamt #define splsched() spl7()
147 1.3 chs
148 1.3 chs /* This returns true iff the spl given is spl0. */
149 1.3 chs #define is_spl0(s) (((s) & PSL_IPL7) == 0)
150 1.3 chs
151 1.3 chs #endif /* _KERNEL */
152 1.3 chs
153 1.1 fredette #endif /* _SUN68K_INTR_H */
154