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intr.h revision 1.7
      1  1.7      yamt /*	$NetBSD: intr.h,v 1.7 2006/03/29 08:55:40 yamt Exp $	*/
      2  1.1  fredette 
      3  1.1  fredette /*
      4  1.1  fredette  * Copyright (c) 2001 Matt Fredette.
      5  1.1  fredette  * Copyright (c) 1998 Matt Thomas.
      6  1.1  fredette  * All rights reserved.
      7  1.1  fredette  *
      8  1.1  fredette  * Redistribution and use in source and binary forms, with or without
      9  1.1  fredette  * modification, are permitted provided that the following conditions
     10  1.1  fredette  * are met:
     11  1.1  fredette  * 1. Redistributions of source code must retain the above copyright
     12  1.1  fredette  *    notice, this list of conditions and the following disclaimer.
     13  1.1  fredette  * 2. Redistributions in binary form must reproduce the above copyright
     14  1.1  fredette  *    notice, this list of conditions and the following disclaimer in the
     15  1.1  fredette  *    documentation and/or other materials provided with the distribution.
     16  1.1  fredette  * 3. The name of the company nor the names of the authors may be used to
     17  1.1  fredette  *    endorse or promote products derived from this software without specific
     18  1.1  fredette  *    prior written permission.
     19  1.1  fredette  *
     20  1.1  fredette  * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR IMPLIED
     21  1.1  fredette  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     22  1.1  fredette  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     23  1.1  fredette  * IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     24  1.1  fredette  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     25  1.1  fredette  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     26  1.1  fredette  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     27  1.1  fredette  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     28  1.1  fredette  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     29  1.1  fredette  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     30  1.1  fredette  * SUCH DAMAGE.
     31  1.1  fredette  */
     32  1.1  fredette 
     33  1.1  fredette #ifndef _SUN68K_INTR_H_
     34  1.1  fredette #define _SUN68K_INTR_H_
     35  1.1  fredette 
     36  1.1  fredette #include <sys/queue.h>
     37  1.3       chs #include <m68k/psl.h>
     38  1.1  fredette 
     39  1.1  fredette /*
     40  1.1  fredette  * Interrupt levels.  Right now these correspond to real
     41  1.1  fredette  * hardware levels, but I don't think anything counts on
     42  1.1  fredette  * that (yet?).
     43  1.1  fredette  */
     44  1.1  fredette #define _IPL_SOFT_LEVEL1	1
     45  1.1  fredette #define _IPL_SOFT_LEVEL2	2
     46  1.1  fredette #define _IPL_SOFT_LEVEL3	3
     47  1.1  fredette #define _IPL_SOFT_LEVEL_MIN	1
     48  1.1  fredette #define _IPL_SOFT_LEVEL_MAX	3
     49  1.7      yamt 
     50  1.7      yamt #define	IPL_NONE	0
     51  1.7      yamt #define	IPL_SOFTCLOCK	(PSL_S|PSL_IPL1)
     52  1.7      yamt #define	IPL_SOFTNET	(PSL_S|PSL_IPL1)
     53  1.7      yamt #define	IPL_BIO		(PSL_S|PSL_IPL2)
     54  1.7      yamt #define	IPL_NET		(PSL_S|PSL_IPL3)
     55  1.7      yamt #define	IPL_SOFTSERIAL	(PSL_S|PSL_IPL3)
     56  1.7      yamt #define	IPL_TTY		(PSL_S|PSL_IPL4)
     57  1.7      yamt #define	IPL_VM		(PSL_S|PSL_IPL4)
     58  1.7      yamt /* Intersil or Am9513 clock hardware interrupts (hard-wired at 5) */
     59  1.7      yamt #define	IPL_CLOCK	(PSL_S|PSL_IPL5)
     60  1.7      yamt #define	IPL_STATCLOCK	IPL_CLOCK
     61  1.7      yamt #define	IPL_SCHED	(PSL_S|PSL_IPL7)
     62  1.7      yamt #define	IPL_HIGH	(PSL_S|PSL_IPL7)
     63  1.7      yamt #define	IPL_LOCK	(PSL_S|PSL_IPL7)
     64  1.7      yamt #define	IPL_SERIAL	(PSL_S|PSL_IPL6)
     65  1.1  fredette 
     66  1.1  fredette #ifdef _KERNEL
     67  1.1  fredette LIST_HEAD(sh_head, softintr_handler);
     68  1.1  fredette 
     69  1.1  fredette struct softintr_head {
     70  1.1  fredette 	int shd_ipl;
     71  1.1  fredette 	struct sh_head shd_intrs;
     72  1.1  fredette };
     73  1.1  fredette 
     74  1.1  fredette struct softintr_handler {
     75  1.1  fredette 	struct softintr_head *sh_head;
     76  1.1  fredette 	LIST_ENTRY(softintr_handler) sh_link;
     77  1.1  fredette 	void (*sh_func)(void *);
     78  1.1  fredette 	void *sh_arg;
     79  1.1  fredette 	int sh_pending;
     80  1.1  fredette };
     81  1.1  fredette 
     82  1.2       chs extern void softintr_init(void);
     83  1.2       chs extern void *softintr_establish(int, void (*)(void *), void *);
     84  1.2       chs extern void softintr_disestablish(void *);
     85  1.1  fredette 
     86  1.6     perry static __inline void
     87  1.1  fredette softintr_schedule(void *arg)
     88  1.1  fredette {
     89  1.1  fredette 	struct softintr_handler * const sh = arg;
     90  1.1  fredette 	if (sh->sh_pending == 0) {
     91  1.1  fredette 		sh->sh_pending = 1;
     92  1.1  fredette 		isr_soft_request(sh->sh_head->shd_ipl);
     93  1.1  fredette 	}
     94  1.1  fredette }
     95  1.1  fredette 
     96  1.1  fredette /* These connect interrupt handlers. */
     97  1.2       chs typedef int (*isr_func_t)(void *);
     98  1.2       chs extern void isr_add_autovect(isr_func_t, void *, int);
     99  1.2       chs extern void isr_add_vectored(isr_func_t, void *, int, int);
    100  1.2       chs extern void isr_add_custom(int, void *);
    101  1.1  fredette 
    102  1.3       chs /*
    103  1.3       chs  * Define inline functions for PSL manipulation.
    104  1.3       chs  * These are as close to macros as one can get.
    105  1.3       chs  * When not optimizing gcc will call the locore.s
    106  1.3       chs  * functions by the same names, so breakpoints on
    107  1.3       chs  * these functions will work normally, etc.
    108  1.3       chs  * (See the GCC extensions info document.)
    109  1.3       chs  */
    110  1.3       chs 
    111  1.6     perry static __inline int _getsr(void);
    112  1.3       chs 
    113  1.3       chs /* Get current sr value. */
    114  1.6     perry static __inline int
    115  1.3       chs _getsr(void)
    116  1.3       chs {
    117  1.3       chs 	int rv;
    118  1.3       chs 
    119  1.5     perry 	__asm volatile ("clrl %0; movew %%sr,%0" : "=&d" (rv));
    120  1.3       chs 	return (rv);
    121  1.3       chs }
    122  1.3       chs 
    123  1.3       chs /*
    124  1.3       chs  * The rest of this is sun68k specific, because other ports may
    125  1.3       chs  * need to do special things in spl0() (i.e. simulate SIR).
    126  1.3       chs  * Suns have a REAL interrupt register, so spl0() and splx(s)
    127  1.3       chs  * have no need to check for any simulated interrupts, etc.
    128  1.3       chs  */
    129  1.3       chs 
    130  1.3       chs #define spl0()  _spl0()		/* we have real software interrupts */
    131  1.3       chs #define splx(x)	_spl(x)
    132  1.3       chs 
    133  1.3       chs /* IPL used by soft interrupts: netintr(), softclock() */
    134  1.3       chs #define	spllowersoftclock() spl1()
    135  1.3       chs 
    136  1.3       chs /* Zilog Serial hardware interrupts (hard-wired at 6) */
    137  1.3       chs #define splzs()		spl6()
    138  1.3       chs 
    139  1.3       chs /* This returns true iff the spl given is spl0. */
    140  1.3       chs #define	is_spl0(s)	(((s) & PSL_IPL7) == 0)
    141  1.3       chs 
    142  1.7      yamt #define	splraiseipl(x)	_splraise(x)
    143  1.7      yamt 
    144  1.7      yamt #include <sys/spl.h>
    145  1.7      yamt 
    146  1.3       chs #endif	/* _KERNEL */
    147  1.3       chs 
    148  1.1  fredette #endif	/* _SUN68K_INTR_H */
    149