Home | History | Annotate | Line # | Download | only in include
intr.h revision 1.3 
      1 /*	$NetBSD: intr.h,v 1.3 2005/01/23 17:27:04 chs Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2001 Matt Fredette.
      5  * Copyright (c) 1998 Matt Thomas.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. The name of the company nor the names of the authors may be used to
     17  *    endorse or promote products derived from this software without specific
     18  *    prior written permission.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR IMPLIED
     21  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     22  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     23  * IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     24  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     25  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     26  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     30  * SUCH DAMAGE.
     31  */
     32 
     33 #ifndef _SUN68K_INTR_H_
     34 #define _SUN68K_INTR_H_
     35 
     36 #include <sys/queue.h>
     37 #include <m68k/psl.h>
     38 
     39 /*
     40  * Interrupt levels.  Right now these correspond to real
     41  * hardware levels, but I don't think anything counts on
     42  * that (yet?).
     43  */
     44 #define _IPL_SOFT_LEVEL1	1
     45 #define _IPL_SOFT_LEVEL2	2
     46 #define _IPL_SOFT_LEVEL3	3
     47 #define _IPL_SOFT_LEVEL_MIN	1
     48 #define _IPL_SOFT_LEVEL_MAX	3
     49 #define IPL_SOFTNET  		_IPL_SOFT_LEVEL1
     50 #define IPL_SOFTCLOCK		_IPL_SOFT_LEVEL1
     51 #define IPL_SOFTSERIAL		_IPL_SOFT_LEVEL3
     52 #define	IPL_BIO			2
     53 #define	IPL_NET			3
     54 #define	IPL_CLOCK		5
     55 #define	IPL_SERIAL		6
     56 
     57 #ifdef _KERNEL
     58 LIST_HEAD(sh_head, softintr_handler);
     59 
     60 struct softintr_head {
     61 	int shd_ipl;
     62 	struct sh_head shd_intrs;
     63 };
     64 
     65 struct softintr_handler {
     66 	struct softintr_head *sh_head;
     67 	LIST_ENTRY(softintr_handler) sh_link;
     68 	void (*sh_func)(void *);
     69 	void *sh_arg;
     70 	int sh_pending;
     71 };
     72 
     73 extern void softintr_init(void);
     74 extern void *softintr_establish(int, void (*)(void *), void *);
     75 extern void softintr_disestablish(void *);
     76 
     77 static __inline void
     78 softintr_schedule(void *arg)
     79 {
     80 	struct softintr_handler * const sh = arg;
     81 	if (sh->sh_pending == 0) {
     82 		sh->sh_pending = 1;
     83 		isr_soft_request(sh->sh_head->shd_ipl);
     84 	}
     85 }
     86 
     87 /* These connect interrupt handlers. */
     88 typedef int (*isr_func_t)(void *);
     89 extern void isr_add_autovect(isr_func_t, void *, int);
     90 extern void isr_add_vectored(isr_func_t, void *, int, int);
     91 extern void isr_add_custom(int, void *);
     92 
     93 /*
     94  * Define inline functions for PSL manipulation.
     95  * These are as close to macros as one can get.
     96  * When not optimizing gcc will call the locore.s
     97  * functions by the same names, so breakpoints on
     98  * these functions will work normally, etc.
     99  * (See the GCC extensions info document.)
    100  */
    101 
    102 static __inline int _getsr(void);
    103 
    104 /* Get current sr value. */
    105 static __inline int
    106 _getsr(void)
    107 {
    108 	int rv;
    109 
    110 	__asm __volatile ("clrl %0; movew %%sr,%0" : "=&d" (rv));
    111 	return (rv);
    112 }
    113 
    114 /*
    115  * The rest of this is sun68k specific, because other ports may
    116  * need to do special things in spl0() (i.e. simulate SIR).
    117  * Suns have a REAL interrupt register, so spl0() and splx(s)
    118  * have no need to check for any simulated interrupts, etc.
    119  */
    120 
    121 #define spl0()  _spl0()		/* we have real software interrupts */
    122 #define splx(x)	_spl(x)
    123 
    124 /* IPL used by soft interrupts: netintr(), softclock() */
    125 #define	spllowersoftclock() spl1()
    126 #define splsoftclock()  splraise1()
    127 #define splsoftnet()    splraise1()
    128 
    129 /* Highest block device (strategy) IPL. */
    130 #define splbio()        splraise2()
    131 
    132 /* Highest network interface IPL. */
    133 #define splnet()        splraise3()
    134 
    135 /* Highest tty device IPL. */
    136 #define spltty()        splraise4()
    137 
    138 /*
    139  * Requirement: imp >= (highest network, tty, or disk IPL)
    140  * This is used mostly in the VM code.
    141  * Note that the VM code runs at spl7 during kernel
    142  * initialization, and later at spl0, so we have to
    143  * use splraise to avoid enabling interrupts early.
    144  */
    145 #define splvm()         _splraise(PSL_S|PSL_IPL4)
    146 
    147 /* Intersil or Am9513 clock hardware interrupts (hard-wired at 5) */
    148 #define splclock()      splraise5()
    149 #define splstatclock()  splclock()
    150 
    151 /* Zilog Serial hardware interrupts (hard-wired at 6) */
    152 #define splzs()		spl6()
    153 
    154 /* Block out all interrupts (except NMI of course). */
    155 #define splhigh()       spl7()
    156 #define splsched()      spl7()
    157 #define spllock()	spl7()
    158 
    159 /* This returns true iff the spl given is spl0. */
    160 #define	is_spl0(s)	(((s) & PSL_IPL7) == 0)
    161 
    162 #endif	/* _KERNEL */
    163 
    164 #endif	/* _SUN68K_INTR_H */
    165