intr.h revision 1.9 1 /* $NetBSD: intr.h,v 1.9 2006/10/05 14:24:10 tsutsui Exp $ */
2
3 /*
4 * Copyright (c) 2001 Matt Fredette.
5 * Copyright (c) 1998 Matt Thomas.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. The name of the company nor the names of the authors may be used to
17 * endorse or promote products derived from this software without specific
18 * prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR IMPLIED
21 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
24 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
25 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
26 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32
33 #ifndef _SUN68K_INTR_H_
34 #define _SUN68K_INTR_H_
35
36 #include <sys/queue.h>
37 #include <m68k/psl.h>
38
39 /*
40 * Interrupt levels. Right now these correspond to real
41 * hardware levels, but I don't think anything counts on
42 * that (yet?).
43 */
44 #define _IPL_SOFT_LEVEL1 1
45 #define _IPL_SOFT_LEVEL2 2
46 #define _IPL_SOFT_LEVEL3 3
47 #define _IPL_SOFT_LEVEL_MIN 1
48 #define _IPL_SOFT_LEVEL_MAX 3
49
50 #define IPL_NONE 0
51 #define IPL_SOFT_LEVEL1 (PSL_S|PSL_IPL1)
52 #define IPL_SOFT_LEVEL2 (PSL_S|PSL_IPL2)
53 #define IPL_SOFT_LEVEL3 (PSL_S|PSL_IPL3)
54 #define IPL_SOFTCLOCK IPL_SOFT_LEVEL1
55 #define IPL_SOFTNET IPL_SOFT_LEVEL1
56 #define IPL_BIO (PSL_S|PSL_IPL2)
57 #define IPL_NET (PSL_S|PSL_IPL3)
58 #define IPL_SOFTSERIAL IPL_SOFT_LEVEL3
59 #define IPL_TTY (PSL_S|PSL_IPL4)
60 #define IPL_VM (PSL_S|PSL_IPL4)
61 /* Intersil or Am9513 clock hardware interrupts (hard-wired at 5) */
62 #define IPL_CLOCK (PSL_S|PSL_IPL5)
63 #define IPL_STATCLOCK IPL_CLOCK
64 #define IPL_SCHED (PSL_S|PSL_IPL7)
65 #define IPL_HIGH (PSL_S|PSL_IPL7)
66 #define IPL_LOCK (PSL_S|PSL_IPL7)
67 #define IPL_SERIAL (PSL_S|PSL_IPL6)
68
69 #ifdef _KERNEL
70 LIST_HEAD(sh_head, softintr_handler);
71
72 struct softintr_head {
73 int shd_ipl;
74 struct sh_head shd_intrs;
75 };
76
77 struct softintr_handler {
78 struct softintr_head *sh_head;
79 LIST_ENTRY(softintr_handler) sh_link;
80 void (*sh_func)(void *);
81 void *sh_arg;
82 int sh_pending;
83 };
84
85 void softintr_init(void);
86 void *softintr_establish(int, void (*)(void *), void *);
87 void softintr_disestablish(void *);
88
89 /* These control the software interrupt register. */
90 void isr_soft_request(int);
91 void isr_soft_clear(int);
92
93 static __inline void
94 softintr_schedule(void *arg)
95 {
96 struct softintr_handler * const sh = arg;
97 if (sh->sh_pending == 0) {
98 sh->sh_pending = 1;
99 isr_soft_request(sh->sh_head->shd_ipl);
100 }
101 }
102
103 extern void *softnet_cookie;
104 #define setsoftnet() softintr_schedule(softnet_cookie)
105
106 /* These connect interrupt handlers. */
107 typedef int (*isr_func_t)(void *);
108 void isr_add_autovect(isr_func_t, void *, int);
109 void isr_add_vectored(isr_func_t, void *, int, int);
110 void isr_add_custom(int, void *);
111
112 /*
113 * Define inline functions for PSL manipulation.
114 * These are as close to macros as one can get.
115 * When not optimizing gcc will call the locore.s
116 * functions by the same names, so breakpoints on
117 * these functions will work normally, etc.
118 * (See the GCC extensions info document.)
119 */
120
121 static __inline int _getsr(void);
122
123 /* Get current sr value. */
124 static __inline int
125 _getsr(void)
126 {
127 int rv;
128
129 __asm volatile ("clrl %0; movew %%sr,%0" : "=&d" (rv));
130 return (rv);
131 }
132
133 /*
134 * The rest of this is sun68k specific, because other ports may
135 * need to do special things in spl0() (i.e. simulate SIR).
136 * Suns have a REAL interrupt register, so spl0() and splx(s)
137 * have no need to check for any simulated interrupts, etc.
138 */
139
140 #define spl0() _spl0() /* we have real software interrupts */
141 #define splx(x) _spl(x)
142
143 /* IPL used by soft interrupts: netintr(), softclock() */
144 #define spllowersoftclock() spl1()
145
146 /* Zilog Serial hardware interrupts (hard-wired at 6) */
147 #define splzs() spl6()
148
149 /* This returns true iff the spl given is spl0. */
150 #define is_spl0(s) (((s) & PSL_IPL7) == 0)
151
152 #define splraiseipl(x) _splraise(x)
153
154 #include <sys/spl.h>
155
156 #endif /* _KERNEL */
157
158 #endif /* _SUN68K_INTR_H */
159