bi_nmi.c revision 1.1 1 1.1 ragge /* $NetBSD: bi_nmi.c,v 1.1 2000/07/26 11:47:15 ragge Exp $ */
2 1.1 ragge /*
3 1.1 ragge * Copyright (c) 1999 Ludd, University of Lule}, Sweden.
4 1.1 ragge * All rights reserved.
5 1.1 ragge *
6 1.1 ragge * Redistribution and use in source and binary forms, with or without
7 1.1 ragge * modification, are permitted provided that the following conditions
8 1.1 ragge * are met:
9 1.1 ragge * 1. Redistributions of source code must retain the above copyright
10 1.1 ragge * notice, this list of conditions and the following disclaimer.
11 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 ragge * notice, this list of conditions and the following disclaimer in the
13 1.1 ragge * documentation and/or other materials provided with the distribution.
14 1.1 ragge * 3. All advertising materials mentioning features or use of this software
15 1.1 ragge * must display the following acknowledgement:
16 1.1 ragge * This product includes software developed at Ludd, University of
17 1.1 ragge * Lule}, Sweden and its contributors.
18 1.1 ragge * 4. The name of the author may not be used to endorse or promote products
19 1.1 ragge * derived from this software without specific prior written permission
20 1.1 ragge *
21 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 1.1 ragge * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 1.1 ragge * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 1.1 ragge * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 1.1 ragge * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 1.1 ragge * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 1.1 ragge * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 1.1 ragge * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 1.1 ragge * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 1.1 ragge * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 1.1 ragge */
32 1.1 ragge
33 1.1 ragge #include <sys/param.h>
34 1.1 ragge #include <sys/device.h>
35 1.1 ragge #include <sys/systm.h>
36 1.1 ragge
37 1.1 ragge #define _VAX_BUS_DMA_PRIVATE
38 1.1 ragge #include <machine/bus.h>
39 1.1 ragge #include <machine/nexus.h>
40 1.1 ragge #include <machine/sid.h>
41 1.1 ragge #include <machine/scb.h>
42 1.1 ragge #include <machine/cpu.h>
43 1.1 ragge #include <machine/ka88.h>
44 1.1 ragge
45 1.1 ragge #include <dev/bi/bivar.h>
46 1.1 ragge #include <dev/bi/bireg.h>
47 1.1 ragge
48 1.1 ragge #include "locators.h"
49 1.1 ragge
50 1.1 ragge extern struct vax_bus_space vax_mem_bus_space;
51 1.1 ragge extern struct vax_bus_dma_tag vax_bus_dma_tag;
52 1.1 ragge
53 1.1 ragge static int
54 1.1 ragge bi_nmi_match(struct device *parent, struct cfdata *cf, void *aux)
55 1.1 ragge {
56 1.1 ragge struct nmi_attach_args *na = aux;
57 1.1 ragge
58 1.1 ragge if (cf->cf_loc[NMICF_SLOT] != NMICF_SLOT_DEFAULT &&
59 1.1 ragge cf->cf_loc[NMICF_SLOT] != na->slot)
60 1.1 ragge return 0;
61 1.1 ragge if (na->slot < 10)
62 1.1 ragge return 1;
63 1.1 ragge return 0;
64 1.1 ragge }
65 1.1 ragge
66 1.1 ragge static void
67 1.1 ragge bi_nmi_attach(struct device *parent, struct device *self, void *aux)
68 1.1 ragge {
69 1.1 ragge struct nmi_attach_args *na = aux;
70 1.1 ragge struct bi_softc *sc = (void *)self;
71 1.1 ragge volatile int *v, *v2;
72 1.1 ragge extern int avail_end;
73 1.1 ragge int nid;
74 1.1 ragge
75 1.1 ragge /*
76 1.1 ragge * Fill in bus specific data.
77 1.1 ragge */
78 1.1 ragge sc->sc_addr = (bus_addr_t)BI_BASE(na->slot, 0);
79 1.1 ragge sc->sc_iot = &vax_mem_bus_space; /* No special I/O handling */
80 1.1 ragge sc->sc_dmat = &vax_bus_dma_tag; /* No special DMA handling either */
81 1.1 ragge
82 1.1 ragge /* Must get the NBIB node number (interrupt routing) */
83 1.1 ragge /*
84 1.1 ragge * XXX - need a big cleanup here!
85 1.1 ragge */
86 1.1 ragge v = (int *)vax_map_physmem(NBIA_REGS(na->slot/2), 1);
87 1.1 ragge v[1] = v[1]; /* Clear errors */
88 1.1 ragge v[0] = 0x400 | CSR0_NBIIE | CSR0_LOOP; /* XXX */
89 1.1 ragge v2 = (int *)vax_map_physmem(sc->sc_addr, 1);
90 1.1 ragge v2[10] = v2[10] | 0x48;
91 1.1 ragge v2[8] = 0;
92 1.1 ragge v2[9] = (avail_end + 0x3ffff) & (~0x3ffff);
93 1.1 ragge v2[2] = v2[2];
94 1.1 ragge v2[1] = v2[1] | BICSR_BROKE;
95 1.1 ragge nid = v2[1] & 15;
96 1.1 ragge v[0] = (v[0] & ~CSR0_LOOP);
97 1.1 ragge DELAY(1000);
98 1.1 ragge
99 1.1 ragge sc->sc_intcpu = 1 << nid;
100 1.1 ragge sc->sc_lastiv = /* 0x400 * na->slot + */ 0x400;
101 1.1 ragge
102 1.1 ragge bi_attach(sc);
103 1.1 ragge }
104 1.1 ragge
105 1.1 ragge struct cfattach bi_nmi_ca = {
106 1.1 ragge sizeof(struct bi_softc), bi_nmi_match, bi_nmi_attach
107 1.1 ragge };
108