autoconf.c revision 1.12 1 1.12 matt /* $NetBSD: autoconf.c,v 1.12 2000/06/04 19:30:14 matt Exp $ */
2 1.1 ragge /*
3 1.1 ragge * Copyright (c) 1994, 1998 Ludd, University of Lule}, Sweden.
4 1.1 ragge * All rights reserved.
5 1.1 ragge *
6 1.1 ragge * Redistribution and use in source and binary forms, with or without
7 1.1 ragge * modification, are permitted provided that the following conditions
8 1.1 ragge * are met:
9 1.1 ragge * 1. Redistributions of source code must retain the above copyright
10 1.1 ragge * notice, this list of conditions and the following disclaimer.
11 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 ragge * notice, this list of conditions and the following disclaimer in the
13 1.1 ragge * documentation and/or other materials provided with the distribution.
14 1.1 ragge * 3. All advertising materials mentioning features or use of this software
15 1.1 ragge * must display the following acknowledgement:
16 1.1 ragge * This product includes software developed at Ludd, University of Lule}.
17 1.1 ragge * 4. The name of the author may not be used to endorse or promote products
18 1.1 ragge * derived from this software without specific prior written permission
19 1.1 ragge *
20 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 1.1 ragge * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 1.1 ragge * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 1.1 ragge * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 1.1 ragge * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 1.1 ragge * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 1.1 ragge * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 1.1 ragge * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 1.1 ragge * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 1.1 ragge * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 1.1 ragge */
31 1.1 ragge
32 1.1 ragge /* All bugs are subject to removal without further notice */
33 1.1 ragge
34 1.1 ragge
35 1.1 ragge
36 1.11 ragge #include <sys/param.h>
37 1.11 ragge
38 1.11 ragge #include <lib/libsa/stand.h>
39 1.11 ragge
40 1.1 ragge #include "../include/mtpr.h"
41 1.1 ragge #include "../include/sid.h"
42 1.12 matt #include "../include/intr.h"
43 1.11 ragge #include "../include/rpb.h"
44 1.12 matt #include "../include/scb.h"
45 1.11 ragge
46 1.1 ragge #include "vaxstand.h"
47 1.1 ragge
48 1.11 ragge void autoconf(void);
49 1.11 ragge void findcpu(void);
50 1.11 ragge void consinit(void);
51 1.11 ragge void scbinit(void);
52 1.11 ragge int getsecs(void);
53 1.11 ragge void scb_stray(void *);
54 1.11 ragge void longjmp(int *);
55 1.11 ragge void rtimer(void *);
56 1.1 ragge
57 1.1 ragge /*
58 1.1 ragge * Autoconf routine is really stupid; but it actually don't
59 1.1 ragge * need any intelligence. We just assume that all possible
60 1.1 ragge * devices exists on each cpu. Fast & easy.
61 1.1 ragge */
62 1.1 ragge
63 1.11 ragge void
64 1.1 ragge autoconf()
65 1.1 ragge {
66 1.1 ragge
67 1.3 ragge findcpu(); /* Configures CPU variables */
68 1.3 ragge consinit(); /* Allow us to print out things */
69 1.3 ragge scbinit(); /* Fix interval clock etc */
70 1.3 ragge
71 1.3 ragge switch (vax_boardtype) {
72 1.1 ragge
73 1.3 ragge case VAX_BTYP_46:
74 1.3 ragge case VAX_BTYP_48:
75 1.3 ragge {int *map, i;
76 1.3 ragge
77 1.3 ragge /* Map all 16MB of I/O space to low 16MB of memory */
78 1.3 ragge map = (int *)0x700000; /* XXX */
79 1.3 ragge *(int *)0x20080008 = (int)map; /* XXX */
80 1.3 ragge for (i = 0; i < 0x8000; i++)
81 1.3 ragge map[i] = 0x80000000 | i;
82 1.3 ragge }break;
83 1.3 ragge
84 1.5 ragge break;
85 1.1 ragge }
86 1.1 ragge }
87 1.1 ragge
88 1.1 ragge /*
89 1.1 ragge * Clock handling routines, needed to do timing in standalone programs.
90 1.1 ragge */
91 1.3 ragge
92 1.3 ragge volatile int tickcnt;
93 1.1 ragge
94 1.11 ragge int
95 1.1 ragge getsecs()
96 1.1 ragge {
97 1.3 ragge return tickcnt/100;
98 1.3 ragge }
99 1.3 ragge
100 1.5 ragge struct ivec_dsp **scb;
101 1.5 ragge struct ivec_dsp *scb_vec;
102 1.6 matt extern struct ivec_dsp idsptch;
103 1.3 ragge
104 1.5 ragge /*
105 1.5 ragge * Init the SCB and set up a handler for all vectors in the lower space,
106 1.5 ragge * to detect unwanted interrupts.
107 1.5 ragge */
108 1.11 ragge void
109 1.3 ragge scbinit()
110 1.3 ragge {
111 1.3 ragge int i;
112 1.3 ragge
113 1.5 ragge /*
114 1.12 matt * Allocate space. We need one page for the SCB, and 128*20 == 2.5k
115 1.5 ragge * for the vectors. The SCB must be on a page boundary.
116 1.5 ragge */
117 1.12 matt i = (int)alloc(VAX_NBPG + 128*sizeof(scb_vec[0])) + VAX_PGOFSET;
118 1.3 ragge i &= ~VAX_PGOFSET;
119 1.3 ragge
120 1.3 ragge mtpr(i, PR_SCBB);
121 1.5 ragge scb = (void *)i;
122 1.5 ragge scb_vec = (struct ivec_dsp *)(i + VAX_NBPG);
123 1.3 ragge
124 1.5 ragge for (i = 0; i < 128; i++) {
125 1.5 ragge scb[i] = &scb_vec[i];
126 1.12 matt (int)scb[i] |= SCB_ISTACK; /* Only interrupt stack */
127 1.6 matt scb_vec[i] = idsptch;
128 1.5 ragge scb_vec[i].hoppaddr = scb_stray;
129 1.12 matt scb_vec[i].pushlarg = (void *) (i * 4);
130 1.12 matt scb_vec[i].ev = NULL;
131 1.5 ragge }
132 1.5 ragge scb_vec[0xc0/4].hoppaddr = rtimer;
133 1.3 ragge
134 1.3 ragge mtpr(-10000, PR_NICR); /* Load in count register */
135 1.3 ragge mtpr(0x800000d1, PR_ICCS); /* Start clock and enable interrupt */
136 1.3 ragge
137 1.5 ragge mtpr(20, PR_IPL);
138 1.5 ragge }
139 1.5 ragge
140 1.7 ragge extern int jbuf[10];
141 1.7 ragge extern int sluttid, senast, skip;
142 1.7 ragge
143 1.5 ragge void
144 1.11 ragge rtimer(void *arg)
145 1.5 ragge {
146 1.12 matt mtpr(IPL_HIGH, PR_IPL);
147 1.5 ragge tickcnt++;
148 1.5 ragge mtpr(0xc1, PR_ICCS);
149 1.7 ragge if (skip)
150 1.7 ragge return;
151 1.9 ragge if ((vax_boardtype == VAX_BTYP_46) ||
152 1.9 ragge (vax_boardtype == VAX_BTYP_48) ||
153 1.9 ragge (vax_boardtype == VAX_BTYP_49)) {
154 1.7 ragge int nu = sluttid - getsecs();
155 1.7 ragge if (senast != nu) {
156 1.7 ragge mtpr(20, PR_IPL);
157 1.7 ragge longjmp(jbuf);
158 1.7 ragge }
159 1.7 ragge }
160 1.3 ragge }
161 1.1 ragge
162 1.3 ragge asm("
163 1.12 matt .align 2
164 1.5 ragge .globl _idsptch, _eidsptch
165 1.5 ragge _idsptch:
166 1.5 ragge pushr $0x3f
167 1.12 matt .word 0x9f16
168 1.12 matt .long _cmn_idsptch
169 1.12 matt .long 0
170 1.12 matt .long 0
171 1.12 matt .long 0
172 1.12 matt _eidsptch:
173 1.12 matt
174 1.12 matt _cmn_idsptch:
175 1.12 matt movl (sp)+,r0
176 1.12 matt pushl 4(r0)
177 1.12 matt calls $1,*(r0)
178 1.12 matt popr $0x3f
179 1.3 ragge rei
180 1.3 ragge ");
181 1.5 ragge
182 1.5 ragge /*
183 1.5 ragge * Stray interrupt handler.
184 1.5 ragge * This function must _not_ save any registers (in the reg save mask).
185 1.5 ragge */
186 1.5 ragge void
187 1.11 ragge scb_stray(void *arg)
188 1.5 ragge {
189 1.12 matt static int vector, ipl;
190 1.5 ragge
191 1.5 ragge ipl = mfpr(PR_IPL);
192 1.12 matt vector = (int) arg;
193 1.12 matt printf("stray interrupt: vector 0x%x, ipl %d\n", vector, ipl);
194 1.5 ragge }
195