autoconf.c revision 1.4 1 1.4 ragge /* $NetBSD: autoconf.c,v 1.4 1999/06/20 15:52:51 ragge Exp $ */
2 1.1 ragge /*
3 1.1 ragge * Copyright (c) 1994, 1998 Ludd, University of Lule}, Sweden.
4 1.1 ragge * All rights reserved.
5 1.1 ragge *
6 1.1 ragge * Redistribution and use in source and binary forms, with or without
7 1.1 ragge * modification, are permitted provided that the following conditions
8 1.1 ragge * are met:
9 1.1 ragge * 1. Redistributions of source code must retain the above copyright
10 1.1 ragge * notice, this list of conditions and the following disclaimer.
11 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 ragge * notice, this list of conditions and the following disclaimer in the
13 1.1 ragge * documentation and/or other materials provided with the distribution.
14 1.1 ragge * 3. All advertising materials mentioning features or use of this software
15 1.1 ragge * must display the following acknowledgement:
16 1.1 ragge * This product includes software developed at Ludd, University of Lule}.
17 1.1 ragge * 4. The name of the author may not be used to endorse or promote products
18 1.1 ragge * derived from this software without specific prior written permission
19 1.1 ragge *
20 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 1.1 ragge * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 1.1 ragge * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 1.1 ragge * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 1.1 ragge * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 1.1 ragge * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 1.1 ragge * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 1.1 ragge * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 1.1 ragge * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 1.1 ragge * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 1.1 ragge */
31 1.1 ragge
32 1.1 ragge /* All bugs are subject to removal without further notice */
33 1.1 ragge
34 1.1 ragge
35 1.1 ragge
36 1.1 ragge #include "sys/param.h"
37 1.1 ragge #include "../include/mtpr.h"
38 1.1 ragge #include "../include/sid.h"
39 1.1 ragge #include "vaxstand.h"
40 1.1 ragge
41 1.1 ragge int nmba=0, nuba=0, nbi=0,nsbi=0,nuda=0;
42 1.1 ragge int *mbaaddr, *ubaaddr, *biaddr;
43 1.1 ragge int *udaaddr, *uioaddr, tmsaddr, *bioaddr;
44 1.1 ragge
45 1.1 ragge static int mba750[]={0xf28000,0xf2a000,0xf2c000};
46 1.1 ragge static int uba750[]={0xf30000,0xf32000};
47 1.1 ragge static int uio750[]={0xfc0000,0xf80000};
48 1.1 ragge static int uda750[]={0772150};
49 1.1 ragge
50 1.1 ragge /* 11/780's only have 4, 8600 have 8 of these. */
51 1.1 ragge /* XXX - all of these should be bound to physical addresses */
52 1.1 ragge static int mba780[]={0x20010000,0x20012000,0x20014000,0x20016000,
53 1.1 ragge 0x22010000,0x22012000,0x22014000,0x22016000};
54 1.1 ragge static int uba780[]={0, 0, 0, 0x20006000,0x20008000,0x2000a000,0x2000c000, 0,
55 1.1 ragge 0, 0, 0, 0, 0, 0, 0, 0,
56 1.1 ragge 0, 0, 0, 0x22006000,0x22008000,0x2200a000,0x2200c000};
57 1.1 ragge static int uio780[]={0, 0, 0, 0x20100000,0x20140000,0x20180000,0x201c0000, 0,
58 1.1 ragge 0, 0, 0, 0, 0, 0, 0, 0,
59 1.1 ragge 0, 0, 0, 0x22100000,0x22140000,0x22180000,0x221c0000};
60 1.1 ragge static int bi8200[]={0x20000000, 0x22000000, 0x24000000, 0x26000000,
61 1.1 ragge 0x28000000, 0x2a000000};
62 1.1 ragge static int bio8200[]={0x20400000};
63 1.1 ragge
64 1.1 ragge static int uba630[]={0x20087800};
65 1.1 ragge static int uio630[]={0x30000000};
66 1.1 ragge #define qbdev(csr) (((csr) & 017777)-0x10000000)
67 1.1 ragge static int uda630[]={qbdev(0772150),qbdev(0760334)};
68 1.1 ragge
69 1.1 ragge static int uba670[]={0x20040000};
70 1.1 ragge static int uio670[]={0x20000000};
71 1.1 ragge static int uda670[]={0x20004030,0x20004230};
72 1.1 ragge #define qb670dev(csr) (((csr) & 017777)+0x20000000)
73 1.1 ragge
74 1.1 ragge /*
75 1.1 ragge * Autoconf routine is really stupid; but it actually don't
76 1.1 ragge * need any intelligence. We just assume that all possible
77 1.1 ragge * devices exists on each cpu. Fast & easy.
78 1.1 ragge */
79 1.1 ragge
80 1.1 ragge autoconf()
81 1.1 ragge {
82 1.1 ragge extern int memsz;
83 1.1 ragge
84 1.3 ragge findcpu(); /* Configures CPU variables */
85 1.3 ragge consinit(); /* Allow us to print out things */
86 1.3 ragge scbinit(); /* Fix interval clock etc */
87 1.3 ragge
88 1.3 ragge switch (vax_boardtype) {
89 1.1 ragge
90 1.1 ragge default:
91 1.3 ragge printf("\nCPU type %d not supported by boot\n",vax_cputype);
92 1.1 ragge printf("trying anyway...\n");
93 1.1 ragge break;
94 1.1 ragge
95 1.3 ragge case VAX_BTYP_780:
96 1.3 ragge case VAX_BTYP_790:
97 1.1 ragge memsz = 0;
98 1.1 ragge nmba = 8;
99 1.1 ragge nuba = 32; /* XXX */
100 1.1 ragge nuda = 1;
101 1.1 ragge mbaaddr = mba780;
102 1.1 ragge ubaaddr = uba780;
103 1.1 ragge udaaddr = uda750;
104 1.1 ragge uioaddr = uio780;
105 1.1 ragge tmsaddr = 0774500;
106 1.1 ragge break;
107 1.1 ragge
108 1.3 ragge case VAX_BTYP_750:
109 1.1 ragge memsz = 0;
110 1.1 ragge nmba = 3;
111 1.1 ragge nuba = 2;
112 1.1 ragge nuda = 1;
113 1.1 ragge mbaaddr = mba750;
114 1.1 ragge ubaaddr = uba750;
115 1.1 ragge udaaddr = uda750;
116 1.1 ragge uioaddr = uio750;
117 1.1 ragge tmsaddr = 0774500;
118 1.1 ragge break;
119 1.1 ragge
120 1.3 ragge case VAX_BTYP_630: /* the same for uvaxIII */
121 1.3 ragge case VAX_BTYP_650:
122 1.4 ragge case VAX_BTYP_660:
123 1.3 ragge case VAX_BTYP_670:
124 1.1 ragge nuba = 1;
125 1.1 ragge nuda = 2;
126 1.1 ragge ubaaddr = uba630;
127 1.1 ragge udaaddr = uda630;
128 1.1 ragge uioaddr = uio630;
129 1.1 ragge tmsaddr = qbdev(0774500);
130 1.1 ragge break;
131 1.1 ragge
132 1.3 ragge case VAX_BTYP_8000:
133 1.1 ragge memsz = 0;
134 1.1 ragge nbi = 1;
135 1.1 ragge biaddr = bi8200;
136 1.1 ragge bioaddr = bio8200;
137 1.1 ragge break;
138 1.1 ragge
139 1.3 ragge case VAX_BTYP_46:
140 1.3 ragge case VAX_BTYP_48:
141 1.3 ragge {int *map, i;
142 1.3 ragge
143 1.3 ragge /* Map all 16MB of I/O space to low 16MB of memory */
144 1.3 ragge map = (int *)0x700000; /* XXX */
145 1.3 ragge *(int *)0x20080008 = (int)map; /* XXX */
146 1.3 ragge for (i = 0; i < 0x8000; i++)
147 1.3 ragge map[i] = 0x80000000 | i;
148 1.3 ragge }break;
149 1.3 ragge
150 1.3 ragge case VAX_BTYP_410:
151 1.3 ragge case VAX_BTYP_420:
152 1.3 ragge case VAX_BTYP_43:
153 1.1 ragge }
154 1.1 ragge }
155 1.1 ragge
156 1.1 ragge /*
157 1.1 ragge * Clock handling routines, needed to do timing in standalone programs.
158 1.1 ragge */
159 1.3 ragge
160 1.3 ragge volatile int tickcnt;
161 1.1 ragge
162 1.1 ragge getsecs()
163 1.1 ragge {
164 1.1 ragge volatile int loop;
165 1.1 ragge int todr;
166 1.1 ragge
167 1.3 ragge return tickcnt/100;
168 1.3 ragge }
169 1.3 ragge
170 1.3 ragge int *scb;
171 1.3 ragge
172 1.3 ragge scbinit()
173 1.3 ragge {
174 1.3 ragge extern int timer;
175 1.3 ragge int i;
176 1.3 ragge
177 1.3 ragge /* The SCB must be on a page boundary. */
178 1.3 ragge i = alloc(1024) + VAX_NBPG;
179 1.3 ragge i &= ~VAX_PGOFSET;
180 1.3 ragge
181 1.3 ragge mtpr(i, PR_SCBB);
182 1.3 ragge scb = (int *)i;
183 1.3 ragge
184 1.3 ragge scb[0xc0/4] =(int)&timer + 1;
185 1.3 ragge
186 1.3 ragge mtpr(-10000, PR_NICR); /* Load in count register */
187 1.3 ragge mtpr(0x800000d1, PR_ICCS); /* Start clock and enable interrupt */
188 1.3 ragge
189 1.3 ragge mtpr(0x14,PR_IPL);
190 1.3 ragge }
191 1.1 ragge
192 1.3 ragge asm("
193 1.3 ragge .align 2
194 1.3 ragge _timer: .globl _timer
195 1.3 ragge mtpr $0xc1,$0x18
196 1.3 ragge incl _tickcnt
197 1.3 ragge rei
198 1.3 ragge ");
199