if_le.c revision 1.12 1 1.12 drochner /* $NetBSD: if_le.c,v 1.12 1998/07/21 17:36:05 drochner Exp $ */
2 1.1 ragge
3 1.1 ragge /* #define LE_CHIP_IS_POKEY /* does VS2000 need this ??? */
4 1.1 ragge
5 1.1 ragge /*-
6 1.1 ragge * Copyright (c) 1995 Charles M. Hannum. All rights reserved.
7 1.1 ragge * Copyright (c) 1992, 1993
8 1.1 ragge * The Regents of the University of California. All rights reserved.
9 1.1 ragge *
10 1.1 ragge * This code is derived from software contributed to Berkeley by
11 1.1 ragge * Ralph Campbell and Rick Macklem.
12 1.1 ragge *
13 1.1 ragge * Redistribution and use in source and binary forms, with or without
14 1.1 ragge * modification, are permitted provided that the following conditions
15 1.1 ragge * are met:
16 1.1 ragge * 1. Redistributions of source code must retain the above copyright
17 1.1 ragge * notice, this list of conditions and the following disclaimer.
18 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright
19 1.1 ragge * notice, this list of conditions and the following disclaimer in the
20 1.1 ragge * documentation and/or other materials provided with the distribution.
21 1.1 ragge * 3. All advertising materials mentioning features or use of this software
22 1.1 ragge * must display the following acknowledgement:
23 1.1 ragge * This product includes software developed by the University of
24 1.1 ragge * California, Berkeley and its contributors.
25 1.1 ragge * 4. Neither the name of the University nor the names of its contributors
26 1.1 ragge * may be used to endorse or promote products derived from this software
27 1.1 ragge * without specific prior written permission.
28 1.1 ragge *
29 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
30 1.1 ragge * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31 1.1 ragge * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32 1.1 ragge * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
33 1.1 ragge * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 1.1 ragge * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
35 1.1 ragge * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36 1.1 ragge * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 1.1 ragge * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38 1.1 ragge * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 1.1 ragge * SUCH DAMAGE.
40 1.1 ragge *
41 1.1 ragge * @(#)if_le.c 8.2 (Berkeley) 11/16/93
42 1.1 ragge */
43 1.1 ragge
44 1.11 jonathan #include "opt_inet.h"
45 1.1 ragge #include "bpfilter.h"
46 1.1 ragge
47 1.1 ragge #include <sys/param.h>
48 1.1 ragge #include <sys/syslog.h>
49 1.1 ragge #include <sys/socket.h>
50 1.1 ragge #include <sys/device.h>
51 1.5 ragge #include <sys/reboot.h>
52 1.1 ragge
53 1.1 ragge #include <net/if.h>
54 1.6 is #include <net/if_ether.h>
55 1.7 thorpej #include <net/if_media.h>
56 1.1 ragge
57 1.1 ragge #if INET
58 1.1 ragge #include <netinet/in.h>
59 1.6 is #include <netinet/if_inarp.h>
60 1.1 ragge #endif
61 1.1 ragge
62 1.1 ragge /*
63 1.1 ragge * This would be nice, but it's not yet there...
64 1.1 ragge *
65 1.1 ragge * #include <machine/autoconf.h>
66 1.1 ragge */
67 1.1 ragge
68 1.1 ragge #include <machine/pte.h>
69 1.1 ragge #include <machine/cpu.h>
70 1.1 ragge #include <machine/mtpr.h>
71 1.1 ragge #include <machine/uvax.h>
72 1.1 ragge #include <machine/ka410.h>
73 1.1 ragge #include <machine/vsbus.h>
74 1.5 ragge #include <machine/rpb.h>
75 1.1 ragge
76 1.12 drochner #include <dev/ic/lancereg.h>
77 1.12 drochner #include <dev/ic/lancevar.h>
78 1.1 ragge #include <dev/ic/am7990reg.h>
79 1.1 ragge #define LE_NEED_BUF_CONTIG
80 1.1 ragge #include <dev/ic/am7990var.h>
81 1.1 ragge
82 1.1 ragge #include <dev/tc/if_levar.h>
83 1.1 ragge
84 1.1 ragge #define xdebug(x)
85 1.1 ragge
86 1.1 ragge #ifdef LE_CHIP_IS_POKEY
87 1.1 ragge /*
88 1.1 ragge * access LANCE registers and double-check their contents
89 1.1 ragge */
90 1.1 ragge #define wbflush() /* do nothing */
91 1.1 ragge void lewritereg();
92 1.1 ragge #define LERDWR(cntl, src, dst) { (dst) = (src); wbflush(); }
93 1.1 ragge #define LEWREG(src, dst) lewritereg(&(dst), (src))
94 1.1 ragge #endif
95 1.1 ragge
96 1.1 ragge #define LE_IOSIZE 64*1024 /* 64K of real-mem are reserved and already */
97 1.1 ragge extern void *le_iomem; /* mapped into virt-mem by cpu_steal_pages */
98 1.1 ragge extern u_long le_ioaddr; /* le_iomem is virt, le_ioaddr is phys */
99 1.1 ragge
100 1.1 ragge #define LE_SOFTC(unit) le_cd.cd_devs[unit]
101 1.1 ragge #define LE_DELAY(x) DELAY(x)
102 1.1 ragge
103 1.10 ragge int lematch __P((struct device *, struct cfdata *, void *));
104 1.1 ragge void leattach __P((struct device *, struct device *, void *));
105 1.1 ragge
106 1.1 ragge int leintr __P((void *sc));
107 1.1 ragge
108 1.1 ragge struct cfattach le_ca = {
109 1.1 ragge sizeof(struct le_softc), lematch, leattach
110 1.1 ragge };
111 1.9 thorpej
112 1.9 thorpej extern struct cfdriver le_cd;
113 1.1 ragge
114 1.12 drochner #if defined(_KERNEL) && !defined(_LKM)
115 1.12 drochner #include "opt_ddb.h"
116 1.12 drochner #endif
117 1.12 drochner
118 1.12 drochner #ifdef DDB
119 1.12 drochner #define integrate
120 1.12 drochner #define hide
121 1.12 drochner #else
122 1.12 drochner #define integrate static __inline
123 1.12 drochner #define hide static
124 1.12 drochner #endif
125 1.12 drochner
126 1.12 drochner hide void lewrcsr __P ((struct lance_softc *, u_int16_t, u_int16_t));
127 1.12 drochner hide u_int16_t lerdcsr __P ((struct lance_softc *, u_int16_t));
128 1.4 ragge
129 1.4 ragge hide void
130 1.1 ragge lewrcsr(sc, port, val)
131 1.12 drochner struct lance_softc *sc;
132 1.1 ragge u_int16_t port, val;
133 1.1 ragge {
134 1.4 ragge struct lereg1 *ler1 = ((struct le_softc *)sc)->sc_r1;
135 1.1 ragge
136 1.1 ragge #ifdef LE_CHIP_IS_POKEY
137 1.1 ragge LEWREG(port, ler1->ler1_rap);
138 1.1 ragge LERDWR(port, val, ler1->ler1_rdp);
139 1.1 ragge #else
140 1.1 ragge ler1->ler1_rap = port;
141 1.1 ragge ler1->ler1_rdp = val;
142 1.1 ragge #endif
143 1.1 ragge }
144 1.1 ragge
145 1.4 ragge hide u_int16_t
146 1.1 ragge lerdcsr(sc, port)
147 1.12 drochner struct lance_softc *sc;
148 1.1 ragge u_int16_t port;
149 1.1 ragge {
150 1.4 ragge struct lereg1 *ler1 = ((struct le_softc *)sc)->sc_r1;
151 1.1 ragge u_int16_t val;
152 1.1 ragge
153 1.1 ragge #ifdef LE_CHIP_IS_POKEY
154 1.1 ragge LEWREG(port, ler1->ler1_rap);
155 1.1 ragge LERDWR(0, ler1->ler1_rdp, val);
156 1.1 ragge #else
157 1.1 ragge ler1->ler1_rap = port;
158 1.1 ragge val = ler1->ler1_rdp;
159 1.1 ragge #endif
160 1.1 ragge return (val);
161 1.1 ragge }
162 1.1 ragge
163 1.4 ragge integrate void
164 1.4 ragge lehwinit(sc)
165 1.12 drochner struct lance_softc *sc;
166 1.4 ragge {
167 1.4 ragge }
168 1.4 ragge
169 1.1 ragge int
170 1.10 ragge lematch(parent, cf, aux)
171 1.1 ragge struct device *parent;
172 1.10 ragge struct cfdata *cf;
173 1.10 ragge void *aux;
174 1.1 ragge {
175 1.1 ragge struct confargs *ca = aux;
176 1.1 ragge
177 1.1 ragge /*
178 1.1 ragge * There could/should be more checks, but for now...
179 1.1 ragge */
180 1.1 ragge if (strcmp(ca->ca_name, "le") &&
181 1.1 ragge strcmp(ca->ca_name, "am7990") &&
182 1.1 ragge strcmp(ca->ca_name, "AM7990"))
183 1.1 ragge return (0);
184 1.1 ragge
185 1.1 ragge return (1);
186 1.1 ragge }
187 1.1 ragge
188 1.1 ragge /*
189 1.1 ragge *
190 1.1 ragge */
191 1.1 ragge void
192 1.1 ragge leattach(parent, self, aux)
193 1.1 ragge struct device *parent, *self;
194 1.1 ragge void *aux;
195 1.1 ragge {
196 1.1 ragge register struct le_softc *sc = (void *)self;
197 1.1 ragge struct confargs *ca = aux;
198 1.1 ragge u_char *cp; /* pointer to MAC address */
199 1.1 ragge int i;
200 1.1 ragge
201 1.1 ragge sc->sc_r1 = (void*)uvax_phys2virt(ca->ca_ioaddr);
202 1.1 ragge
203 1.12 drochner sc->sc_am7990.lsc.sc_conf3 = 0;
204 1.12 drochner sc->sc_am7990.lsc.sc_mem = le_iomem;
205 1.12 drochner sc->sc_am7990.lsc.sc_addr = le_ioaddr;
206 1.12 drochner sc->sc_am7990.lsc.sc_memsize = LE_IOSIZE;
207 1.12 drochner sc->sc_am7990.lsc.sc_wrcsr = lewrcsr;
208 1.12 drochner sc->sc_am7990.lsc.sc_rdcsr = lerdcsr;
209 1.12 drochner sc->sc_am7990.lsc.sc_hwinit = lehwinit;
210 1.12 drochner sc->sc_am7990.lsc.sc_nocarrier = NULL;
211 1.1 ragge
212 1.1 ragge xdebug(("leattach: mem=%x, addr=%x, size=%x (%d)\n",
213 1.12 drochner sc->sc_am7990.lsc.sc_mem, sc->sc_am7990.lsc.sc_addr,
214 1.12 drochner sc->sc_am7990.lsc.sc_memsize, sc->sc_am7990.lsc.sc_memsize));
215 1.1 ragge
216 1.12 drochner sc->sc_am7990.lsc.sc_copytodesc = lance_copytobuf_contig;
217 1.12 drochner sc->sc_am7990.lsc.sc_copyfromdesc = lance_copyfrombuf_contig;
218 1.12 drochner sc->sc_am7990.lsc.sc_copytobuf = lance_copytobuf_contig;
219 1.12 drochner sc->sc_am7990.lsc.sc_copyfrombuf = lance_copyfrombuf_contig;
220 1.12 drochner sc->sc_am7990.lsc.sc_zerobuf = lance_zerobuf_contig;
221 1.1 ragge
222 1.1 ragge /*
223 1.1 ragge * Get the ethernet address out of rom
224 1.1 ragge */
225 1.12 drochner for (i = 0; i < sizeof(sc->sc_am7990.lsc.sc_enaddr); i++) {
226 1.1 ragge int *eaddr = (void*)uvax_phys2virt(ca->ca_enaddr);
227 1.12 drochner sc->sc_am7990.lsc.sc_enaddr[i] = (u_char)eaddr[i];
228 1.1 ragge }
229 1.1 ragge
230 1.12 drochner bcopy(self->dv_xname, sc->sc_am7990.lsc.sc_ethercom.ec_if.if_xname,
231 1.6 is IFNAMSIZ);
232 1.1 ragge am7990_config(&sc->sc_am7990);
233 1.1 ragge
234 1.1 ragge #ifdef LEDEBUG
235 1.12 drochner sc->sc_am7990.lsc.sc_debug = LEDEBUG;
236 1.1 ragge #endif
237 1.1 ragge
238 1.1 ragge vsbus_intr_register(ca, am7990_intr, &sc->sc_am7990);
239 1.1 ragge vsbus_intr_enable(ca);
240 1.5 ragge
241 1.5 ragge /*
242 1.5 ragge * Register this device as boot device if we booted from it.
243 1.5 ragge * This will fail if there are more than one le in a machine,
244 1.5 ragge * fortunately there may be only one.
245 1.5 ragge */
246 1.5 ragge if (B_TYPE(bootdev) == BDEV_LE)
247 1.5 ragge booted_from = self;
248 1.1 ragge }
249 1.1 ragge
250 1.1 ragge #ifdef LE_CHIP_IS_POKEY
251 1.1 ragge /*
252 1.1 ragge * Write a lance register port, reading it back to ensure success. This seems
253 1.1 ragge * to be necessary during initialization, since the chip appears to be a bit
254 1.1 ragge * pokey sometimes.
255 1.1 ragge */
256 1.1 ragge void
257 1.1 ragge lewritereg(regptr, val)
258 1.1 ragge register volatile u_short *regptr;
259 1.1 ragge register u_short val;
260 1.1 ragge {
261 1.1 ragge register int i = 0;
262 1.1 ragge
263 1.1 ragge while (*regptr != val) {
264 1.1 ragge *regptr = val;
265 1.1 ragge wbflush();
266 1.1 ragge if (++i > 10000) {
267 1.3 christos printf("le: Reg did not settle (to x%x): x%x\n", val,
268 1.1 ragge *regptr);
269 1.1 ragge return;
270 1.1 ragge }
271 1.1 ragge DELAY(100);
272 1.1 ragge }
273 1.1 ragge }
274 1.1 ragge #endif
275