if_le.c revision 1.18 1 1.18 matt /* $NetBSD: if_le.c,v 1.18 2000/06/05 00:09:19 matt Exp $ */
2 1.1 ragge
3 1.1 ragge /*-
4 1.14 ragge * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
5 1.13 mycroft * All rights reserved.
6 1.13 mycroft *
7 1.13 mycroft * This code is derived from software contributed to The NetBSD Foundation
8 1.14 ragge * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace
9 1.14 ragge * Simulation Facility, NASA Ames Research Center.
10 1.13 mycroft *
11 1.13 mycroft * Redistribution and use in source and binary forms, with or without
12 1.13 mycroft * modification, are permitted provided that the following conditions
13 1.13 mycroft * are met:
14 1.13 mycroft * 1. Redistributions of source code must retain the above copyright
15 1.13 mycroft * notice, this list of conditions and the following disclaimer.
16 1.13 mycroft * 2. Redistributions in binary form must reproduce the above copyright
17 1.13 mycroft * notice, this list of conditions and the following disclaimer in the
18 1.13 mycroft * documentation and/or other materials provided with the distribution.
19 1.13 mycroft * 3. All advertising materials mentioning features or use of this software
20 1.13 mycroft * must display the following acknowledgement:
21 1.14 ragge * This product includes software developed by the NetBSD
22 1.14 ragge * Foundation, Inc. and its contributors.
23 1.13 mycroft * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.13 mycroft * contributors may be used to endorse or promote products derived
25 1.13 mycroft * from this software without specific prior written permission.
26 1.13 mycroft *
27 1.13 mycroft * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.13 mycroft * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.13 mycroft * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.13 mycroft * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.13 mycroft * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.13 mycroft * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.13 mycroft * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.13 mycroft * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.13 mycroft * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.13 mycroft * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.13 mycroft * POSSIBILITY OF SUCH DAMAGE.
38 1.13 mycroft */
39 1.13 mycroft
40 1.13 mycroft /*-
41 1.1 ragge * Copyright (c) 1992, 1993
42 1.1 ragge * The Regents of the University of California. All rights reserved.
43 1.1 ragge *
44 1.1 ragge * This code is derived from software contributed to Berkeley by
45 1.1 ragge * Ralph Campbell and Rick Macklem.
46 1.1 ragge *
47 1.1 ragge * Redistribution and use in source and binary forms, with or without
48 1.1 ragge * modification, are permitted provided that the following conditions
49 1.1 ragge * are met:
50 1.1 ragge * 1. Redistributions of source code must retain the above copyright
51 1.1 ragge * notice, this list of conditions and the following disclaimer.
52 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright
53 1.1 ragge * notice, this list of conditions and the following disclaimer in the
54 1.1 ragge * documentation and/or other materials provided with the distribution.
55 1.1 ragge * 3. All advertising materials mentioning features or use of this software
56 1.1 ragge * must display the following acknowledgement:
57 1.1 ragge * This product includes software developed by the University of
58 1.1 ragge * California, Berkeley and its contributors.
59 1.1 ragge * 4. Neither the name of the University nor the names of its contributors
60 1.1 ragge * may be used to endorse or promote products derived from this software
61 1.1 ragge * without specific prior written permission.
62 1.1 ragge *
63 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
64 1.1 ragge * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
65 1.1 ragge * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
66 1.1 ragge * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
67 1.1 ragge * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
68 1.1 ragge * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
69 1.1 ragge * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
70 1.1 ragge * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
71 1.1 ragge * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
72 1.1 ragge * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
73 1.1 ragge * SUCH DAMAGE.
74 1.1 ragge *
75 1.1 ragge * @(#)if_le.c 8.2 (Berkeley) 11/16/93
76 1.1 ragge */
77 1.1 ragge
78 1.11 jonathan #include "opt_inet.h"
79 1.1 ragge #include "bpfilter.h"
80 1.1 ragge
81 1.1 ragge #include <sys/param.h>
82 1.1 ragge #include <sys/syslog.h>
83 1.1 ragge #include <sys/socket.h>
84 1.1 ragge #include <sys/device.h>
85 1.5 ragge #include <sys/reboot.h>
86 1.1 ragge
87 1.14 ragge #include <vm/vm.h>
88 1.14 ragge #include <vm/vm_kern.h>
89 1.14 ragge
90 1.1 ragge #include <net/if.h>
91 1.6 is #include <net/if_ether.h>
92 1.7 thorpej #include <net/if_media.h>
93 1.1 ragge
94 1.1 ragge #if INET
95 1.1 ragge #include <netinet/in.h>
96 1.6 is #include <netinet/if_inarp.h>
97 1.1 ragge #endif
98 1.1 ragge
99 1.1 ragge #include <machine/cpu.h>
100 1.14 ragge #include <machine/nexus.h>
101 1.14 ragge #include <machine/scb.h>
102 1.1 ragge
103 1.12 drochner #include <dev/ic/lancereg.h>
104 1.12 drochner #include <dev/ic/lancevar.h>
105 1.1 ragge #include <dev/ic/am7990reg.h>
106 1.1 ragge #include <dev/ic/am7990var.h>
107 1.1 ragge
108 1.14 ragge #include "ioconf.h"
109 1.1 ragge
110 1.14 ragge #define LEVEC 0xd4 /* Interrupt vector on 3300/3400 */
111 1.1 ragge
112 1.14 ragge struct le_softc {
113 1.14 ragge struct am7990_softc sc_am7990; /* Must be first */
114 1.17 matt struct evcnt sc_intrcnt;
115 1.14 ragge volatile u_short *sc_rap;
116 1.14 ragge volatile u_short *sc_rdp;
117 1.14 ragge };
118 1.1 ragge
119 1.14 ragge int le_ibus_match __P((struct device *, struct cfdata *, void *));
120 1.14 ragge void le_ibus_attach __P((struct device *, struct device *, void *));
121 1.14 ragge void lewrcsr __P((struct lance_softc *, u_int16_t, u_int16_t));
122 1.14 ragge u_int16_t lerdcsr __P((struct lance_softc *, u_int16_t));
123 1.14 ragge void lance_copytobuf_gap2 __P((struct lance_softc *, void *, int, int));
124 1.14 ragge void lance_copyfrombuf_gap2 __P((struct lance_softc *, void *, int, int));
125 1.14 ragge void lance_zerobuf_gap2 __P((struct lance_softc *, int, int));
126 1.1 ragge
127 1.14 ragge struct cfattach le_ibus_ca = {
128 1.14 ragge sizeof(struct le_softc), le_ibus_match, le_ibus_attach
129 1.1 ragge };
130 1.9 thorpej
131 1.14 ragge void
132 1.14 ragge lewrcsr(ls, port, val)
133 1.14 ragge struct lance_softc *ls;
134 1.1 ragge u_int16_t port, val;
135 1.1 ragge {
136 1.14 ragge struct le_softc *sc = (void *)ls;
137 1.1 ragge
138 1.14 ragge *sc->sc_rap = port;
139 1.14 ragge *sc->sc_rdp = val;
140 1.1 ragge }
141 1.1 ragge
142 1.14 ragge u_int16_t
143 1.14 ragge lerdcsr(ls, port)
144 1.14 ragge struct lance_softc *ls;
145 1.1 ragge u_int16_t port;
146 1.1 ragge {
147 1.14 ragge struct le_softc *sc = (void *)ls;
148 1.1 ragge
149 1.14 ragge *sc->sc_rap = port;
150 1.14 ragge return *sc->sc_rdp;
151 1.4 ragge }
152 1.4 ragge
153 1.1 ragge int
154 1.14 ragge le_ibus_match(parent, cf, aux)
155 1.1 ragge struct device *parent;
156 1.10 ragge struct cfdata *cf;
157 1.10 ragge void *aux;
158 1.1 ragge {
159 1.14 ragge struct bp_conf *bp = aux;
160 1.1 ragge
161 1.14 ragge if (strcmp("lance", bp->type))
162 1.14 ragge return 0;
163 1.14 ragge return 1;
164 1.1 ragge }
165 1.1 ragge
166 1.1 ragge void
167 1.14 ragge le_ibus_attach(parent, self, aux)
168 1.1 ragge struct device *parent, *self;
169 1.1 ragge void *aux;
170 1.1 ragge {
171 1.14 ragge struct le_softc *sc = (void *)self;
172 1.14 ragge int *lance_addr;
173 1.14 ragge int i, vec, br;
174 1.14 ragge
175 1.14 ragge sc->sc_rdp = (short *)vax_map_physmem(0x20084400, 1);
176 1.14 ragge sc->sc_rap = sc->sc_rdp + 2;
177 1.14 ragge
178 1.14 ragge /*
179 1.14 ragge * Set interrupt vector, by forcing an interrupt.
180 1.14 ragge */
181 1.14 ragge scb_vecref(0, 0); /* Clear vector ref */
182 1.14 ragge *sc->sc_rap = LE_CSR0;
183 1.14 ragge *sc->sc_rdp = LE_C0_STOP;
184 1.14 ragge DELAY(100);
185 1.14 ragge *sc->sc_rdp = LE_C0_INIT|LE_C0_INEA;
186 1.14 ragge DELAY(100000);
187 1.14 ragge i = scb_vecref(&vec, &br);
188 1.14 ragge if (i == 0 || vec == 0)
189 1.14 ragge return;
190 1.17 matt scb_vecalloc(vec, (void (*)(void *))am7990_intr, sc,
191 1.17 matt SCB_ISTACK, &sc->sc_intrcnt);
192 1.18 matt evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, NULL,
193 1.18 matt self->dv_xname, "intr");
194 1.14 ragge
195 1.14 ragge printf(": vec %o ipl %x\n%s", vec, br, self->dv_xname);
196 1.14 ragge /*
197 1.14 ragge * MD functions.
198 1.14 ragge */
199 1.14 ragge sc->sc_am7990.lsc.sc_rdcsr = lerdcsr;
200 1.12 drochner sc->sc_am7990.lsc.sc_wrcsr = lewrcsr;
201 1.12 drochner sc->sc_am7990.lsc.sc_nocarrier = NULL;
202 1.1 ragge
203 1.14 ragge sc->sc_am7990.lsc.sc_mem =
204 1.14 ragge (void *)uvm_km_valloc(kernel_map, (128 * 1024));
205 1.14 ragge if (sc->sc_am7990.lsc.sc_mem == 0)
206 1.14 ragge return;
207 1.14 ragge
208 1.14 ragge ioaccess((vaddr_t)sc->sc_am7990.lsc.sc_mem, 0x20120000,
209 1.14 ragge (128 * 1024) >> VAX_PGSHIFT);
210 1.14 ragge
211 1.14 ragge
212 1.14 ragge sc->sc_am7990.lsc.sc_addr = 0;
213 1.14 ragge sc->sc_am7990.lsc.sc_memsize = (64 * 1024);
214 1.14 ragge
215 1.14 ragge sc->sc_am7990.lsc.sc_copytodesc = lance_copytobuf_gap2;
216 1.14 ragge sc->sc_am7990.lsc.sc_copyfromdesc = lance_copyfrombuf_gap2;
217 1.14 ragge sc->sc_am7990.lsc.sc_copytobuf = lance_copytobuf_gap2;
218 1.14 ragge sc->sc_am7990.lsc.sc_copyfrombuf = lance_copyfrombuf_gap2;
219 1.14 ragge sc->sc_am7990.lsc.sc_zerobuf = lance_zerobuf_gap2;
220 1.1 ragge
221 1.1 ragge /*
222 1.1 ragge * Get the ethernet address out of rom
223 1.1 ragge */
224 1.14 ragge lance_addr = (int *)vax_map_physmem(0x20084200, 1);
225 1.14 ragge for (i = 0; i < 6; i++)
226 1.14 ragge sc->sc_am7990.lsc.sc_enaddr[i] = (u_char)lance_addr[i];
227 1.14 ragge vax_unmap_physmem((vaddr_t)lance_addr, 1);
228 1.1 ragge
229 1.12 drochner bcopy(self->dv_xname, sc->sc_am7990.lsc.sc_ethercom.ec_if.if_xname,
230 1.6 is IFNAMSIZ);
231 1.1 ragge am7990_config(&sc->sc_am7990);
232 1.1 ragge }
233 1.1 ragge
234 1.1 ragge /*
235 1.14 ragge * gap2: two bytes of data followed by two bytes of pad.
236 1.14 ragge *
237 1.14 ragge * Buffers must be 4-byte aligned. The code doesn't worry about
238 1.14 ragge * doing an extra byte.
239 1.1 ragge */
240 1.14 ragge
241 1.1 ragge void
242 1.14 ragge lance_copytobuf_gap2(sc, fromv, boff, len)
243 1.14 ragge struct lance_softc *sc;
244 1.14 ragge void *fromv;
245 1.14 ragge int boff;
246 1.14 ragge register int len;
247 1.1 ragge {
248 1.14 ragge volatile caddr_t buf = sc->sc_mem;
249 1.14 ragge register caddr_t from = fromv;
250 1.14 ragge register volatile u_int16_t *bptr;
251 1.14 ragge
252 1.14 ragge if (boff & 0x1) {
253 1.14 ragge /* handle unaligned first byte */
254 1.14 ragge bptr = ((volatile u_int16_t *)buf) + (boff - 1);
255 1.14 ragge *bptr = (*from++ << 8) | (*bptr & 0xff);
256 1.14 ragge bptr += 2;
257 1.14 ragge len--;
258 1.14 ragge } else
259 1.14 ragge bptr = ((volatile u_int16_t *)buf) + boff;
260 1.14 ragge while (len > 1) {
261 1.14 ragge *bptr = (from[1] << 8) | (from[0] & 0xff);
262 1.14 ragge bptr += 2;
263 1.14 ragge from += 2;
264 1.14 ragge len -= 2;
265 1.14 ragge }
266 1.14 ragge if (len == 1)
267 1.14 ragge *bptr = (u_int16_t)*from;
268 1.14 ragge }
269 1.14 ragge
270 1.14 ragge void
271 1.14 ragge lance_copyfrombuf_gap2(sc, tov, boff, len)
272 1.14 ragge struct lance_softc *sc;
273 1.14 ragge void *tov;
274 1.14 ragge int boff, len;
275 1.14 ragge {
276 1.14 ragge volatile caddr_t buf = sc->sc_mem;
277 1.14 ragge register caddr_t to = tov;
278 1.14 ragge register volatile u_int16_t *bptr;
279 1.14 ragge register u_int16_t tmp;
280 1.14 ragge
281 1.14 ragge if (boff & 0x1) {
282 1.14 ragge /* handle unaligned first byte */
283 1.14 ragge bptr = ((volatile u_int16_t *)buf) + (boff - 1);
284 1.14 ragge *to++ = (*bptr >> 8) & 0xff;
285 1.14 ragge bptr += 2;
286 1.14 ragge len--;
287 1.14 ragge } else
288 1.14 ragge bptr = ((volatile u_int16_t *)buf) + boff;
289 1.14 ragge while (len > 1) {
290 1.14 ragge tmp = *bptr;
291 1.14 ragge *to++ = tmp & 0xff;
292 1.14 ragge *to++ = (tmp >> 8) & 0xff;
293 1.14 ragge bptr += 2;
294 1.14 ragge len -= 2;
295 1.14 ragge }
296 1.14 ragge if (len == 1)
297 1.14 ragge *to = *bptr & 0xff;
298 1.14 ragge }
299 1.14 ragge
300 1.14 ragge void
301 1.14 ragge lance_zerobuf_gap2(sc, boff, len)
302 1.14 ragge struct lance_softc *sc;
303 1.14 ragge int boff, len;
304 1.14 ragge {
305 1.14 ragge volatile caddr_t buf = sc->sc_mem;
306 1.14 ragge register volatile u_int16_t *bptr;
307 1.1 ragge
308 1.14 ragge if ((unsigned)boff & 0x1) {
309 1.14 ragge bptr = ((volatile u_int16_t *)buf) + (boff - 1);
310 1.14 ragge *bptr &= 0xff;
311 1.14 ragge bptr += 2;
312 1.14 ragge len--;
313 1.14 ragge } else
314 1.14 ragge bptr = ((volatile u_int16_t *)buf) + boff;
315 1.14 ragge while (len > 0) {
316 1.14 ragge *bptr = 0;
317 1.14 ragge bptr += 2;
318 1.14 ragge len -= 2;
319 1.1 ragge }
320 1.14 ragge }
321