if_le.c revision 1.3.6.3 1 1.3.6.3 is /* $NetBSD: if_le.c,v 1.3.6.3 1997/03/10 15:25:52 is Exp $ */
2 1.1 ragge
3 1.1 ragge #define LEDEBUG 1 /* debug-level: 0 or 1 */
4 1.1 ragge /* #define LE_CHIP_IS_POKEY /* does VS2000 need this ??? */
5 1.1 ragge
6 1.1 ragge /*-
7 1.1 ragge * Copyright (c) 1995 Charles M. Hannum. All rights reserved.
8 1.1 ragge * Copyright (c) 1992, 1993
9 1.1 ragge * The Regents of the University of California. All rights reserved.
10 1.1 ragge *
11 1.1 ragge * This code is derived from software contributed to Berkeley by
12 1.1 ragge * Ralph Campbell and Rick Macklem.
13 1.1 ragge *
14 1.1 ragge * Redistribution and use in source and binary forms, with or without
15 1.1 ragge * modification, are permitted provided that the following conditions
16 1.1 ragge * are met:
17 1.1 ragge * 1. Redistributions of source code must retain the above copyright
18 1.1 ragge * notice, this list of conditions and the following disclaimer.
19 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright
20 1.1 ragge * notice, this list of conditions and the following disclaimer in the
21 1.1 ragge * documentation and/or other materials provided with the distribution.
22 1.1 ragge * 3. All advertising materials mentioning features or use of this software
23 1.1 ragge * must display the following acknowledgement:
24 1.1 ragge * This product includes software developed by the University of
25 1.1 ragge * California, Berkeley and its contributors.
26 1.1 ragge * 4. Neither the name of the University nor the names of its contributors
27 1.1 ragge * may be used to endorse or promote products derived from this software
28 1.1 ragge * without specific prior written permission.
29 1.1 ragge *
30 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
31 1.1 ragge * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32 1.1 ragge * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33 1.1 ragge * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
34 1.1 ragge * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
35 1.1 ragge * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
36 1.1 ragge * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37 1.1 ragge * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38 1.1 ragge * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
39 1.1 ragge * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40 1.1 ragge * SUCH DAMAGE.
41 1.1 ragge *
42 1.1 ragge * @(#)if_le.c 8.2 (Berkeley) 11/16/93
43 1.1 ragge */
44 1.1 ragge
45 1.1 ragge #include "bpfilter.h"
46 1.1 ragge
47 1.1 ragge #include <sys/param.h>
48 1.1 ragge #include <sys/syslog.h>
49 1.1 ragge #include <sys/socket.h>
50 1.1 ragge #include <sys/device.h>
51 1.1 ragge
52 1.1 ragge #include <net/if.h>
53 1.3.6.1 is #include <net/if_ether.h>
54 1.1 ragge
55 1.1 ragge #if INET
56 1.1 ragge #include <netinet/in.h>
57 1.3.6.3 is #include <netinet/if_inarp.h>
58 1.1 ragge #endif
59 1.1 ragge
60 1.1 ragge /*
61 1.1 ragge * This would be nice, but it's not yet there...
62 1.1 ragge *
63 1.1 ragge * #include <machine/autoconf.h>
64 1.1 ragge */
65 1.1 ragge
66 1.1 ragge #include <machine/pte.h>
67 1.1 ragge #include <machine/cpu.h>
68 1.1 ragge #include <machine/mtpr.h>
69 1.1 ragge #include <machine/uvax.h>
70 1.1 ragge #include <machine/ka410.h>
71 1.1 ragge #include <machine/vsbus.h>
72 1.1 ragge
73 1.1 ragge #include <dev/ic/am7990reg.h>
74 1.1 ragge #define LE_NEED_BUF_CONTIG
75 1.1 ragge #include <dev/ic/am7990var.h>
76 1.1 ragge
77 1.1 ragge #include <dev/tc/if_levar.h>
78 1.1 ragge
79 1.1 ragge #define xdebug(x)
80 1.1 ragge
81 1.1 ragge #ifdef LE_CHIP_IS_POKEY
82 1.1 ragge /*
83 1.1 ragge * access LANCE registers and double-check their contents
84 1.1 ragge */
85 1.1 ragge #define wbflush() /* do nothing */
86 1.1 ragge void lewritereg();
87 1.1 ragge #define LERDWR(cntl, src, dst) { (dst) = (src); wbflush(); }
88 1.1 ragge #define LEWREG(src, dst) lewritereg(&(dst), (src))
89 1.1 ragge #endif
90 1.1 ragge
91 1.1 ragge #define LE_IOSIZE 64*1024 /* 64K of real-mem are reserved and already */
92 1.1 ragge extern void *le_iomem; /* mapped into virt-mem by cpu_steal_pages */
93 1.1 ragge extern u_long le_ioaddr; /* le_iomem is virt, le_ioaddr is phys */
94 1.1 ragge
95 1.1 ragge #define LE_SOFTC(unit) le_cd.cd_devs[unit]
96 1.1 ragge #define LE_DELAY(x) DELAY(x)
97 1.1 ragge
98 1.1 ragge int lematch __P((struct device *, void *, void *));
99 1.1 ragge void leattach __P((struct device *, struct device *, void *));
100 1.1 ragge
101 1.1 ragge int leintr __P((void *sc));
102 1.1 ragge
103 1.1 ragge struct cfattach le_ca = {
104 1.1 ragge sizeof(struct le_softc), lematch, leattach
105 1.1 ragge };
106 1.1 ragge
107 1.3.6.2 is hide void lewrcsr __P ((struct am7990_softc *, u_int16_t, u_int16_t));
108 1.3.6.2 is hide u_int16_t lerdcsr __P ((struct am7990_softc *, u_int16_t));
109 1.3.6.2 is
110 1.3.6.2 is hide void
111 1.1 ragge lewrcsr(sc, port, val)
112 1.3.6.2 is struct am7990_softc *sc;
113 1.1 ragge u_int16_t port, val;
114 1.1 ragge {
115 1.3.6.2 is struct lereg1 *ler1 = ((struct le_softc *)sc)->sc_r1;
116 1.1 ragge
117 1.1 ragge #ifdef LE_CHIP_IS_POKEY
118 1.1 ragge LEWREG(port, ler1->ler1_rap);
119 1.1 ragge LERDWR(port, val, ler1->ler1_rdp);
120 1.1 ragge #else
121 1.1 ragge ler1->ler1_rap = port;
122 1.1 ragge ler1->ler1_rdp = val;
123 1.1 ragge #endif
124 1.1 ragge }
125 1.1 ragge
126 1.3.6.2 is hide u_int16_t
127 1.1 ragge lerdcsr(sc, port)
128 1.3.6.2 is struct am7990_softc *sc;
129 1.1 ragge u_int16_t port;
130 1.1 ragge {
131 1.3.6.2 is struct lereg1 *ler1 = ((struct le_softc *)sc)->sc_r1;
132 1.1 ragge u_int16_t val;
133 1.1 ragge
134 1.1 ragge #ifdef LE_CHIP_IS_POKEY
135 1.1 ragge LEWREG(port, ler1->ler1_rap);
136 1.1 ragge LERDWR(0, ler1->ler1_rdp, val);
137 1.1 ragge #else
138 1.1 ragge ler1->ler1_rap = port;
139 1.1 ragge val = ler1->ler1_rdp;
140 1.1 ragge #endif
141 1.1 ragge return (val);
142 1.1 ragge }
143 1.1 ragge
144 1.3.6.2 is integrate void
145 1.3.6.2 is lehwinit(sc)
146 1.3.6.2 is struct am7990_softc *sc;
147 1.3.6.2 is {
148 1.3.6.2 is }
149 1.3.6.2 is
150 1.1 ragge int
151 1.1 ragge lematch(parent, match, aux)
152 1.1 ragge struct device *parent;
153 1.1 ragge void *match, *aux;
154 1.1 ragge {
155 1.1 ragge struct cfdata *cf = match;
156 1.1 ragge struct confargs *ca = aux;
157 1.1 ragge
158 1.1 ragge /*
159 1.1 ragge * There could/should be more checks, but for now...
160 1.1 ragge */
161 1.1 ragge if (strcmp(ca->ca_name, "le") &&
162 1.1 ragge strcmp(ca->ca_name, "am7990") &&
163 1.1 ragge strcmp(ca->ca_name, "AM7990"))
164 1.1 ragge return (0);
165 1.1 ragge
166 1.1 ragge return (1);
167 1.1 ragge }
168 1.1 ragge
169 1.1 ragge /*
170 1.1 ragge *
171 1.1 ragge */
172 1.1 ragge void
173 1.1 ragge leattach(parent, self, aux)
174 1.1 ragge struct device *parent, *self;
175 1.1 ragge void *aux;
176 1.1 ragge {
177 1.1 ragge register struct le_softc *sc = (void *)self;
178 1.1 ragge struct confargs *ca = aux;
179 1.1 ragge u_char *cp; /* pointer to MAC address */
180 1.1 ragge int i;
181 1.1 ragge
182 1.1 ragge sc->sc_r1 = (void*)uvax_phys2virt(ca->ca_ioaddr);
183 1.1 ragge
184 1.1 ragge sc->sc_am7990.sc_conf3 = 0;
185 1.1 ragge sc->sc_am7990.sc_mem = le_iomem;
186 1.1 ragge sc->sc_am7990.sc_addr = le_ioaddr;
187 1.1 ragge sc->sc_am7990.sc_memsize = LE_IOSIZE;
188 1.3.6.2 is sc->sc_am7990.sc_wrcsr = lewrcsr;
189 1.3.6.2 is sc->sc_am7990.sc_rdcsr = lerdcsr;
190 1.3.6.2 is sc->sc_am7990.sc_hwinit = lehwinit;
191 1.3.6.2 is sc->sc_am7990.sc_nocarrier = NULL;
192 1.1 ragge
193 1.1 ragge xdebug(("leattach: mem=%x, addr=%x, size=%x (%d)\n",
194 1.1 ragge sc->sc_am7990.sc_mem, sc->sc_am7990.sc_addr,
195 1.1 ragge sc->sc_am7990.sc_memsize, sc->sc_am7990.sc_memsize));
196 1.1 ragge
197 1.1 ragge sc->sc_am7990.sc_copytodesc = am7990_copytobuf_contig;
198 1.1 ragge sc->sc_am7990.sc_copyfromdesc = am7990_copyfrombuf_contig;
199 1.1 ragge sc->sc_am7990.sc_copytobuf = am7990_copytobuf_contig;
200 1.1 ragge sc->sc_am7990.sc_copyfrombuf = am7990_copyfrombuf_contig;
201 1.1 ragge sc->sc_am7990.sc_zerobuf = am7990_zerobuf_contig;
202 1.1 ragge
203 1.1 ragge /*
204 1.1 ragge * Get the ethernet address out of rom
205 1.1 ragge */
206 1.3.6.1 is for (i = 0; i < sizeof(sc->sc_am7990.sc_enaddr); i++) {
207 1.1 ragge int *eaddr = (void*)uvax_phys2virt(ca->ca_enaddr);
208 1.3.6.1 is sc->sc_am7990.sc_enaddr[i] = (u_char)eaddr[i];
209 1.1 ragge }
210 1.1 ragge
211 1.3.6.1 is bcopy(self->dv_xname, sc->sc_am7990.sc_ethercom.ec_if.if_xname,
212 1.3.6.1 is IFNAMSIZ);
213 1.1 ragge am7990_config(&sc->sc_am7990);
214 1.1 ragge
215 1.1 ragge #ifdef LEDEBUG
216 1.1 ragge sc->sc_am7990.sc_debug = LEDEBUG;
217 1.1 ragge #endif
218 1.1 ragge
219 1.1 ragge vsbus_intr_register(ca, am7990_intr, &sc->sc_am7990);
220 1.1 ragge vsbus_intr_enable(ca);
221 1.1 ragge }
222 1.1 ragge
223 1.1 ragge #ifdef LE_CHIP_IS_POKEY
224 1.1 ragge /*
225 1.1 ragge * Write a lance register port, reading it back to ensure success. This seems
226 1.1 ragge * to be necessary during initialization, since the chip appears to be a bit
227 1.1 ragge * pokey sometimes.
228 1.1 ragge */
229 1.1 ragge void
230 1.1 ragge lewritereg(regptr, val)
231 1.1 ragge register volatile u_short *regptr;
232 1.1 ragge register u_short val;
233 1.1 ragge {
234 1.1 ragge register int i = 0;
235 1.1 ragge
236 1.1 ragge while (*regptr != val) {
237 1.1 ragge *regptr = val;
238 1.1 ragge wbflush();
239 1.1 ragge if (++i > 10000) {
240 1.3 christos printf("le: Reg did not settle (to x%x): x%x\n", val,
241 1.1 ragge *regptr);
242 1.1 ragge return;
243 1.1 ragge }
244 1.1 ragge DELAY(100);
245 1.1 ragge }
246 1.1 ragge }
247 1.1 ragge #endif
248