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      1  1.29      rin /*	$NetBSD: if_le_vsbus.c,v 1.29 2022/05/29 10:45:05 rin Exp $	*/
      2   1.1    ragge 
      3   1.1    ragge /*-
      4   1.1    ragge  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5   1.1    ragge  * All rights reserved.
      6   1.1    ragge  *
      7   1.1    ragge  * This code is derived from software contributed to The NetBSD Foundation
      8   1.1    ragge  * by Charles M. Hannum.
      9   1.1    ragge  *
     10   1.1    ragge  * Redistribution and use in source and binary forms, with or without
     11   1.1    ragge  * modification, are permitted provided that the following conditions
     12   1.1    ragge  * are met:
     13   1.1    ragge  * 1. Redistributions of source code must retain the above copyright
     14   1.1    ragge  *    notice, this list of conditions and the following disclaimer.
     15   1.1    ragge  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1    ragge  *    notice, this list of conditions and the following disclaimer in the
     17   1.1    ragge  *    documentation and/or other materials provided with the distribution.
     18   1.1    ragge  *
     19   1.1    ragge  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20   1.1    ragge  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21   1.1    ragge  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22   1.1    ragge  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23   1.1    ragge  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24   1.1    ragge  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25   1.1    ragge  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26   1.1    ragge  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27   1.1    ragge  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28   1.1    ragge  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29   1.1    ragge  * POSSIBILITY OF SUCH DAMAGE.
     30   1.1    ragge  */
     31   1.1    ragge 
     32   1.1    ragge /*-
     33   1.1    ragge  * Copyright (c) 1992, 1993
     34   1.1    ragge  *	The Regents of the University of California.  All rights reserved.
     35   1.1    ragge  *
     36   1.1    ragge  * This code is derived from software contributed to Berkeley by
     37   1.1    ragge  * Ralph Campbell and Rick Macklem.
     38   1.1    ragge  *
     39   1.1    ragge  * Redistribution and use in source and binary forms, with or without
     40   1.1    ragge  * modification, are permitted provided that the following conditions
     41   1.1    ragge  * are met:
     42   1.1    ragge  * 1. Redistributions of source code must retain the above copyright
     43   1.1    ragge  *    notice, this list of conditions and the following disclaimer.
     44   1.1    ragge  * 2. Redistributions in binary form must reproduce the above copyright
     45   1.1    ragge  *    notice, this list of conditions and the following disclaimer in the
     46   1.1    ragge  *    documentation and/or other materials provided with the distribution.
     47  1.19      agc  * 3. Neither the name of the University nor the names of its contributors
     48   1.1    ragge  *    may be used to endorse or promote products derived from this software
     49   1.1    ragge  *    without specific prior written permission.
     50   1.1    ragge  *
     51   1.1    ragge  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     52   1.1    ragge  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     53   1.1    ragge  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     54   1.1    ragge  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     55   1.1    ragge  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     56   1.1    ragge  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     57   1.1    ragge  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     58   1.1    ragge  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     59   1.1    ragge  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     60   1.1    ragge  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     61   1.1    ragge  * SUCH DAMAGE.
     62   1.1    ragge  *
     63   1.1    ragge  *	@(#)if_le.c	8.2 (Berkeley) 11/16/93
     64   1.1    ragge  */
     65  1.18    lukem 
     66  1.18    lukem #include <sys/cdefs.h>
     67  1.29      rin __KERNEL_RCSID(0, "$NetBSD: if_le_vsbus.c,v 1.29 2022/05/29 10:45:05 rin Exp $");
     68   1.1    ragge 
     69   1.1    ragge #include "opt_inet.h"
     70   1.1    ragge 
     71   1.1    ragge #include <sys/param.h>
     72  1.28     matt #include <sys/bus.h>
     73  1.28     matt #include <sys/cpu.h>
     74  1.28     matt #include <sys/device.h>
     75   1.1    ragge #include <sys/socket.h>
     76   1.1    ragge 
     77  1.10      mrg #include <uvm/uvm_extern.h>
     78   1.1    ragge 
     79   1.1    ragge #include <net/if.h>
     80   1.1    ragge #include <net/if_ether.h>
     81   1.1    ragge #include <net/if_media.h>
     82   1.1    ragge 
     83  1.12    lukem #ifdef INET
     84   1.1    ragge #include <netinet/in.h>
     85   1.1    ragge #include <netinet/if_inarp.h>
     86   1.1    ragge #endif
     87   1.1    ragge 
     88   1.2    ragge #include <machine/sid.h>
     89   1.3     matt #include <machine/scb.h>
     90   1.1    ragge #include <machine/vsbus.h>
     91   1.1    ragge 
     92   1.1    ragge #include <dev/ic/lancereg.h>
     93   1.1    ragge #include <dev/ic/lancevar.h>
     94   1.1    ragge #include <dev/ic/am7990reg.h>
     95   1.1    ragge #include <dev/ic/am7990var.h>
     96   1.1    ragge 
     97   1.1    ragge #include "ioconf.h"
     98   1.1    ragge 
     99   1.1    ragge struct le_softc {
    100   1.1    ragge 	struct	am7990_softc sc_am7990; /* Must be first */
    101   1.7     matt 	struct	evcnt sc_intrcnt;
    102   1.4     matt 	bus_dmamap_t sc_dm;
    103  1.22     matt 	volatile uint16_t *sc_rap;
    104  1.22     matt 	volatile uint16_t *sc_rdp;
    105   1.1    ragge };
    106   1.1    ragge 
    107  1.22     matt static	int	le_vsbus_match(device_t, cfdata_t, void *);
    108  1.22     matt static	void	le_vsbus_attach(device_t, device_t, void *);
    109  1.22     matt static	void	lewrcsr(struct lance_softc *, uint16_t, uint16_t);
    110  1.22     matt static	uint16_t lerdcsr(struct lance_softc *, uint16_t);
    111   1.1    ragge 
    112  1.23  tsutsui CFATTACH_DECL_NEW(le_vsbus, sizeof(struct le_softc),
    113  1.15  thorpej     le_vsbus_match, le_vsbus_attach, NULL, NULL);
    114   1.1    ragge 
    115  1.22     matt void
    116  1.22     matt lewrcsr(struct lance_softc *ls, uint16_t port, uint16_t val)
    117   1.1    ragge {
    118  1.22     matt 	struct le_softc * const sc = (void *)ls;
    119   1.1    ragge 
    120   1.1    ragge 	*sc->sc_rap = port;
    121   1.1    ragge 	*sc->sc_rdp = val;
    122   1.1    ragge }
    123   1.1    ragge 
    124  1.22     matt uint16_t
    125  1.22     matt lerdcsr(struct lance_softc *ls, uint16_t port)
    126   1.1    ragge {
    127  1.22     matt 	struct le_softc * const sc = (void *)ls;
    128   1.1    ragge 
    129   1.1    ragge 	*sc->sc_rap = port;
    130   1.1    ragge 	return *sc->sc_rdp;
    131   1.1    ragge }
    132   1.1    ragge 
    133   1.4     matt static int
    134  1.22     matt le_vsbus_match(device_t parent, cfdata_t cf, void *aux)
    135   1.1    ragge {
    136  1.22     matt 	struct vsbus_attach_args * const va = aux;
    137  1.22     matt 	volatile uint16_t *rdp, *rap;
    138   1.4     matt 	struct leinit initblock;
    139   1.4     matt 	bus_dmamap_t map;
    140   1.4     matt 	int i;
    141   1.4     matt 	int rv = 0;
    142   1.4     matt 	int error;
    143   1.1    ragge 
    144  1.11    ragge 	if (vax_boardtype == VAX_BTYP_49 || vax_boardtype == VAX_BTYP_53)
    145   1.2    ragge 		return 0;
    146   1.4     matt 
    147   1.4     matt 	error = bus_dmamap_create(va->va_dmat, sizeof(initblock), 1,
    148   1.5    ragge 	    sizeof(initblock), 0, BUS_DMA_NOWAIT, &map);
    149   1.4     matt 	if (error) {
    150   1.4     matt 		return 0;
    151   1.4     matt 	}
    152   1.4     matt 
    153   1.4     matt 	error = bus_dmamap_load(va->va_dmat, map, &initblock,
    154   1.4     matt 	    sizeof(initblock), NULL, BUS_DMA_NOWAIT|BUS_DMA_COHERENT);
    155   1.4     matt 	if (error) {
    156   1.4     matt 		bus_dmamap_destroy(va->va_dmat, map);
    157   1.4     matt 		return 0;
    158   1.4     matt 	}
    159   1.4     matt 
    160   1.4     matt 	memset(&initblock, 0, sizeof(initblock));
    161   1.4     matt 
    162  1.22     matt 	rdp = (uint16_t *)va->va_addr;
    163   1.1    ragge 	rap = rdp + 2;
    164   1.1    ragge 
    165   1.1    ragge 	/* Make sure the chip is stopped. */
    166   1.1    ragge 	*rap = LE_CSR0;
    167   1.1    ragge 	*rdp = LE_C0_STOP;
    168   1.1    ragge 	DELAY(100);
    169   1.4     matt 	*rap = LE_CSR1;
    170   1.4     matt 	*rdp = map->dm_segs->ds_addr & 0xffff;
    171   1.4     matt 	*rap = LE_CSR2;
    172   1.4     matt 	*rdp = (map->dm_segs->ds_addr >> 16) & 0xffff;
    173   1.4     matt 	*rap = LE_CSR0;
    174   1.1    ragge 	*rdp = LE_C0_INIT|LE_C0_INEA;
    175   1.1    ragge 
    176   1.1    ragge 	/* Wait for initialization to finish. */
    177   1.4     matt 	for (i = 100; i >= 0; i--) {
    178   1.4     matt 		DELAY(1000);
    179   1.4     matt 		/* Should have interrupted by now */
    180   1.4     matt 		if (*rdp & LE_C0_IDON)
    181   1.4     matt 			rv = 1;
    182   1.4     matt 	}
    183   1.4     matt 	*rap = LE_CSR0;
    184   1.4     matt 	*rdp = LE_C0_STOP;
    185   1.1    ragge 
    186   1.4     matt 	bus_dmamap_unload(va->va_dmat, map);
    187   1.4     matt 	bus_dmamap_destroy(va->va_dmat, map);
    188   1.4     matt 	return rv;
    189   1.1    ragge }
    190   1.1    ragge 
    191   1.4     matt static void
    192  1.22     matt le_vsbus_attach(device_t parent, device_t self, void *aux)
    193   1.1    ragge {
    194  1.22     matt 	struct vsbus_attach_args * const va = aux;
    195  1.22     matt 	struct le_softc * const sc = device_private(self);
    196   1.1    ragge 	bus_dma_segment_t seg;
    197   1.1    ragge 	int *lance_addr;
    198   1.1    ragge 	int i, err, rseg;
    199   1.1    ragge 
    200  1.23  tsutsui 	sc->sc_am7990.lsc.sc_dev = self;
    201  1.22     matt 	sc->sc_rdp = (uint16_t *) vax_map_physmem(NI_BASE, 1);
    202   1.1    ragge 	sc->sc_rap = sc->sc_rdp + 2;
    203   1.1    ragge 
    204   1.1    ragge 	/*
    205   1.1    ragge 	 * MD functions.
    206   1.1    ragge 	 */
    207   1.1    ragge 	sc->sc_am7990.lsc.sc_rdcsr = lerdcsr;
    208   1.1    ragge 	sc->sc_am7990.lsc.sc_wrcsr = lewrcsr;
    209   1.1    ragge 	sc->sc_am7990.lsc.sc_nocarrier = NULL;
    210   1.1    ragge 
    211   1.7     matt 	scb_vecalloc(va->va_cvec, (void (*)(void *)) am7990_intr, sc,
    212   1.7     matt 		SCB_ISTACK, &sc->sc_intrcnt);
    213   1.8     matt 	evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, NULL,
    214  1.22     matt 		device_xname(self), "intr");
    215   1.7     matt 
    216  1.23  tsutsui 	/*
    217  1.23  tsutsui 	 * Allocate a (DMA-safe) block for all descriptors and buffers.
    218  1.23  tsutsui 	 */
    219   1.1    ragge 
    220   1.1    ragge #define ALLOCSIZ (64 * 1024)
    221  1.23  tsutsui 	err = bus_dmamem_alloc(va->va_dmat, ALLOCSIZ, PAGE_SIZE, 0,
    222  1.23  tsutsui 	    &seg, 1, &rseg, BUS_DMA_NOWAIT);
    223  1.23  tsutsui 	if (err) {
    224  1.23  tsutsui 		aprint_error(": unable to alloc buffer block: err %d\n", err);
    225  1.23  tsutsui 		return;
    226  1.23  tsutsui 	}
    227  1.23  tsutsui 	err = bus_dmamem_map(va->va_dmat, &seg, rseg, ALLOCSIZ,
    228  1.23  tsutsui 	    (void **)&sc->sc_am7990.lsc.sc_mem,
    229   1.1    ragge 	    BUS_DMA_NOWAIT|BUS_DMA_COHERENT);
    230  1.23  tsutsui 	if (err) {
    231  1.23  tsutsui 		aprint_error(": unable to map buffer block: err %d\n", err);
    232  1.29      rin 		goto bad_free;
    233  1.23  tsutsui 	}
    234  1.23  tsutsui 	bus_dmamap_create(va->va_dmat, ALLOCSIZ, rseg, ALLOCSIZ,
    235   1.4     matt 	    0, BUS_DMA_NOWAIT, &sc->sc_dm);
    236  1.23  tsutsui 	if (err) {
    237  1.23  tsutsui 		aprint_error(": unable to create DMA map: err %d\n", err);
    238  1.29      rin 		goto bad_unmap;
    239  1.23  tsutsui 	}
    240   1.4     matt 	err = bus_dmamap_load(va->va_dmat, sc->sc_dm, sc->sc_am7990.lsc.sc_mem,
    241   1.4     matt 	    ALLOCSIZ, NULL, BUS_DMA_NOWAIT);
    242  1.23  tsutsui 	if (err) {
    243  1.23  tsutsui 		aprint_error(": unable to load DMA map: err %d\n", err);
    244  1.29      rin 		goto bad_destroy;
    245  1.23  tsutsui 	}
    246  1.22     matt 	aprint_normal(" buf 0x%lx-0x%lx", sc->sc_dm->dm_segs->ds_addr,
    247   1.4     matt 	    sc->sc_dm->dm_segs->ds_addr + sc->sc_dm->dm_segs->ds_len - 1);
    248   1.4     matt 	sc->sc_am7990.lsc.sc_addr = sc->sc_dm->dm_segs->ds_addr & 0xffffff;
    249   1.4     matt 	sc->sc_am7990.lsc.sc_memsize = sc->sc_dm->dm_segs->ds_len;
    250   1.1    ragge 
    251   1.1    ragge 	sc->sc_am7990.lsc.sc_copytodesc = lance_copytobuf_contig;
    252   1.1    ragge 	sc->sc_am7990.lsc.sc_copyfromdesc = lance_copyfrombuf_contig;
    253   1.1    ragge 	sc->sc_am7990.lsc.sc_copytobuf = lance_copytobuf_contig;
    254   1.1    ragge 	sc->sc_am7990.lsc.sc_copyfrombuf = lance_copyfrombuf_contig;
    255   1.1    ragge 	sc->sc_am7990.lsc.sc_zerobuf = lance_zerobuf_contig;
    256   1.1    ragge 
    257   1.4     matt #ifdef LEDEBUG
    258   1.4     matt 	sc->sc_am7990.lsc.sc_debug = 1;
    259   1.4     matt #endif
    260   1.1    ragge 	/*
    261   1.1    ragge 	 * Get the ethernet address out of rom
    262   1.1    ragge 	 */
    263   1.1    ragge 	lance_addr = (int *)vax_map_physmem(NI_ADDR, 1);
    264  1.23  tsutsui 	for (i = 0; i < ETHER_ADDR_LEN; i++)
    265   1.1    ragge 		sc->sc_am7990.lsc.sc_enaddr[i] = (u_char)lance_addr[i];
    266   1.1    ragge 	vax_unmap_physmem((vaddr_t)lance_addr, 1);
    267   1.1    ragge 
    268  1.26   cegger 	memcpy(sc->sc_am7990.lsc.sc_ethercom.ec_if.if_xname, device_xname(self),
    269   1.1    ragge 	    IFNAMSIZ);
    270  1.22     matt 
    271   1.4     matt 	/* Prettier printout */
    272  1.22     matt 	aprint_normal("\n%s", device_xname(self));
    273   1.4     matt 
    274   1.1    ragge 	am7990_config(&sc->sc_am7990);
    275  1.29      rin 
    276  1.29      rin 	return;
    277  1.29      rin 
    278  1.29      rin  bad_destroy:
    279  1.29      rin 	bus_dmamap_destroy(va->va_dmat, sc->sc_dm);
    280  1.29      rin  bad_unmap:
    281  1.29      rin 	bus_dmamem_unmap(va->va_dmat, sc->sc_am7990.lsc.sc_mem, ALLOCSIZ);
    282  1.29      rin  bad_free:
    283  1.29      rin 	bus_dmamem_free(va->va_dmat, &seg, rseg);
    284   1.1    ragge }
    285