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if_le_vsbus.c revision 1.21.40.2
      1  1.21.40.1      mjf /*	$NetBSD: if_le_vsbus.c,v 1.21.40.2 2008/06/02 13:22:48 mjf Exp $	*/
      2        1.1    ragge 
      3        1.1    ragge /*-
      4        1.1    ragge  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5        1.1    ragge  * All rights reserved.
      6        1.1    ragge  *
      7        1.1    ragge  * This code is derived from software contributed to The NetBSD Foundation
      8        1.1    ragge  * by Charles M. Hannum.
      9        1.1    ragge  *
     10        1.1    ragge  * Redistribution and use in source and binary forms, with or without
     11        1.1    ragge  * modification, are permitted provided that the following conditions
     12        1.1    ragge  * are met:
     13        1.1    ragge  * 1. Redistributions of source code must retain the above copyright
     14        1.1    ragge  *    notice, this list of conditions and the following disclaimer.
     15        1.1    ragge  * 2. Redistributions in binary form must reproduce the above copyright
     16        1.1    ragge  *    notice, this list of conditions and the following disclaimer in the
     17        1.1    ragge  *    documentation and/or other materials provided with the distribution.
     18        1.1    ragge  *
     19        1.1    ragge  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20        1.1    ragge  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21        1.1    ragge  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22        1.1    ragge  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23        1.1    ragge  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24        1.1    ragge  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25        1.1    ragge  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26        1.1    ragge  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27        1.1    ragge  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28        1.1    ragge  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29        1.1    ragge  * POSSIBILITY OF SUCH DAMAGE.
     30        1.1    ragge  */
     31        1.1    ragge 
     32        1.1    ragge /*-
     33        1.1    ragge  * Copyright (c) 1992, 1993
     34        1.1    ragge  *	The Regents of the University of California.  All rights reserved.
     35        1.1    ragge  *
     36        1.1    ragge  * This code is derived from software contributed to Berkeley by
     37        1.1    ragge  * Ralph Campbell and Rick Macklem.
     38        1.1    ragge  *
     39        1.1    ragge  * Redistribution and use in source and binary forms, with or without
     40        1.1    ragge  * modification, are permitted provided that the following conditions
     41        1.1    ragge  * are met:
     42        1.1    ragge  * 1. Redistributions of source code must retain the above copyright
     43        1.1    ragge  *    notice, this list of conditions and the following disclaimer.
     44        1.1    ragge  * 2. Redistributions in binary form must reproduce the above copyright
     45        1.1    ragge  *    notice, this list of conditions and the following disclaimer in the
     46        1.1    ragge  *    documentation and/or other materials provided with the distribution.
     47       1.19      agc  * 3. Neither the name of the University nor the names of its contributors
     48        1.1    ragge  *    may be used to endorse or promote products derived from this software
     49        1.1    ragge  *    without specific prior written permission.
     50        1.1    ragge  *
     51        1.1    ragge  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     52        1.1    ragge  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     53        1.1    ragge  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     54        1.1    ragge  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     55        1.1    ragge  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     56        1.1    ragge  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     57        1.1    ragge  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     58        1.1    ragge  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     59        1.1    ragge  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     60        1.1    ragge  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     61        1.1    ragge  * SUCH DAMAGE.
     62        1.1    ragge  *
     63        1.1    ragge  *	@(#)if_le.c	8.2 (Berkeley) 11/16/93
     64        1.1    ragge  */
     65       1.18    lukem 
     66       1.18    lukem #include <sys/cdefs.h>
     67  1.21.40.1      mjf __KERNEL_RCSID(0, "$NetBSD: if_le_vsbus.c,v 1.21.40.2 2008/06/02 13:22:48 mjf Exp $");
     68        1.1    ragge 
     69        1.1    ragge #include "opt_inet.h"
     70        1.1    ragge #include "bpfilter.h"
     71        1.1    ragge 
     72        1.1    ragge #include <sys/param.h>
     73        1.1    ragge #include <sys/syslog.h>
     74        1.1    ragge #include <sys/socket.h>
     75        1.1    ragge #include <sys/device.h>
     76        1.1    ragge #include <sys/reboot.h>
     77        1.1    ragge 
     78       1.10      mrg #include <uvm/uvm_extern.h>
     79        1.1    ragge 
     80        1.1    ragge #include <net/if.h>
     81        1.1    ragge #include <net/if_ether.h>
     82        1.1    ragge #include <net/if_media.h>
     83        1.1    ragge 
     84       1.12    lukem #ifdef INET
     85        1.1    ragge #include <netinet/in.h>
     86        1.1    ragge #include <netinet/if_inarp.h>
     87        1.1    ragge #endif
     88        1.1    ragge 
     89        1.1    ragge #include <machine/cpu.h>
     90        1.2    ragge #include <machine/sid.h>
     91        1.3     matt #include <machine/scb.h>
     92        1.1    ragge #include <machine/bus.h>
     93        1.1    ragge #include <machine/vsbus.h>
     94        1.1    ragge 
     95        1.1    ragge #include <dev/ic/lancereg.h>
     96        1.1    ragge #include <dev/ic/lancevar.h>
     97        1.1    ragge #include <dev/ic/am7990reg.h>
     98        1.1    ragge #include <dev/ic/am7990var.h>
     99        1.1    ragge 
    100        1.1    ragge #include "ioconf.h"
    101        1.1    ragge 
    102        1.1    ragge struct le_softc {
    103        1.1    ragge 	struct	am7990_softc sc_am7990; /* Must be first */
    104        1.7     matt 	struct	evcnt sc_intrcnt;
    105        1.4     matt 	bus_dmamap_t sc_dm;
    106  1.21.40.1      mjf 	volatile uint16_t *sc_rap;
    107  1.21.40.1      mjf 	volatile uint16_t *sc_rdp;
    108        1.1    ragge };
    109        1.1    ragge 
    110  1.21.40.1      mjf static	int	le_vsbus_match(device_t, cfdata_t, void *);
    111  1.21.40.1      mjf static	void	le_vsbus_attach(device_t, device_t, void *);
    112  1.21.40.1      mjf static	void	lewrcsr(struct lance_softc *, uint16_t, uint16_t);
    113  1.21.40.1      mjf static	uint16_t lerdcsr(struct lance_softc *, uint16_t);
    114        1.1    ragge 
    115  1.21.40.2      mjf CFATTACH_DECL_NEW(le_vsbus, sizeof(struct le_softc),
    116       1.15  thorpej     le_vsbus_match, le_vsbus_attach, NULL, NULL);
    117        1.1    ragge 
    118  1.21.40.1      mjf void
    119  1.21.40.1      mjf lewrcsr(struct lance_softc *ls, uint16_t port, uint16_t val)
    120        1.1    ragge {
    121  1.21.40.1      mjf 	struct le_softc * const sc = (void *)ls;
    122        1.1    ragge 
    123        1.1    ragge 	*sc->sc_rap = port;
    124        1.1    ragge 	*sc->sc_rdp = val;
    125        1.1    ragge }
    126        1.1    ragge 
    127  1.21.40.1      mjf uint16_t
    128  1.21.40.1      mjf lerdcsr(struct lance_softc *ls, uint16_t port)
    129        1.1    ragge {
    130  1.21.40.1      mjf 	struct le_softc * const sc = (void *)ls;
    131        1.1    ragge 
    132        1.1    ragge 	*sc->sc_rap = port;
    133        1.1    ragge 	return *sc->sc_rdp;
    134        1.1    ragge }
    135        1.1    ragge 
    136        1.4     matt static int
    137  1.21.40.1      mjf le_vsbus_match(device_t parent, cfdata_t cf, void *aux)
    138        1.1    ragge {
    139  1.21.40.1      mjf 	struct vsbus_attach_args * const va = aux;
    140  1.21.40.1      mjf 	volatile uint16_t *rdp, *rap;
    141        1.4     matt 	struct leinit initblock;
    142        1.4     matt 	bus_dmamap_t map;
    143        1.4     matt 	int i;
    144        1.4     matt 	int rv = 0;
    145        1.4     matt 	int error;
    146        1.1    ragge 
    147       1.11    ragge 	if (vax_boardtype == VAX_BTYP_49 || vax_boardtype == VAX_BTYP_53)
    148        1.2    ragge 		return 0;
    149        1.4     matt 
    150        1.4     matt 	error = bus_dmamap_create(va->va_dmat, sizeof(initblock), 1,
    151        1.5    ragge 	    sizeof(initblock), 0, BUS_DMA_NOWAIT, &map);
    152        1.4     matt 	if (error) {
    153        1.4     matt 		return 0;
    154        1.4     matt 	}
    155        1.4     matt 
    156        1.4     matt 	error = bus_dmamap_load(va->va_dmat, map, &initblock,
    157        1.4     matt 	    sizeof(initblock), NULL, BUS_DMA_NOWAIT|BUS_DMA_COHERENT);
    158        1.4     matt 	if (error) {
    159        1.4     matt 		bus_dmamap_destroy(va->va_dmat, map);
    160        1.4     matt 		return 0;
    161        1.4     matt 	}
    162        1.4     matt 
    163        1.4     matt 	memset(&initblock, 0, sizeof(initblock));
    164        1.4     matt 
    165  1.21.40.1      mjf 	rdp = (uint16_t *)va->va_addr;
    166        1.1    ragge 	rap = rdp + 2;
    167        1.1    ragge 
    168        1.1    ragge 	/* Make sure the chip is stopped. */
    169        1.1    ragge 	*rap = LE_CSR0;
    170        1.1    ragge 	*rdp = LE_C0_STOP;
    171        1.1    ragge 	DELAY(100);
    172        1.4     matt 	*rap = LE_CSR1;
    173        1.4     matt 	*rdp = map->dm_segs->ds_addr & 0xffff;
    174        1.4     matt 	*rap = LE_CSR2;
    175        1.4     matt 	*rdp = (map->dm_segs->ds_addr >> 16) & 0xffff;
    176        1.4     matt 	*rap = LE_CSR0;
    177        1.1    ragge 	*rdp = LE_C0_INIT|LE_C0_INEA;
    178        1.1    ragge 
    179        1.1    ragge 	/* Wait for initialization to finish. */
    180        1.4     matt 	for (i = 100; i >= 0; i--) {
    181        1.4     matt 		DELAY(1000);
    182        1.4     matt 		/* Should have interrupted by now */
    183        1.4     matt 		if (*rdp & LE_C0_IDON)
    184        1.4     matt 			rv = 1;
    185        1.4     matt 	}
    186        1.4     matt 	*rap = LE_CSR0;
    187        1.4     matt 	*rdp = LE_C0_STOP;
    188        1.1    ragge 
    189        1.4     matt 	bus_dmamap_unload(va->va_dmat, map);
    190        1.4     matt 	bus_dmamap_destroy(va->va_dmat, map);
    191        1.4     matt 	return rv;
    192        1.1    ragge }
    193        1.1    ragge 
    194        1.4     matt static void
    195  1.21.40.1      mjf le_vsbus_attach(device_t parent, device_t self, void *aux)
    196        1.1    ragge {
    197  1.21.40.1      mjf 	struct vsbus_attach_args * const va = aux;
    198  1.21.40.1      mjf 	struct le_softc * const sc = device_private(self);
    199        1.1    ragge 	bus_dma_segment_t seg;
    200        1.1    ragge 	int *lance_addr;
    201        1.1    ragge 	int i, err, rseg;
    202        1.1    ragge 
    203  1.21.40.2      mjf 	sc->sc_am7990.lsc.sc_dev = self;
    204  1.21.40.1      mjf 	sc->sc_rdp = (uint16_t *) vax_map_physmem(NI_BASE, 1);
    205        1.1    ragge 	sc->sc_rap = sc->sc_rdp + 2;
    206        1.1    ragge 
    207        1.1    ragge 	/*
    208        1.1    ragge 	 * MD functions.
    209        1.1    ragge 	 */
    210        1.1    ragge 	sc->sc_am7990.lsc.sc_rdcsr = lerdcsr;
    211        1.1    ragge 	sc->sc_am7990.lsc.sc_wrcsr = lewrcsr;
    212        1.1    ragge 	sc->sc_am7990.lsc.sc_nocarrier = NULL;
    213        1.1    ragge 
    214        1.7     matt 	scb_vecalloc(va->va_cvec, (void (*)(void *)) am7990_intr, sc,
    215        1.7     matt 		SCB_ISTACK, &sc->sc_intrcnt);
    216        1.8     matt 	evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, NULL,
    217  1.21.40.1      mjf 		device_xname(self), "intr");
    218        1.7     matt 
    219  1.21.40.2      mjf 	/*
    220  1.21.40.2      mjf 	 * Allocate a (DMA-safe) block for all descriptors and buffers.
    221  1.21.40.2      mjf 	 */
    222        1.1    ragge 
    223        1.1    ragge #define ALLOCSIZ (64 * 1024)
    224  1.21.40.2      mjf 	err = bus_dmamem_alloc(va->va_dmat, ALLOCSIZ, PAGE_SIZE, 0,
    225  1.21.40.2      mjf 	    &seg, 1, &rseg, BUS_DMA_NOWAIT);
    226  1.21.40.2      mjf 	if (err) {
    227  1.21.40.2      mjf 		aprint_error(": unable to alloc buffer block: err %d\n", err);
    228  1.21.40.2      mjf 		return;
    229  1.21.40.2      mjf 	}
    230  1.21.40.2      mjf 	err = bus_dmamem_map(va->va_dmat, &seg, rseg, ALLOCSIZ,
    231  1.21.40.2      mjf 	    (void **)&sc->sc_am7990.lsc.sc_mem,
    232        1.1    ragge 	    BUS_DMA_NOWAIT|BUS_DMA_COHERENT);
    233  1.21.40.2      mjf 	if (err) {
    234  1.21.40.2      mjf 		aprint_error(": unable to map buffer block: err %d\n", err);
    235  1.21.40.2      mjf 		bus_dmamem_free(va->va_dmat, &seg, rseg);
    236  1.21.40.2      mjf 		return;
    237  1.21.40.2      mjf 	}
    238  1.21.40.2      mjf 	bus_dmamap_create(va->va_dmat, ALLOCSIZ, rseg, ALLOCSIZ,
    239        1.4     matt 	    0, BUS_DMA_NOWAIT, &sc->sc_dm);
    240  1.21.40.2      mjf 	if (err) {
    241  1.21.40.2      mjf 		aprint_error(": unable to create DMA map: err %d\n", err);
    242  1.21.40.2      mjf 		bus_dmamem_free(va->va_dmat, &seg, rseg);
    243  1.21.40.2      mjf 		return;
    244  1.21.40.2      mjf 	}
    245        1.4     matt 	err = bus_dmamap_load(va->va_dmat, sc->sc_dm, sc->sc_am7990.lsc.sc_mem,
    246        1.4     matt 	    ALLOCSIZ, NULL, BUS_DMA_NOWAIT);
    247  1.21.40.2      mjf 	if (err) {
    248  1.21.40.2      mjf 		aprint_error(": unable to load DMA map: err %d\n", err);
    249  1.21.40.2      mjf 		bus_dmamap_destroy(va->va_dmat, sc->sc_dm);
    250  1.21.40.2      mjf 		bus_dmamem_free(va->va_dmat, &seg, rseg);
    251  1.21.40.2      mjf 		return;
    252  1.21.40.2      mjf 	}
    253  1.21.40.1      mjf 	aprint_normal(" buf 0x%lx-0x%lx", sc->sc_dm->dm_segs->ds_addr,
    254        1.4     matt 	    sc->sc_dm->dm_segs->ds_addr + sc->sc_dm->dm_segs->ds_len - 1);
    255        1.4     matt 	sc->sc_am7990.lsc.sc_addr = sc->sc_dm->dm_segs->ds_addr & 0xffffff;
    256        1.4     matt 	sc->sc_am7990.lsc.sc_memsize = sc->sc_dm->dm_segs->ds_len;
    257        1.1    ragge 
    258        1.1    ragge 	sc->sc_am7990.lsc.sc_copytodesc = lance_copytobuf_contig;
    259        1.1    ragge 	sc->sc_am7990.lsc.sc_copyfromdesc = lance_copyfrombuf_contig;
    260        1.1    ragge 	sc->sc_am7990.lsc.sc_copytobuf = lance_copytobuf_contig;
    261        1.1    ragge 	sc->sc_am7990.lsc.sc_copyfrombuf = lance_copyfrombuf_contig;
    262        1.1    ragge 	sc->sc_am7990.lsc.sc_zerobuf = lance_zerobuf_contig;
    263        1.1    ragge 
    264        1.4     matt #ifdef LEDEBUG
    265        1.4     matt 	sc->sc_am7990.lsc.sc_debug = 1;
    266        1.4     matt #endif
    267        1.1    ragge 	/*
    268        1.1    ragge 	 * Get the ethernet address out of rom
    269        1.1    ragge 	 */
    270        1.1    ragge 	lance_addr = (int *)vax_map_physmem(NI_ADDR, 1);
    271  1.21.40.2      mjf 	for (i = 0; i < ETHER_ADDR_LEN; i++)
    272        1.1    ragge 		sc->sc_am7990.lsc.sc_enaddr[i] = (u_char)lance_addr[i];
    273        1.1    ragge 	vax_unmap_physmem((vaddr_t)lance_addr, 1);
    274        1.1    ragge 
    275  1.21.40.1      mjf 	bcopy(device_xname(self), sc->sc_am7990.lsc.sc_ethercom.ec_if.if_xname,
    276        1.1    ragge 	    IFNAMSIZ);
    277  1.21.40.1      mjf 
    278        1.4     matt 	/* Prettier printout */
    279  1.21.40.1      mjf 	aprint_normal("\n%s", device_xname(self));
    280        1.4     matt 
    281        1.1    ragge 	am7990_config(&sc->sc_am7990);
    282        1.1    ragge }
    283