if_le_vsbus.c revision 1.11.8.2
1 /* $NetBSD: if_le_vsbus.c,v 1.11.8.2 2002/10/18 02:40:30 nathanw Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /*- 40 * Copyright (c) 1992, 1993 41 * The Regents of the University of California. All rights reserved. 42 * 43 * This code is derived from software contributed to Berkeley by 44 * Ralph Campbell and Rick Macklem. 45 * 46 * Redistribution and use in source and binary forms, with or without 47 * modification, are permitted provided that the following conditions 48 * are met: 49 * 1. Redistributions of source code must retain the above copyright 50 * notice, this list of conditions and the following disclaimer. 51 * 2. Redistributions in binary form must reproduce the above copyright 52 * notice, this list of conditions and the following disclaimer in the 53 * documentation and/or other materials provided with the distribution. 54 * 3. All advertising materials mentioning features or use of this software 55 * must display the following acknowledgement: 56 * This product includes software developed by the University of 57 * California, Berkeley and its contributors. 58 * 4. Neither the name of the University nor the names of its contributors 59 * may be used to endorse or promote products derived from this software 60 * without specific prior written permission. 61 * 62 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 63 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 64 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 65 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 66 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 67 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 68 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 69 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 70 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 71 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 72 * SUCH DAMAGE. 73 * 74 * @(#)if_le.c 8.2 (Berkeley) 11/16/93 75 */ 76 77 #include "opt_inet.h" 78 #include "bpfilter.h" 79 80 #include <sys/param.h> 81 #include <sys/syslog.h> 82 #include <sys/socket.h> 83 #include <sys/device.h> 84 #include <sys/reboot.h> 85 86 #include <uvm/uvm_extern.h> 87 88 #include <net/if.h> 89 #include <net/if_ether.h> 90 #include <net/if_media.h> 91 92 #ifdef INET 93 #include <netinet/in.h> 94 #include <netinet/if_inarp.h> 95 #endif 96 97 #include <machine/cpu.h> 98 #include <machine/sid.h> 99 #include <machine/scb.h> 100 #include <machine/bus.h> 101 #include <machine/vsbus.h> 102 103 #include <dev/ic/lancereg.h> 104 #include <dev/ic/lancevar.h> 105 #include <dev/ic/am7990reg.h> 106 #include <dev/ic/am7990var.h> 107 108 #include "ioconf.h" 109 110 struct le_softc { 111 struct am7990_softc sc_am7990; /* Must be first */ 112 struct evcnt sc_intrcnt; 113 bus_dmamap_t sc_dm; 114 volatile u_short *sc_rap; 115 volatile u_short *sc_rdp; 116 }; 117 118 static int le_vsbus_match __P((struct device *, struct cfdata *, void *)); 119 static void le_vsbus_attach __P((struct device *, struct device *, void *)); 120 static void lewrcsr __P((struct lance_softc *, u_int16_t, u_int16_t)); 121 static u_int16_t lerdcsr __P((struct lance_softc *, u_int16_t)); 122 123 CFATTACH_DECL(le_vsbus, sizeof(struct le_softc), 124 le_vsbus_match, le_vsbus_attach, NULL, NULL); 125 126 static void 127 lewrcsr(ls, port, val) 128 struct lance_softc *ls; 129 u_int16_t port, val; 130 { 131 struct le_softc *sc = (void *)ls; 132 133 *sc->sc_rap = port; 134 *sc->sc_rdp = val; 135 } 136 137 static u_int16_t 138 lerdcsr(ls, port) 139 struct lance_softc *ls; 140 u_int16_t port; 141 { 142 struct le_softc *sc = (void *)ls; 143 144 *sc->sc_rap = port; 145 return *sc->sc_rdp; 146 } 147 148 static int 149 le_vsbus_match(parent, cf, aux) 150 struct device *parent; 151 struct cfdata *cf; 152 void *aux; 153 { 154 struct vsbus_attach_args *va = aux; 155 volatile short *rdp, *rap; 156 struct leinit initblock; 157 bus_dmamap_t map; 158 int i; 159 int rv = 0; 160 int error; 161 162 if (vax_boardtype == VAX_BTYP_49 || vax_boardtype == VAX_BTYP_53) 163 return 0; 164 165 error = bus_dmamap_create(va->va_dmat, sizeof(initblock), 1, 166 sizeof(initblock), 0, BUS_DMA_NOWAIT, &map); 167 if (error) { 168 return 0; 169 } 170 171 error = bus_dmamap_load(va->va_dmat, map, &initblock, 172 sizeof(initblock), NULL, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 173 if (error) { 174 bus_dmamap_destroy(va->va_dmat, map); 175 return 0; 176 } 177 178 memset(&initblock, 0, sizeof(initblock)); 179 180 rdp = (short *)va->va_addr; 181 rap = rdp + 2; 182 183 /* Make sure the chip is stopped. */ 184 *rap = LE_CSR0; 185 *rdp = LE_C0_STOP; 186 DELAY(100); 187 *rap = LE_CSR1; 188 *rdp = map->dm_segs->ds_addr & 0xffff; 189 *rap = LE_CSR2; 190 *rdp = (map->dm_segs->ds_addr >> 16) & 0xffff; 191 *rap = LE_CSR0; 192 *rdp = LE_C0_INIT|LE_C0_INEA; 193 194 /* Wait for initialization to finish. */ 195 for (i = 100; i >= 0; i--) { 196 DELAY(1000); 197 /* Should have interrupted by now */ 198 if (*rdp & LE_C0_IDON) 199 rv = 1; 200 } 201 *rap = LE_CSR0; 202 *rdp = LE_C0_STOP; 203 204 bus_dmamap_unload(va->va_dmat, map); 205 bus_dmamap_destroy(va->va_dmat, map); 206 return rv; 207 } 208 209 static void 210 le_vsbus_attach(parent, self, aux) 211 struct device *parent, *self; 212 void *aux; 213 { 214 struct vsbus_attach_args *va = aux; 215 struct le_softc *sc = (void *)self; 216 bus_dma_segment_t seg; 217 int *lance_addr; 218 int i, err, rseg; 219 220 sc->sc_rdp = (short *)vax_map_physmem(NI_BASE, 1); 221 sc->sc_rap = sc->sc_rdp + 2; 222 223 /* 224 * MD functions. 225 */ 226 sc->sc_am7990.lsc.sc_rdcsr = lerdcsr; 227 sc->sc_am7990.lsc.sc_wrcsr = lewrcsr; 228 sc->sc_am7990.lsc.sc_nocarrier = NULL; 229 230 scb_vecalloc(va->va_cvec, (void (*)(void *)) am7990_intr, sc, 231 SCB_ISTACK, &sc->sc_intrcnt); 232 evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, NULL, 233 self->dv_xname, "intr"); 234 235 /* 236 * Allocate a (DMA-safe) block for all descriptors and buffers. 237 */ 238 239 #define ALLOCSIZ (64 * 1024) 240 err = bus_dmamem_alloc(va->va_dmat, ALLOCSIZ, NBPG, 0, 241 &seg, 1, &rseg, BUS_DMA_NOWAIT); 242 if (err) { 243 printf(": unable to alloc buffer block: err %d\n", err); 244 return; 245 } 246 err = bus_dmamem_map(va->va_dmat, &seg, rseg, ALLOCSIZ, 247 (caddr_t *)&sc->sc_am7990.lsc.sc_mem, 248 BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 249 if (err) { 250 printf(": unable to map buffer block: err %d\n", err); 251 bus_dmamem_free(va->va_dmat, &seg, rseg); 252 return; 253 } 254 err = bus_dmamap_create(va->va_dmat, ALLOCSIZ, rseg, ALLOCSIZ, 255 0, BUS_DMA_NOWAIT, &sc->sc_dm); 256 if (err) { 257 printf(": unable to create dma map: err %d\n", err); 258 bus_dmamem_free(va->va_dmat, &seg, rseg); 259 return; 260 } 261 err = bus_dmamap_load(va->va_dmat, sc->sc_dm, sc->sc_am7990.lsc.sc_mem, 262 ALLOCSIZ, NULL, BUS_DMA_NOWAIT); 263 if (err) { 264 printf(": unable to load dma map: err %d\n", err); 265 bus_dmamap_destroy(va->va_dmat, sc->sc_dm); 266 bus_dmamem_free(va->va_dmat, &seg, rseg); 267 return; 268 } 269 printf(" buf 0x%lx-0x%lx", sc->sc_dm->dm_segs->ds_addr, 270 sc->sc_dm->dm_segs->ds_addr + sc->sc_dm->dm_segs->ds_len - 1); 271 sc->sc_am7990.lsc.sc_addr = sc->sc_dm->dm_segs->ds_addr & 0xffffff; 272 sc->sc_am7990.lsc.sc_memsize = sc->sc_dm->dm_segs->ds_len; 273 274 sc->sc_am7990.lsc.sc_copytodesc = lance_copytobuf_contig; 275 sc->sc_am7990.lsc.sc_copyfromdesc = lance_copyfrombuf_contig; 276 sc->sc_am7990.lsc.sc_copytobuf = lance_copytobuf_contig; 277 sc->sc_am7990.lsc.sc_copyfrombuf = lance_copyfrombuf_contig; 278 sc->sc_am7990.lsc.sc_zerobuf = lance_zerobuf_contig; 279 280 #ifdef LEDEBUG 281 sc->sc_am7990.lsc.sc_debug = 1; 282 #endif 283 /* 284 * Get the ethernet address out of rom 285 */ 286 lance_addr = (int *)vax_map_physmem(NI_ADDR, 1); 287 for (i = 0; i < 6; i++) 288 sc->sc_am7990.lsc.sc_enaddr[i] = (u_char)lance_addr[i]; 289 vax_unmap_physmem((vaddr_t)lance_addr, 1); 290 291 bcopy(self->dv_xname, sc->sc_am7990.lsc.sc_ethercom.ec_if.if_xname, 292 IFNAMSIZ); 293 /* Prettier printout */ 294 printf("\n%s", self->dv_xname); 295 296 am7990_config(&sc->sc_am7990); 297 } 298
Indexes created Sun Oct 19 02:09:48 GMT 2025