if_ze.c revision 1.18 1 1.18 ragge /* $NetBSD: if_ze.c,v 1.18 2017/05/22 17:02:41 ragge Exp $ */
2 1.1 ragge /*
3 1.1 ragge * Copyright (c) 1999 Ludd, University of Lule}, Sweden. All rights reserved.
4 1.1 ragge *
5 1.1 ragge * Redistribution and use in source and binary forms, with or without
6 1.1 ragge * modification, are permitted provided that the following conditions
7 1.1 ragge * are met:
8 1.1 ragge * 1. Redistributions of source code must retain the above copyright
9 1.1 ragge * notice, this list of conditions and the following disclaimer.
10 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright
11 1.1 ragge * notice, this list of conditions and the following disclaimer in the
12 1.1 ragge * documentation and/or other materials provided with the distribution.
13 1.1 ragge *
14 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 1.1 ragge * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 1.1 ragge * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 1.1 ragge * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 1.1 ragge * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 1.1 ragge * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20 1.1 ragge * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21 1.1 ragge * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 1.1 ragge * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 1.1 ragge * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 1.1 ragge */
25 1.10 lukem
26 1.10 lukem #include <sys/cdefs.h>
27 1.18 ragge __KERNEL_RCSID(0, "$NetBSD: if_ze.c,v 1.18 2017/05/22 17:02:41 ragge Exp $");
28 1.1 ragge
29 1.6 ragge #include "opt_cputype.h"
30 1.6 ragge
31 1.1 ragge #include <sys/param.h>
32 1.17 matt #include <sys/systm.h>
33 1.17 matt #include <sys/bus.h>
34 1.17 matt #include <sys/cpu.h>
35 1.1 ragge #include <sys/device.h>
36 1.1 ragge
37 1.1 ragge #include <net/if.h>
38 1.1 ragge #include <net/if_ether.h>
39 1.1 ragge #include <net/if_dl.h>
40 1.1 ragge
41 1.1 ragge #include <netinet/in.h>
42 1.1 ragge #include <netinet/if_inarp.h>
43 1.1 ragge
44 1.1 ragge #include <machine/nexus.h>
45 1.1 ragge #include <machine/scb.h>
46 1.4 ragge #include <machine/sid.h>
47 1.13 matt #include <machine/mainbus.h>
48 1.1 ragge
49 1.1 ragge #include <dev/ic/sgecreg.h>
50 1.1 ragge #include <dev/ic/sgecvar.h>
51 1.1 ragge
52 1.1 ragge #include "ioconf.h"
53 1.13 matt
54 1.1 ragge /*
55 1.11 wiz * Addresses.
56 1.1 ragge */
57 1.1 ragge #define SGECADDR 0x20008000
58 1.1 ragge #define NISA_ROM 0x20084000
59 1.6 ragge #define NISA_ROM_VXT 0x200c4000
60 1.13 matt #define NISA_ROM_VSBUS 0x27800000
61 1.1 ragge #define SGECVEC 0x108
62 1.1 ragge
63 1.13 matt static int ze_mainbus_match(device_t, cfdata_t, void *);
64 1.13 matt static void ze_mainbus_attach(device_t, device_t, void *);
65 1.13 matt
66 1.13 matt static const struct sgec_data {
67 1.13 matt uint32_t sd_boardtype;
68 1.13 matt bus_addr_t sd_addr;
69 1.13 matt bus_addr_t sd_rom;
70 1.13 matt uint16_t sd_intvec;
71 1.13 matt uint8_t sd_romshift;
72 1.13 matt } sgec_data[] = {
73 1.13 matt { VAX_BTYP_660, SGECADDR, NISA_ROM, SGECVEC, 24, },
74 1.13 matt #if VXT2000 || VAXANY
75 1.13 matt { VAX_BTYP_VXT, SGECADDR, NISA_ROM_VXT, 0x200, 0, },
76 1.13 matt #endif
77 1.15 jkunz { VAX_BTYP_670, SGECADDR, NISA_ROM, SGECVEC, 8, },
78 1.15 jkunz { VAX_BTYP_680, SGECADDR, NISA_ROM, SGECVEC, 8, },
79 1.15 jkunz { VAX_BTYP_681, SGECADDR, NISA_ROM, SGECVEC, 8, },
80 1.13 matt { VAX_BTYP_48, SGECADDR, NISA_ROM_VSBUS, SGECVEC, 0, },
81 1.13 matt { VAX_BTYP_49, SGECADDR, NISA_ROM_VSBUS, SGECVEC, 0, },
82 1.14 jkunz { VAX_BTYP_53, SGECADDR, NISA_ROM, SGECVEC, 8, },
83 1.13 matt };
84 1.13 matt
85 1.13 matt static const struct sgec_data *
86 1.13 matt ze_find(void)
87 1.13 matt {
88 1.13 matt size_t i;
89 1.13 matt const struct sgec_data *sd;
90 1.13 matt for (i = 0, sd = sgec_data; i < __arraycount(sgec_data); i++, sd++) {
91 1.13 matt if (vax_boardtype == sd->sd_boardtype)
92 1.13 matt return sd;
93 1.13 matt }
94 1.13 matt
95 1.13 matt return NULL;
96 1.13 matt }
97 1.1 ragge
98 1.13 matt CFATTACH_DECL_NEW(ze_mainbus, sizeof(struct ze_softc),
99 1.13 matt ze_mainbus_match, ze_mainbus_attach, NULL, NULL);
100 1.1 ragge
101 1.1 ragge /*
102 1.1 ragge * Check for present SGEC.
103 1.1 ragge */
104 1.1 ragge int
105 1.13 matt ze_mainbus_match(device_t parent, cfdata_t cf, void *aux)
106 1.1 ragge {
107 1.13 matt struct mainbus_attach_args * const ma = aux;
108 1.1 ragge
109 1.1 ragge /*
110 1.1 ragge * Should some more intelligent checking be done???
111 1.1 ragge */
112 1.13 matt if (strcmp(ma->ma_type, "sgec"))
113 1.13 matt return 0;
114 1.13 matt
115 1.13 matt return ze_find() != NULL;
116 1.1 ragge }
117 1.1 ragge
118 1.1 ragge /*
119 1.1 ragge * Interface exists: make available by filling in network interface
120 1.1 ragge * record. System will initialize the interface when it is ready
121 1.1 ragge * to accept packets.
122 1.1 ragge */
123 1.1 ragge void
124 1.13 matt ze_mainbus_attach(device_t parent, device_t self, void *aux)
125 1.1 ragge {
126 1.13 matt struct mainbus_attach_args * const ma = aux;
127 1.13 matt struct ze_softc * const sc = device_private(self);
128 1.13 matt const struct sgec_data * const sd = ze_find();
129 1.13 matt const uint32_t *ea;
130 1.13 matt size_t i;
131 1.13 matt int error;
132 1.13 matt
133 1.13 matt sc->sc_dev = self;
134 1.1 ragge
135 1.1 ragge /*
136 1.1 ragge * Map in SGEC registers.
137 1.1 ragge */
138 1.13 matt sc->sc_dmat = ma->ma_dmat;
139 1.13 matt sc->sc_iot = ma->ma_iot;
140 1.13 matt sc->sc_intvec = sd->sd_intvec;
141 1.13 matt error = bus_space_map(sc->sc_iot, sd->sd_addr, PAGE_SIZE, 0,
142 1.13 matt &sc->sc_ioh);
143 1.13 matt if (error) {
144 1.13 matt aprint_error(": failed to map %#lx: %d\n", sd->sd_addr, error);
145 1.13 matt return;
146 1.13 matt }
147 1.1 ragge
148 1.1 ragge /*
149 1.1 ragge * Map in, read and release ethernet rom address.
150 1.1 ragge */
151 1.13 matt ea = (uint32_t *)vax_map_physmem(sd->sd_rom, 1);
152 1.13 matt for (i = 0; i < ETHER_ADDR_LEN; i++)
153 1.13 matt sc->sc_enaddr[i] = (ea[i] >> sd->sd_romshift) & 0377;
154 1.1 ragge vax_unmap_physmem((vaddr_t)ea, 1);
155 1.1 ragge
156 1.13 matt scb_vecalloc(sc->sc_intvec, (void (*)(void *)) sgec_intr, sc,
157 1.13 matt SCB_ISTACK, &sc->sc_intrcnt);
158 1.1 ragge
159 1.1 ragge sgec_attach(sc);
160 1.1 ragge }
161