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bus.h revision 1.32
      1  1.32      matt /*	$NetBSD: bus.h,v 1.32 2015/07/05 02:03:36 matt Exp $	*/
      2   1.1      matt 
      3   1.1      matt /*-
      4  1.15   thorpej  * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
      5   1.1      matt  * All rights reserved.
      6   1.1      matt  *
      7   1.1      matt  * This code is derived from software contributed to The NetBSD Foundation
      8   1.1      matt  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9   1.1      matt  * NASA Ames Research Center.
     10   1.1      matt  *
     11   1.1      matt  * Redistribution and use in source and binary forms, with or without
     12   1.1      matt  * modification, are permitted provided that the following conditions
     13   1.1      matt  * are met:
     14   1.1      matt  * 1. Redistributions of source code must retain the above copyright
     15   1.1      matt  *    notice, this list of conditions and the following disclaimer.
     16   1.1      matt  * 2. Redistributions in binary form must reproduce the above copyright
     17   1.1      matt  *    notice, this list of conditions and the following disclaimer in the
     18   1.1      matt  *    documentation and/or other materials provided with the distribution.
     19   1.1      matt  *
     20   1.1      matt  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     21   1.1      matt  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     22   1.1      matt  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     23   1.1      matt  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     24   1.1      matt  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     25   1.1      matt  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     26   1.1      matt  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     27   1.1      matt  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     28   1.1      matt  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     29   1.1      matt  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     30   1.1      matt  * POSSIBILITY OF SUCH DAMAGE.
     31   1.1      matt  */
     32   1.1      matt 
     33   1.1      matt /*
     34   1.1      matt  * Copyright (c) 1996 Charles M. Hannum.  All rights reserved.
     35   1.1      matt  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
     36   1.1      matt  *
     37   1.1      matt  * Redistribution and use in source and binary forms, with or without
     38   1.1      matt  * modification, are permitted provided that the following conditions
     39   1.1      matt  * are met:
     40   1.1      matt  * 1. Redistributions of source code must retain the above copyright
     41   1.1      matt  *    notice, this list of conditions and the following disclaimer.
     42   1.1      matt  * 2. Redistributions in binary form must reproduce the above copyright
     43   1.1      matt  *    notice, this list of conditions and the following disclaimer in the
     44   1.1      matt  *    documentation and/or other materials provided with the distribution.
     45   1.1      matt  * 3. All advertising materials mentioning features or use of this software
     46   1.1      matt  *    must display the following acknowledgement:
     47   1.1      matt  *      This product includes software developed by Christopher G. Demetriou
     48   1.1      matt  *	for the NetBSD Project.
     49   1.1      matt  * 4. The name of the author may not be used to endorse or promote products
     50   1.1      matt  *    derived from this software without specific prior written permission
     51   1.1      matt  *
     52   1.1      matt  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     53   1.1      matt  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     54   1.1      matt  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     55   1.1      matt  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     56   1.1      matt  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     57   1.1      matt  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     58   1.1      matt  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     59   1.1      matt  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     60   1.1      matt  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     61   1.1      matt  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     62   1.1      matt  */
     63   1.1      matt 
     64   1.1      matt #ifndef _VAX_BUS_H_
     65   1.1      matt #define _VAX_BUS_H_
     66   1.1      matt 
     67   1.1      matt #ifdef BUS_SPACE_DEBUG
     68  1.11  drochner #include <sys/systm.h> /* for printf() prototype */
     69   1.1      matt /*
     70   1.1      matt  * Macros for sanity-checking the aligned-ness of pointers passed to
     71   1.1      matt  * bus space ops.  These are not strictly necessary on the VAX, but
     72   1.1      matt  * could lead to performance improvements, and help catch problems
     73   1.1      matt  * with drivers that would creep up on other architectures.
     74   1.1      matt  */
     75   1.1      matt #define	__BUS_SPACE_ALIGNED_ADDRESS(p, t)				\
     76   1.1      matt 	((((u_long)(p)) & (sizeof(t)-1)) == 0)
     77   1.1      matt 
     78   1.1      matt #define	__BUS_SPACE_ADDRESS_SANITY(p, t, d)				\
     79   1.1      matt ({									\
     80   1.1      matt 	if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) {			\
     81   1.1      matt 		printf("%s 0x%lx not aligned to %d bytes %s:%d\n",	\
     82   1.1      matt 		    d, (u_long)(p), sizeof(t), __FILE__, __LINE__);	\
     83   1.1      matt 	}								\
     84   1.1      matt 	(void) 0;							\
     85   1.1      matt })
     86   1.4  drochner 
     87   1.4  drochner #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t)
     88   1.1      matt #else
     89   1.1      matt #define	__BUS_SPACE_ADDRESS_SANITY(p,t,d)	(void) 0
     90   1.4  drochner #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
     91   1.1      matt #endif /* BUS_SPACE_DEBUG */
     92   1.1      matt 
     93   1.1      matt /*
     94   1.1      matt  * Bus address and size types
     95   1.1      matt  */
     96  1.30      matt typedef paddr_t bus_addr_t;
     97  1.30      matt typedef psize_t bus_size_t;
     98   1.1      matt 
     99   1.1      matt /*
    100   1.1      matt  * Access methods for bus resources and address space.
    101   1.1      matt  */
    102   1.6     ragge typedef	struct vax_bus_space *bus_space_tag_t;
    103  1.30      matt typedef	vaddr_t bus_space_handle_t;
    104   1.1      matt 
    105   1.1      matt struct vax_bus_space {
    106   1.1      matt 	/* cookie */
    107   1.1      matt 	void		*vbs_cookie;
    108   1.1      matt 
    109   1.1      matt 	/* mapping/unmapping */
    110  1.30      matt 	int		(*vbs_map)(void *, bus_addr_t, bus_size_t, int,
    111  1.30      matt 			    bus_space_handle_t *, int);
    112  1.30      matt 	void		(*vbs_unmap)(void *, bus_space_handle_t, bus_size_t,
    113  1.30      matt 			    int);
    114  1.30      matt 	int		(*vbs_subregion)(void *, bus_space_handle_t, bus_size_t,
    115  1.30      matt 			    bus_size_t, bus_space_handle_t *);
    116   1.1      matt 
    117   1.1      matt 	/* allocation/deallocation */
    118  1.30      matt 	int		(*vbs_alloc)(void *, bus_addr_t, bus_addr_t, bus_size_t,
    119  1.30      matt 			    bus_size_t, bus_size_t, int, bus_addr_t *,
    120  1.30      matt 			    bus_space_handle_t *);
    121  1.30      matt 	void		(*vbs_free)(void *, bus_space_handle_t, bus_size_t);
    122  1.18     ragge 	/* mmap bus space for user */
    123  1.18     ragge 	paddr_t		(*vbs_mmap)(void *, bus_addr_t, off_t, int, int);
    124   1.1      matt };
    125   1.1      matt 
    126   1.1      matt /*
    127  1.30      matt  *	int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
    128  1.30      matt  *	    bus_size_t size, int flags, bus_space_handle_t *bshp);
    129   1.1      matt  *
    130   1.1      matt  * Map a region of bus space.
    131   1.1      matt  */
    132   1.1      matt 
    133   1.1      matt #define	BUS_SPACE_MAP_CACHEABLE		0x01
    134   1.1      matt #define	BUS_SPACE_MAP_LINEAR		0x02
    135   1.9  drochner #define	BUS_SPACE_MAP_PREFETCHABLE	0x04
    136   1.1      matt 
    137   1.1      matt #define	bus_space_map(t, a, s, f, hp)					\
    138   1.1      matt 	(*(t)->vbs_map)((t)->vbs_cookie, (a), (s), (f), (hp), 1)
    139   1.1      matt #define	vax_bus_space_map_noacct(t, a, s, f, hp)			\
    140   1.1      matt 	(*(t)->vbs_map)((t)->vbs_cookie, (a), (s), (f), (hp), 0)
    141   1.1      matt 
    142   1.1      matt /*
    143  1.30      matt  *	int bus_space_unmap(bus_space_tag_t t,
    144  1.30      matt  *	    bus_space_handle_t bsh, bus_size_t size);
    145   1.1      matt  *
    146   1.1      matt  * Unmap a region of bus space.
    147   1.1      matt  */
    148   1.1      matt 
    149   1.1      matt #define bus_space_unmap(t, h, s)					\
    150   1.1      matt 	(*(t)->vbs_unmap)((t)->vbs_cookie, (h), (s), 1)
    151   1.1      matt #define vax_bus_space_unmap_noacct(t, h, s)				\
    152   1.1      matt 	(*(t)->vbs_unmap)((t)->vbs_cookie, (h), (s), 0)
    153   1.1      matt 
    154   1.1      matt /*
    155  1.30      matt  *	int bus_space_subregion(bus_space_tag_t t,
    156   1.1      matt  *	    bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
    157  1.30      matt  *	    bus_space_handle_t *nbshp);
    158   1.1      matt  *
    159   1.1      matt  * Get a new handle for a subregion of an already-mapped area of bus space.
    160   1.1      matt  */
    161   1.1      matt 
    162   1.1      matt #define bus_space_subregion(t, h, o, s, nhp)				\
    163  1.10      matt 	(*(t)->vbs_subregion)((t)->vbs_cookie, (h), (o), (s), (nhp))
    164   1.1      matt 
    165   1.1      matt /*
    166  1.30      matt  *	int bus_space_alloc(bus_space_tag_t t, bus_addr_t rstart,
    167   1.1      matt  *	    bus_addr_t rend, bus_size_t size, bus_size_t align,
    168   1.1      matt  *	    bus_size_t boundary, int flags, bus_addr_t *addrp,
    169  1.30      matt  *	    bus_space_handle_t *bshp);
    170   1.1      matt  *
    171   1.1      matt  * Allocate a region of bus space.
    172   1.1      matt  */
    173   1.1      matt 
    174   1.1      matt #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp)			\
    175   1.1      matt 	(*(t)->vbs_alloc)((t)->vbs_cookie, (rs), (re), (s), (a), (b),   \
    176   1.1      matt 	    (f), (ap), (hp))
    177   1.1      matt 
    178   1.1      matt /*
    179  1.30      matt  *	int bus_space_free(bus_space_tag_t t,
    180  1.30      matt  *	    bus_space_handle_t bsh, bus_size_t size);
    181   1.1      matt  *
    182   1.1      matt  * Free a region of bus space.
    183   1.1      matt  */
    184   1.1      matt 
    185   1.1      matt #define bus_space_free(t, h, s)						\
    186   1.1      matt 	(*(t)->vbs_free)((t)->vbs_cookie, (h), (s))
    187  1.32      matt /*
    188  1.32      matt  * Get kernel virtual address for ranges mapped BUS_SPACE_MAP_LINEAR.
    189  1.32      matt  */
    190  1.32      matt #define bus_space_vaddr(t, h)						\
    191  1.32      matt 	((void *) (h))
    192  1.18     ragge /*
    193  1.18     ragge  * Mmap bus space for a user application.
    194  1.18     ragge  */
    195  1.18     ragge #define bus_space_mmap(t, a, o, p, f)					\
    196  1.18     ragge 	(*(t)->vbs_mmap)((t)->vbs_cookie, (a), (o), (p), (f))
    197  1.18     ragge 
    198   1.1      matt 
    199   1.1      matt /*
    200  1.30      matt  *	u_intN_t bus_space_read_N(bus_space_tag_t tag,
    201  1.30      matt  *	    bus_space_handle_t bsh, bus_size_t offset);
    202   1.1      matt  *
    203   1.1      matt  * Read a 1, 2, 4, or 8 byte quantity from bus space
    204   1.1      matt  * described by tag/handle/offset.
    205   1.1      matt  */
    206   1.1      matt 
    207   1.1      matt #define	bus_space_read_1(t, h, o)					\
    208  1.29      matt 	    (*(volatile uint8_t *)((h) + (o)))
    209   1.1      matt 
    210   1.1      matt #define	bus_space_read_2(t, h, o)					\
    211  1.29      matt 	 (__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"),	\
    212  1.29      matt 	    (*(volatile uint16_t *)((h) + (o))))
    213   1.1      matt 
    214   1.1      matt #define	bus_space_read_4(t, h, o)					\
    215  1.29      matt 	 (__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"),	\
    216  1.29      matt 	    (*(volatile uint32_t *)((h) + (o))))
    217   1.1      matt 
    218   1.1      matt #if 0	/* Cause a link error for bus_space_read_8 */
    219   1.1      matt #define	bus_space_read_8(t, h, o)	!!! bus_space_read_8 unimplemented !!!
    220   1.1      matt #endif
    221   1.1      matt 
    222   1.1      matt /*
    223  1.30      matt  *	void bus_space_read_multi_N(bus_space_tag_t tag,
    224   1.1      matt  *	    bus_space_handle_t bsh, bus_size_t offset,
    225  1.30      matt  *	    u_intN_t *addr, size_t count);
    226   1.1      matt  *
    227   1.1      matt  * Read `count' 1, 2, 4, or 8 byte quantities from bus space
    228   1.1      matt  * described by tag/handle/offset and copy into buffer provided.
    229   1.1      matt  */
    230  1.30      matt static __inline void
    231  1.30      matt 	vax_mem_read_multi_1(bus_space_tag_t, bus_space_handle_t, bus_size_t,
    232  1.30      matt 	    uint8_t *, size_t),
    233  1.30      matt 	vax_mem_read_multi_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
    234  1.30      matt 	    uint16_t *, size_t),
    235  1.30      matt 	vax_mem_read_multi_4(bus_space_tag_t, bus_space_handle_t, bus_size_t,
    236  1.30      matt 	    uint32_t *, size_t);
    237   1.1      matt 
    238   1.1      matt #define	bus_space_read_multi_1(t, h, o, a, c)				\
    239   1.1      matt 	vax_mem_read_multi_1((t), (h), (o), (a), (c))
    240   1.1      matt 
    241   1.1      matt #define bus_space_read_multi_2(t, h, o, a, c)				\
    242   1.1      matt do {									\
    243  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((a), uint16_t, "buffer");		\
    244  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr");	\
    245   1.1      matt 	vax_mem_read_multi_2((t), (h), (o), (a), (c));		\
    246   1.1      matt } while (0)
    247   1.1      matt 
    248   1.1      matt #define bus_space_read_multi_4(t, h, o, a, c)				\
    249   1.1      matt do {									\
    250  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((a), uint32_t, "buffer");		\
    251  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr");	\
    252   1.1      matt 	vax_mem_read_multi_4((t), (h), (o), (a), (c));		\
    253   1.1      matt } while (0)
    254   1.1      matt 
    255   1.1      matt #if 0	/* Cause a link error for bus_space_read_multi_8 */
    256   1.1      matt #define	bus_space_read_multi_8	!!! bus_space_read_multi_8 unimplemented !!!
    257   1.1      matt #endif
    258   1.1      matt 
    259  1.26     perry static __inline void
    260  1.30      matt vax_mem_read_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
    261  1.30      matt 	uint8_t *a, size_t c)
    262   1.1      matt {
    263   1.1      matt 	const bus_addr_t addr = h + o;
    264   1.1      matt 
    265   1.1      matt 	for (; c != 0; c--, a++)
    266  1.29      matt 		*a = *(volatile uint8_t *)(addr);
    267   1.1      matt }
    268   1.1      matt 
    269  1.26     perry static __inline void
    270  1.30      matt vax_mem_read_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
    271  1.30      matt 	uint16_t *a, size_t c)
    272   1.1      matt {
    273   1.1      matt 	const bus_addr_t addr = h + o;
    274   1.1      matt 
    275   1.1      matt 	for (; c != 0; c--, a++)
    276  1.29      matt 		*a = *(volatile uint16_t *)(addr);
    277   1.1      matt }
    278   1.1      matt 
    279  1.26     perry static __inline void
    280  1.30      matt vax_mem_read_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
    281  1.30      matt 	uint32_t *a, size_t c)
    282   1.1      matt {
    283   1.1      matt 	const bus_addr_t addr = h + o;
    284   1.1      matt 
    285   1.1      matt 	for (; c != 0; c--, a++)
    286  1.29      matt 		*a = *(volatile uint32_t *)(addr);
    287   1.1      matt }
    288   1.1      matt 
    289   1.1      matt /*
    290  1.30      matt  *	void bus_space_read_region_N(bus_space_tag_t tag,
    291   1.1      matt  *	    bus_space_handle_t bsh, bus_size_t offset,
    292  1.30      matt  *	    u_intN_t *addr, size_t count);
    293   1.1      matt  *
    294   1.1      matt  * Read `count' 1, 2, 4, or 8 byte quantities from bus space
    295   1.1      matt  * described by tag/handle and starting at `offset' and copy into
    296   1.1      matt  * buffer provided.
    297   1.1      matt  */
    298   1.1      matt 
    299  1.30      matt static __inline void vax_mem_read_region_1(bus_space_tag_t,
    300  1.30      matt 	bus_space_handle_t, bus_size_t, uint8_t *, size_t);
    301  1.30      matt static __inline void vax_mem_read_region_2(bus_space_tag_t,
    302  1.30      matt 	bus_space_handle_t, bus_size_t, uint16_t *, size_t);
    303  1.30      matt static __inline void vax_mem_read_region_4(bus_space_tag_t,
    304  1.30      matt 	bus_space_handle_t, bus_size_t, uint32_t *, size_t);
    305   1.1      matt 
    306   1.1      matt #define	bus_space_read_region_1(t, h, o, a, c)				\
    307   1.1      matt do {									\
    308   1.1      matt 	vax_mem_read_region_1((t), (h), (o), (a), (c));		\
    309   1.1      matt } while (0)
    310   1.1      matt 
    311   1.1      matt #define bus_space_read_region_2(t, h, o, a, c)				\
    312   1.1      matt do {									\
    313  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((a), uint16_t, "buffer");		\
    314  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr");	\
    315   1.1      matt 	vax_mem_read_region_2((t), (h), (o), (a), (c));		\
    316   1.1      matt } while (0)
    317   1.1      matt 
    318   1.1      matt #define bus_space_read_region_4(t, h, o, a, c)				\
    319   1.1      matt do {									\
    320  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((a), uint32_t, "buffer");		\
    321  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr");	\
    322   1.1      matt 	vax_mem_read_region_4((t), (h), (o), (a), (c));		\
    323   1.1      matt } while (0)
    324   1.1      matt 
    325   1.1      matt #if 0	/* Cause a link error for bus_space_read_region_8 */
    326   1.1      matt #define	bus_space_read_region_8					\
    327   1.1      matt 			!!! bus_space_read_region_8 unimplemented !!!
    328   1.1      matt #endif
    329   1.1      matt 
    330  1.26     perry static __inline void
    331  1.30      matt vax_mem_read_region_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
    332  1.30      matt 	uint8_t *a, size_t c)
    333   1.1      matt {
    334   1.1      matt 	bus_addr_t addr = h + o;
    335   1.1      matt 
    336   1.1      matt 	for (; c != 0; c--, addr++, a++)
    337  1.29      matt 		*a = *(volatile uint8_t *)(addr);
    338   1.1      matt }
    339   1.1      matt 
    340  1.26     perry static __inline void
    341  1.30      matt vax_mem_read_region_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
    342  1.30      matt 	uint16_t *a, size_t c)
    343   1.1      matt {
    344   1.1      matt 	bus_addr_t addr = h + o;
    345   1.1      matt 
    346  1.19     ragge 	for (; c != 0; c--, addr += 2, a++)
    347  1.29      matt 		*a = *(volatile uint16_t *)(addr);
    348   1.1      matt }
    349   1.1      matt 
    350  1.26     perry static __inline void
    351  1.30      matt vax_mem_read_region_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
    352  1.30      matt 	uint32_t *a, size_t c)
    353   1.1      matt {
    354   1.1      matt 	bus_addr_t addr = h + o;
    355   1.1      matt 
    356  1.19     ragge 	for (; c != 0; c--, addr += 4, a++)
    357  1.29      matt 		*a = *(volatile uint32_t *)(addr);
    358   1.1      matt }
    359   1.1      matt 
    360   1.1      matt /*
    361  1.30      matt  *	void bus_space_write_N(bus_space_tag_t tag,
    362   1.1      matt  *	    bus_space_handle_t bsh, bus_size_t offset,
    363  1.30      matt  *	    u_intN_t value);
    364   1.1      matt  *
    365   1.1      matt  * Write the 1, 2, 4, or 8 byte value `value' to bus space
    366   1.1      matt  * described by tag/handle/offset.
    367   1.1      matt  */
    368   1.1      matt 
    369   1.1      matt #define	bus_space_write_1(t, h, o, v)					\
    370   1.1      matt do {									\
    371  1.29      matt 	((void)(*(volatile uint8_t *)((h) + (o)) = (v)));		\
    372   1.1      matt } while (0)
    373   1.1      matt 
    374   1.1      matt #define	bus_space_write_2(t, h, o, v)					\
    375   1.1      matt do {									\
    376  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr");	\
    377  1.29      matt 	((void)(*(volatile uint16_t *)((h) + (o)) = (v)));		\
    378   1.1      matt } while (0)
    379   1.1      matt 
    380   1.1      matt #define	bus_space_write_4(t, h, o, v)					\
    381   1.1      matt do {									\
    382  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr");	\
    383  1.29      matt 	((void)(*(volatile uint32_t *)((h) + (o)) = (v)));		\
    384   1.1      matt } while (0)
    385   1.1      matt 
    386   1.1      matt #if 0	/* Cause a link error for bus_space_write_8 */
    387   1.1      matt #define	bus_space_write_8	!!! bus_space_write_8 not implemented !!!
    388   1.1      matt #endif
    389   1.1      matt 
    390   1.1      matt /*
    391  1.30      matt  *	void bus_space_write_multi_N(bus_space_tag_t tag,
    392   1.1      matt  *	    bus_space_handle_t bsh, bus_size_t offset,
    393  1.30      matt  *	    const u_intN_t *addr, size_t count);
    394   1.1      matt  *
    395   1.1      matt  * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
    396   1.1      matt  * provided to bus space described by tag/handle/offset.
    397   1.1      matt  */
    398  1.30      matt static __inline void
    399  1.30      matt 	vax_mem_write_multi_1(bus_space_tag_t, bus_space_handle_t, bus_size_t,
    400  1.30      matt 	    const uint8_t *, size_t),
    401  1.30      matt 	vax_mem_write_multi_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
    402  1.30      matt 	    const uint16_t *, size_t),
    403  1.30      matt 	vax_mem_write_multi_4(bus_space_tag_t, bus_space_handle_t, bus_size_t,
    404  1.30      matt 	    const uint32_t *, size_t);
    405   1.1      matt 
    406   1.1      matt #define	bus_space_write_multi_1(t, h, o, a, c)				\
    407   1.1      matt do {									\
    408   1.1      matt 	vax_mem_write_multi_1((t), (h), (o), (a), (c));		\
    409   1.1      matt } while (0)
    410   1.1      matt 
    411   1.1      matt #define bus_space_write_multi_2(t, h, o, a, c)				\
    412   1.1      matt do {									\
    413  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((a), uint16_t, "buffer");		\
    414  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr");	\
    415   1.1      matt 	vax_mem_write_multi_2((t), (h), (o), (a), (c));		\
    416   1.1      matt } while (0)
    417   1.1      matt 
    418   1.1      matt #define bus_space_write_multi_4(t, h, o, a, c)				\
    419   1.1      matt do {									\
    420  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((a), uint32_t, "buffer");		\
    421  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr");	\
    422   1.1      matt 	vax_mem_write_multi_4((t), (h), (o), (a), (c));		\
    423   1.1      matt } while (0)
    424   1.1      matt 
    425   1.1      matt #if 0	/* Cause a link error for bus_space_write_multi_8 */
    426   1.1      matt #define	bus_space_write_multi_8(t, h, o, a, c)				\
    427   1.1      matt 			!!! bus_space_write_multi_8 unimplemented !!!
    428   1.1      matt #endif
    429   1.1      matt 
    430  1.26     perry static __inline void
    431  1.30      matt vax_mem_write_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
    432  1.30      matt 	const uint8_t *a, size_t c)
    433   1.1      matt {
    434   1.1      matt 	const bus_addr_t addr = h + o;
    435   1.1      matt 
    436   1.1      matt 	for (; c != 0; c--, a++)
    437  1.29      matt 		*(volatile uint8_t *)(addr) = *a;
    438   1.1      matt }
    439   1.1      matt 
    440  1.26     perry static __inline void
    441  1.30      matt vax_mem_write_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
    442  1.30      matt 	const uint16_t *a, size_t c)
    443   1.1      matt {
    444   1.1      matt 	const bus_addr_t addr = h + o;
    445   1.1      matt 
    446   1.3      matt 	for (; c != 0; c--, a++)
    447  1.29      matt 		*(volatile uint16_t *)(addr) = *a;
    448   1.1      matt }
    449   1.1      matt 
    450  1.26     perry static __inline void
    451  1.30      matt vax_mem_write_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
    452  1.30      matt 	const uint32_t *a, size_t c)
    453   1.1      matt {
    454   1.1      matt 	const bus_addr_t addr = h + o;
    455   1.1      matt 
    456   1.1      matt 	for (; c != 0; c--, a++)
    457  1.29      matt 		*(volatile uint32_t *)(addr) = *a;
    458   1.1      matt }
    459   1.1      matt 
    460   1.1      matt /*
    461  1.30      matt  *	void bus_space_write_region_N(bus_space_tag_t tag,
    462   1.1      matt  *	    bus_space_handle_t bsh, bus_size_t offset,
    463  1.30      matt  *	    const u_intN_t *addr, size_t count);
    464   1.1      matt  *
    465   1.1      matt  * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
    466   1.1      matt  * to bus space described by tag/handle starting at `offset'.
    467   1.1      matt  */
    468  1.30      matt static __inline void
    469  1.30      matt 	vax_mem_write_region_1(bus_space_tag_t, bus_space_handle_t, bus_size_t,
    470  1.30      matt 	    const uint8_t *, size_t),
    471  1.30      matt 	vax_mem_write_region_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
    472  1.30      matt 	    const uint16_t *, size_t),
    473  1.30      matt 	vax_mem_write_region_4(bus_space_tag_t, bus_space_handle_t, bus_size_t,
    474  1.30      matt 	    const uint32_t *, size_t);
    475   1.1      matt 
    476   1.1      matt #define	bus_space_write_region_1(t, h, o, a, c)				\
    477   1.1      matt 	vax_mem_write_region_1((t), (h), (o), (a), (c))
    478   1.1      matt 
    479   1.1      matt #define bus_space_write_region_2(t, h, o, a, c)				\
    480   1.1      matt do {									\
    481  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((a), uint16_t, "buffer");		\
    482  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr");	\
    483   1.1      matt 	vax_mem_write_region_2((t), (h), (o), (a), (c));		\
    484   1.1      matt } while (0)
    485   1.1      matt 
    486   1.1      matt #define bus_space_write_region_4(t, h, o, a, c)				\
    487   1.1      matt do {									\
    488  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((a), uint32_t, "buffer");		\
    489  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr");	\
    490   1.1      matt 	vax_mem_write_region_4((t), (h), (o), (a), (c));		\
    491   1.1      matt } while (0)
    492   1.1      matt 
    493   1.1      matt #if 0	/* Cause a link error for bus_space_write_region_8 */
    494   1.1      matt #define	bus_space_write_region_8					\
    495   1.1      matt 			!!! bus_space_write_region_8 unimplemented !!!
    496   1.1      matt #endif
    497   1.1      matt 
    498  1.26     perry static __inline void
    499  1.30      matt vax_mem_write_region_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
    500  1.30      matt 	const uint8_t *a, size_t c)
    501   1.1      matt {
    502   1.1      matt 	bus_addr_t addr = h + o;
    503   1.1      matt 
    504   1.1      matt 	for (; c != 0; c--, addr++, a++)
    505  1.29      matt 		*(volatile uint8_t *)(addr) = *a;
    506   1.1      matt }
    507   1.1      matt 
    508  1.26     perry static __inline void
    509  1.30      matt vax_mem_write_region_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
    510  1.30      matt 	const uint16_t *a, size_t c)
    511   1.1      matt {
    512   1.1      matt 	bus_addr_t addr = h + o;
    513   1.1      matt 
    514   1.1      matt 	for (; c != 0; c--, addr++, a++)
    515  1.29      matt 		*(volatile uint16_t *)(addr) = *a;
    516   1.1      matt }
    517   1.1      matt 
    518  1.26     perry static __inline void
    519  1.30      matt vax_mem_write_region_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
    520  1.30      matt 	const uint32_t *a, size_t c)
    521   1.1      matt {
    522   1.1      matt 	bus_addr_t addr = h + o;
    523   1.1      matt 
    524   1.1      matt 	for (; c != 0; c--, addr++, a++)
    525  1.29      matt 		*(volatile uint32_t *)(addr) = *a;
    526   1.1      matt }
    527   1.1      matt 
    528   1.1      matt /*
    529  1.30      matt  *	void bus_space_set_multi_N(bus_space_tag_t tag,
    530   1.1      matt  *	    bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
    531  1.30      matt  *	    size_t count);
    532   1.1      matt  *
    533   1.1      matt  * Write the 1, 2, 4, or 8 byte value `val' to bus space described
    534   1.1      matt  * by tag/handle/offset `count' times.
    535   1.1      matt  */
    536   1.1      matt 
    537  1.30      matt static __inline void
    538  1.30      matt 	vax_mem_set_multi_1(bus_space_tag_t, bus_space_handle_t, bus_size_t,
    539  1.30      matt 	    uint8_t, size_t),
    540  1.30      matt 	vax_mem_set_multi_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
    541  1.30      matt 	    uint16_t, size_t),
    542  1.30      matt 	vax_mem_set_multi_4(bus_space_tag_t, bus_space_handle_t, bus_size_t,
    543  1.30      matt 	    uint32_t, size_t);
    544   1.1      matt 
    545   1.1      matt #define	bus_space_set_multi_1(t, h, o, v, c)				\
    546   1.1      matt 	vax_mem_set_multi_1((t), (h), (o), (v), (c))
    547   1.1      matt 
    548   1.1      matt #define	bus_space_set_multi_2(t, h, o, v, c)				\
    549   1.1      matt do {									\
    550  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr");	\
    551   1.1      matt 	vax_mem_set_multi_2((t), (h), (o), (v), (c));		\
    552   1.1      matt } while (0)
    553   1.1      matt 
    554   1.1      matt #define	bus_space_set_multi_4(t, h, o, v, c)				\
    555   1.1      matt do {									\
    556  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr");	\
    557   1.1      matt 	vax_mem_set_multi_4((t), (h), (o), (v), (c));		\
    558   1.1      matt } while (0)
    559   1.1      matt 
    560  1.26     perry static __inline void
    561  1.30      matt vax_mem_set_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
    562  1.30      matt 	uint8_t v, size_t c)
    563   1.1      matt {
    564   1.1      matt 	bus_addr_t addr = h + o;
    565   1.1      matt 
    566   1.1      matt 	while (c--)
    567  1.29      matt 		*(volatile uint8_t *)(addr) = v;
    568   1.1      matt }
    569   1.1      matt 
    570  1.26     perry static __inline void
    571  1.30      matt vax_mem_set_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
    572  1.30      matt 	uint16_t v, size_t c)
    573   1.1      matt {
    574   1.1      matt 	bus_addr_t addr = h + o;
    575   1.1      matt 
    576   1.1      matt 	while (c--)
    577  1.29      matt 		*(volatile uint16_t *)(addr) = v;
    578   1.1      matt }
    579   1.1      matt 
    580  1.26     perry static __inline void
    581  1.30      matt vax_mem_set_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
    582  1.30      matt 	uint32_t v, size_t c)
    583   1.1      matt {
    584   1.1      matt 	bus_addr_t addr = h + o;
    585   1.1      matt 
    586   1.1      matt 	while (c--)
    587  1.29      matt 		*(volatile uint32_t *)(addr) = v;
    588   1.1      matt }
    589   1.1      matt 
    590   1.1      matt #if 0	/* Cause a link error for bus_space_set_multi_8 */
    591   1.1      matt #define	bus_space_set_multi_8 !!! bus_space_set_multi_8 unimplemented !!!
    592   1.1      matt #endif
    593   1.1      matt 
    594   1.1      matt /*
    595  1.30      matt  *	void bus_space_set_region_N(bus_space_tag_t tag,
    596   1.1      matt  *	    bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
    597  1.30      matt  *	    size_t count);
    598   1.1      matt  *
    599   1.1      matt  * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
    600   1.1      matt  * by tag/handle starting at `offset'.
    601   1.1      matt  */
    602   1.1      matt 
    603  1.30      matt static __inline void
    604  1.30      matt 	vax_mem_set_region_1(bus_space_tag_t, bus_space_handle_t, bus_size_t,
    605  1.30      matt 	    uint8_t, size_t),
    606  1.30      matt 	vax_mem_set_region_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
    607  1.30      matt 	    uint16_t, size_t),
    608  1.30      matt 	vax_mem_set_region_4(bus_space_tag_t, bus_space_handle_t, bus_size_t,
    609  1.30      matt 	    uint32_t, size_t);
    610   1.1      matt 
    611   1.1      matt #define	bus_space_set_region_1(t, h, o, v, c)				\
    612   1.1      matt 	vax_mem_set_region_1((t), (h), (o), (v), (c))
    613   1.1      matt 
    614   1.1      matt #define	bus_space_set_region_2(t, h, o, v, c)				\
    615   1.1      matt do {									\
    616  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr");	\
    617   1.1      matt 	vax_mem_set_region_2((t), (h), (o), (v), (c));		\
    618   1.1      matt } while (0)
    619   1.1      matt 
    620   1.1      matt #define	bus_space_set_region_4(t, h, o, v, c)				\
    621   1.1      matt do {									\
    622  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr");	\
    623   1.1      matt 	vax_mem_set_region_4((t), (h), (o), (v), (c));		\
    624   1.1      matt } while (0)
    625   1.1      matt 
    626  1.26     perry static __inline void
    627  1.30      matt vax_mem_set_region_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
    628  1.30      matt 	uint8_t v, size_t c)
    629   1.1      matt {
    630   1.1      matt 	bus_addr_t addr = h + o;
    631   1.1      matt 
    632   1.1      matt 	for (; c != 0; c--, addr++)
    633  1.29      matt 		*(volatile uint8_t *)(addr) = v;
    634   1.1      matt }
    635   1.1      matt 
    636  1.26     perry static __inline void
    637  1.30      matt vax_mem_set_region_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
    638  1.30      matt 	uint16_t v, size_t c)
    639   1.1      matt {
    640   1.1      matt 	bus_addr_t addr = h + o;
    641   1.1      matt 
    642   1.1      matt 	for (; c != 0; c--, addr += 2)
    643  1.29      matt 		*(volatile uint16_t *)(addr) = v;
    644   1.1      matt }
    645   1.1      matt 
    646  1.26     perry static __inline void
    647  1.30      matt vax_mem_set_region_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
    648  1.30      matt 	uint32_t v, size_t c)
    649   1.1      matt {
    650   1.1      matt 	bus_addr_t addr = h + o;
    651   1.1      matt 
    652   1.1      matt 	for (; c != 0; c--, addr += 4)
    653  1.29      matt 		*(volatile uint32_t *)(addr) = v;
    654   1.1      matt }
    655   1.1      matt 
    656   1.1      matt #if 0	/* Cause a link error for bus_space_set_region_8 */
    657   1.1      matt #define	bus_space_set_region_8	!!! bus_space_set_region_8 unimplemented !!!
    658   1.1      matt #endif
    659   1.1      matt 
    660   1.1      matt /*
    661  1.30      matt  *	void bus_space_copy_region_N(bus_space_tag_t tag,
    662   1.1      matt  *	    bus_space_handle_t bsh1, bus_size_t off1,
    663   1.1      matt  *	    bus_space_handle_t bsh2, bus_size_t off2,
    664  1.30      matt  *	    size_t count);
    665   1.1      matt  *
    666   1.1      matt  * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
    667   1.1      matt  * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
    668   1.1      matt  */
    669   1.1      matt 
    670  1.30      matt static __inline void
    671  1.30      matt 	vax_mem_copy_region_1(bus_space_tag_t, bus_space_handle_t, bus_size_t,
    672  1.30      matt 	    bus_space_handle_t, bus_size_t, size_t),
    673  1.30      matt 	vax_mem_copy_region_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
    674  1.30      matt 	    bus_space_handle_t, bus_size_t, size_t),
    675  1.30      matt 	vax_mem_copy_region_4(bus_space_tag_t, bus_space_handle_t, bus_size_t,
    676  1.30      matt 	    bus_space_handle_t, bus_size_t, size_t);
    677   1.1      matt 
    678   1.1      matt #define	bus_space_copy_region_1(t, h1, o1, h2, o2, c)			\
    679   1.1      matt 	vax_mem_copy_region_1((t), (h1), (o1), (h2), (o2), (c))
    680   1.1      matt 
    681   1.1      matt #define	bus_space_copy_region_2(t, h1, o1, h2, o2, c)			\
    682   1.1      matt do {									\
    683  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((h1) + (o1), uint16_t, "bus addr 1"); \
    684  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((h2) + (o2), uint16_t, "bus addr 2"); \
    685   1.1      matt 	vax_mem_copy_region_2((t), (h1), (o1), (h2), (o2), (c));	\
    686   1.1      matt } while (0)
    687   1.1      matt 
    688   1.1      matt #define	bus_space_copy_region_4(t, h1, o1, h2, o2, c)			\
    689   1.1      matt do {									\
    690  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((h1) + (o1), uint32_t, "bus addr 1"); \
    691  1.29      matt 	__BUS_SPACE_ADDRESS_SANITY((h2) + (o2), uint32_t, "bus addr 2"); \
    692   1.1      matt 	vax_mem_copy_region_4((t), (h1), (o1), (h2), (o2), (c));	\
    693   1.1      matt } while (0)
    694   1.1      matt 
    695  1.26     perry static __inline void
    696  1.30      matt vax_mem_copy_region_1(bus_space_tag_t t, bus_space_handle_t h1, bus_size_t o1,
    697  1.30      matt 	bus_space_handle_t h2, bus_size_t o2, size_t c)
    698   1.1      matt {
    699   1.1      matt 	bus_addr_t addr1 = h1 + o1;
    700   1.1      matt 	bus_addr_t addr2 = h2 + o2;
    701   1.1      matt 
    702   1.1      matt 	if (addr1 >= addr2) {
    703   1.1      matt 		/* src after dest: copy forward */
    704   1.1      matt 		for (; c != 0; c--, addr1++, addr2++)
    705  1.29      matt 			*(volatile uint8_t *)(addr2) =
    706  1.29      matt 			    *(volatile uint8_t *)(addr1);
    707   1.1      matt 	} else {
    708   1.1      matt 		/* dest after src: copy backwards */
    709   1.1      matt 		for (addr1 += (c - 1), addr2 += (c - 1);
    710   1.1      matt 		    c != 0; c--, addr1--, addr2--)
    711  1.29      matt 			*(volatile uint8_t *)(addr2) =
    712  1.29      matt 			    *(volatile uint8_t *)(addr1);
    713   1.1      matt 	}
    714   1.1      matt }
    715   1.1      matt 
    716  1.26     perry static __inline void
    717  1.30      matt vax_mem_copy_region_2(bus_space_tag_t t, bus_space_handle_t h1, bus_size_t o1,
    718  1.30      matt 	bus_space_handle_t h2, bus_size_t o2, size_t c)
    719   1.1      matt {
    720   1.1      matt 	bus_addr_t addr1 = h1 + o1;
    721   1.1      matt 	bus_addr_t addr2 = h2 + o2;
    722   1.1      matt 
    723   1.1      matt 	if (addr1 >= addr2) {
    724   1.1      matt 		/* src after dest: copy forward */
    725   1.1      matt 		for (; c != 0; c--, addr1 += 2, addr2 += 2)
    726  1.29      matt 			*(volatile uint16_t *)(addr2) =
    727  1.29      matt 			    *(volatile uint16_t *)(addr1);
    728   1.1      matt 	} else {
    729   1.1      matt 		/* dest after src: copy backwards */
    730   1.1      matt 		for (addr1 += 2 * (c - 1), addr2 += 2 * (c - 1);
    731   1.1      matt 		    c != 0; c--, addr1 -= 2, addr2 -= 2)
    732  1.29      matt 			*(volatile uint16_t *)(addr2) =
    733  1.29      matt 			    *(volatile uint16_t *)(addr1);
    734   1.1      matt 	}
    735   1.1      matt }
    736   1.1      matt 
    737  1.26     perry static __inline void
    738  1.30      matt vax_mem_copy_region_4(bus_space_tag_t t, bus_space_handle_t h1, bus_size_t o1,
    739  1.30      matt 	bus_space_handle_t h2, bus_size_t o2, size_t c)
    740   1.1      matt {
    741   1.1      matt 	bus_addr_t addr1 = h1 + o1;
    742   1.1      matt 	bus_addr_t addr2 = h2 + o2;
    743   1.1      matt 
    744   1.1      matt 	if (addr1 >= addr2) {
    745   1.1      matt 		/* src after dest: copy forward */
    746   1.1      matt 		for (; c != 0; c--, addr1 += 4, addr2 += 4)
    747  1.29      matt 			*(volatile uint32_t *)(addr2) =
    748  1.29      matt 			    *(volatile uint32_t *)(addr1);
    749   1.1      matt 	} else {
    750   1.1      matt 		/* dest after src: copy backwards */
    751   1.1      matt 		for (addr1 += 4 * (c - 1), addr2 += 4 * (c - 1);
    752   1.1      matt 		    c != 0; c--, addr1 -= 4, addr2 -= 4)
    753  1.29      matt 			*(volatile uint32_t *)(addr2) =
    754  1.29      matt 			    *(volatile uint32_t *)(addr1);
    755   1.1      matt 	}
    756   1.1      matt }
    757   1.1      matt 
    758   1.1      matt #if 0	/* Cause a link error for bus_space_copy_8 */
    759   1.1      matt #define	bus_space_copy_region_8	!!! bus_space_copy_region_8 unimplemented !!!
    760   1.1      matt #endif
    761   1.1      matt 
    762   1.1      matt 
    763   1.1      matt /*
    764   1.1      matt  * Bus read/write barrier methods.
    765   1.1      matt  *
    766  1.30      matt  *	void bus_space_barrier(bus_space_tag_t tag,
    767   1.1      matt  *	    bus_space_handle_t bsh, bus_size_t offset,
    768  1.30      matt  *	    bus_size_t len, int flags);
    769   1.1      matt  *
    770   1.1      matt  * Note: the vax does not currently require barriers, but we must
    771   1.1      matt  * provide the flags to MI code.
    772   1.1      matt  */
    773   1.1      matt #define	bus_space_barrier(t, h, o, l, f)	\
    774   1.1      matt 	((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
    775   1.1      matt #define	BUS_SPACE_BARRIER_READ	0x01		/* force read barrier */
    776   1.1      matt #define	BUS_SPACE_BARRIER_WRITE	0x02		/* force write barrier */
    777   1.1      matt 
    778   1.1      matt 
    779   1.1      matt /*
    780   1.1      matt  * Flags used in various bus DMA methods.
    781   1.1      matt  */
    782  1.17   thorpej #define	BUS_DMA_WAITOK		0x000	/* safe to sleep (pseudo-flag) */
    783  1.17   thorpej #define	BUS_DMA_NOWAIT		0x001	/* not safe to sleep */
    784  1.17   thorpej #define	BUS_DMA_ALLOCNOW	0x002	/* perform resource allocation now */
    785  1.17   thorpej #define	BUS_DMA_COHERENT	0x004	/* hint: map memory DMA coherent */
    786  1.17   thorpej #define	BUS_DMA_STREAMING	0x008	/* hint: sequential, unidirectional */
    787  1.17   thorpej #define	BUS_DMA_BUS1		0x010	/* placeholders for bus functions... */
    788  1.17   thorpej #define	BUS_DMA_BUS2		0x020
    789  1.17   thorpej #define	BUS_DMA_BUS3		0x040
    790  1.17   thorpej #define	BUS_DMA_BUS4		0x080
    791  1.17   thorpej #define	BUS_DMA_READ		0x100	/* mapping is device -> memory only */
    792  1.17   thorpej #define	BUS_DMA_WRITE		0x200	/* mapping is memory -> device only */
    793  1.21      kent #define	BUS_DMA_NOCACHE		0x400	/* hint: map non-cached memory */
    794   1.7     ragge 
    795  1.12      matt #define	VAX_BUS_DMA_SPILLPAGE	BUS_DMA_BUS1	/* VS4000 kludge */
    796   1.7     ragge /*
    797   1.7     ragge  * Private flags stored in the DMA map.
    798   1.7     ragge  */
    799   1.7     ragge #define DMAMAP_HAS_SGMAP	0x80000000	/* sgva/len are valid */
    800   1.1      matt 
    801   1.1      matt /* Forwards needed by prototypes below. */
    802   1.1      matt struct mbuf;
    803   1.1      matt struct uio;
    804   1.1      matt struct vax_sgmap;
    805   1.1      matt 
    806   1.1      matt /*
    807   1.1      matt  * Operations performed by bus_dmamap_sync().
    808   1.1      matt  */
    809   1.1      matt #define	BUS_DMASYNC_PREREAD	0x01	/* pre-read synchronization */
    810   1.1      matt #define	BUS_DMASYNC_POSTREAD	0x02	/* post-read synchronization */
    811   1.1      matt #define	BUS_DMASYNC_PREWRITE	0x04	/* pre-write synchronization */
    812   1.1      matt #define	BUS_DMASYNC_POSTWRITE	0x08	/* post-write synchronization */
    813   1.1      matt 
    814   1.1      matt /*
    815   1.1      matt  *	vax_bus_t
    816   1.1      matt  *
    817   1.1      matt  *	Busses supported by NetBSD/vax, used by internal
    818   1.1      matt  *	utility functions.  NOT TO BE USED BY MACHINE-INDEPENDENT
    819   1.1      matt  *	CODE!
    820   1.1      matt  */
    821   1.1      matt typedef enum {
    822   1.1      matt 	VAX_BUS_MAINBUS,
    823   1.1      matt 	VAX_BUS_SBI,
    824   1.1      matt 	VAX_BUS_MASSBUS,
    825   1.1      matt 	VAX_BUS_UNIBUS,		/* Also handles QBUS */
    826   1.1      matt 	VAX_BUS_BI,
    827   1.1      matt 	VAX_BUS_XMI,
    828   1.1      matt 	VAX_BUS_TURBOCHANNEL
    829   1.1      matt } vax_bus_t;
    830   1.1      matt 
    831   1.1      matt typedef struct vax_bus_dma_tag	*bus_dma_tag_t;
    832   1.1      matt typedef struct vax_bus_dmamap	*bus_dmamap_t;
    833  1.22      fvdl 
    834  1.22      fvdl #define BUS_DMA_TAG_VALID(t)    ((t) != (bus_dma_tag_t)0)
    835   1.1      matt 
    836   1.1      matt /*
    837   1.1      matt  *	bus_dma_segment_t
    838   1.1      matt  *
    839   1.1      matt  *	Describes a single contiguous DMA transaction.  Values
    840   1.1      matt  *	are suitable for programming into DMA registers.
    841   1.1      matt  */
    842   1.1      matt struct vax_bus_dma_segment {
    843   1.1      matt 	bus_addr_t	ds_addr;	/* DMA address */
    844   1.1      matt 	bus_size_t	ds_len;		/* length of transfer */
    845   1.1      matt };
    846   1.1      matt typedef struct vax_bus_dma_segment	bus_dma_segment_t;
    847  1.13     ragge 
    848  1.13     ragge struct proc;
    849   1.1      matt 
    850   1.1      matt /*
    851   1.1      matt  *	bus_dma_tag_t
    852   1.1      matt  *
    853   1.1      matt  *	A machine-dependent opaque type describing the implementation of
    854   1.1      matt  *	DMA for a given bus.
    855   1.1      matt  */
    856   1.1      matt struct vax_bus_dma_tag {
    857   1.1      matt 	void	*_cookie;		/* cookie used in the guts */
    858   1.1      matt 	bus_addr_t _wbase;		/* DMA window base */
    859   1.1      matt 	bus_size_t _wsize;		/* DMA window size */
    860   1.1      matt 
    861   1.1      matt 	/*
    862   1.1      matt 	 * Some chipsets have a built-in boundary constraint, independent
    863   1.1      matt 	 * of what the device requests.  This allows that boundary to
    864  1.16       wiz 	 * be specified.  If the device has a more restrictive constraint,
    865   1.1      matt 	 * the map will use that, otherwise this boundary will be used.
    866   1.1      matt 	 * This value is ignored if 0.
    867   1.1      matt 	 */
    868   1.1      matt 	bus_size_t _boundary;
    869   1.1      matt 
    870   1.1      matt 	/*
    871   1.1      matt 	 * A bus may have more than one SGMAP window, so SGMAP
    872   1.1      matt 	 * windows also get a pointer to their SGMAP state.
    873   1.1      matt 	 */
    874   1.1      matt 	struct vax_sgmap *_sgmap;
    875   1.1      matt 
    876   1.1      matt 	/*
    877   1.1      matt 	 * Internal-use only utility methods.  NOT TO BE USED BY
    878   1.1      matt 	 * MACHINE-INDEPENDENT CODE!
    879   1.1      matt 	 */
    880  1.30      matt 	bus_dma_tag_t (*_get_tag)(bus_dma_tag_t, vax_bus_t);
    881   1.1      matt 
    882   1.1      matt 	/*
    883   1.1      matt 	 * DMA mapping methods.
    884   1.1      matt 	 */
    885  1.30      matt 	int	(*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
    886  1.30      matt 		    bus_size_t, bus_size_t, int, bus_dmamap_t *);
    887  1.30      matt 	void	(*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
    888  1.30      matt 	int	(*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
    889  1.30      matt 		    bus_size_t, struct proc *, int);
    890  1.30      matt 	int	(*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
    891  1.30      matt 		    struct mbuf *, int);
    892  1.30      matt 	int	(*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
    893  1.30      matt 		    struct uio *, int);
    894  1.30      matt 	int	(*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
    895  1.30      matt 		    bus_dma_segment_t *, int, bus_size_t, int);
    896  1.30      matt 	void	(*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
    897  1.30      matt 	void	(*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
    898  1.30      matt 		    bus_addr_t, bus_size_t, int);
    899   1.1      matt 
    900   1.1      matt 	/*
    901   1.1      matt 	 * DMA memory utility functions.
    902   1.1      matt 	 */
    903  1.30      matt 	int	(*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
    904  1.30      matt 		    bus_size_t, bus_dma_segment_t *, int, int *, int);
    905  1.30      matt 	void	(*_dmamem_free)(bus_dma_tag_t, bus_dma_segment_t *, int);
    906  1.30      matt 	int	(*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
    907  1.30      matt 		    int, size_t, void **, int);
    908  1.30      matt 	void	(*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
    909  1.30      matt 	paddr_t	(*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
    910  1.30      matt 		    int, off_t, int, int);
    911   1.1      matt };
    912   1.1      matt 
    913   1.1      matt #define	vaxbus_dma_get_tag(t, b)				\
    914   1.1      matt 	(*(t)->_get_tag)(t, b)
    915   1.1      matt 
    916   1.1      matt #define	bus_dmamap_create(t, s, n, m, b, f, p)			\
    917   1.1      matt 	(*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
    918   1.1      matt #define	bus_dmamap_destroy(t, p)				\
    919   1.1      matt 	(*(t)->_dmamap_destroy)((t), (p))
    920   1.1      matt #define	bus_dmamap_load(t, m, b, s, p, f)			\
    921   1.1      matt 	(*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
    922   1.1      matt #define	bus_dmamap_load_mbuf(t, m, b, f)			\
    923   1.1      matt 	(*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
    924   1.1      matt #define	bus_dmamap_load_uio(t, m, u, f)				\
    925   1.1      matt 	(*(t)->_dmamap_load_uio)((t), (m), (u), (f))
    926   1.1      matt #define	bus_dmamap_load_raw(t, m, sg, n, s, f)			\
    927   1.1      matt 	(*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
    928   1.1      matt #define	bus_dmamap_unload(t, p)					\
    929   1.1      matt 	(*(t)->_dmamap_unload)((t), (p))
    930   1.1      matt #define	bus_dmamap_sync(t, p, o, l, ops)			\
    931   1.1      matt 	(*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
    932   1.1      matt #define	bus_dmamem_alloc(t, s, a, b, sg, n, r, f)		\
    933   1.1      matt 	(*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
    934   1.1      matt #define	bus_dmamem_free(t, sg, n)				\
    935   1.1      matt 	(*(t)->_dmamem_free)((t), (sg), (n))
    936   1.1      matt #define	bus_dmamem_map(t, sg, n, s, k, f)			\
    937   1.1      matt 	(*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
    938   1.1      matt #define	bus_dmamem_unmap(t, k, s)				\
    939   1.1      matt 	(*(t)->_dmamem_unmap)((t), (k), (s))
    940   1.1      matt #define	bus_dmamem_mmap(t, sg, n, o, p, f)			\
    941   1.1      matt 	(*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
    942   1.1      matt 
    943  1.27       mrg #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP
    944  1.27       mrg #define bus_dmatag_destroy(t)
    945  1.27       mrg 
    946   1.1      matt /*
    947   1.1      matt  *	bus_dmamap_t
    948   1.1      matt  *
    949   1.1      matt  *	Describes a DMA mapping.
    950   1.1      matt  */
    951   1.1      matt struct vax_bus_dmamap {
    952   1.1      matt 	/*
    953   1.1      matt 	 * PRIVATE MEMBERS: not for use my machine-independent code.
    954   1.1      matt 	 */
    955   1.1      matt 	bus_size_t	_dm_size;	/* largest DMA transfer mappable */
    956   1.1      matt 	int		_dm_segcnt;	/* number of segs this map can map */
    957  1.23      matt 	bus_size_t	_dm_maxmaxsegsz; /* fixed largest possible segment */
    958   1.1      matt 	bus_size_t	_dm_boundary;	/* don't cross this */
    959   1.1      matt 	int		_dm_flags;	/* misc. flags */
    960   1.1      matt 
    961   1.1      matt 	/*
    962   1.1      matt 	 * This is used only for SGMAP-mapped DMA, but we keep it
    963   1.1      matt 	 * here to avoid pointless indirection.
    964   1.1      matt 	 */
    965   1.1      matt 	int		_dm_pteidx;	/* PTE index */
    966   1.1      matt 	int		_dm_ptecnt;	/* PTE count */
    967   1.1      matt 	u_long		_dm_sgva;	/* allocated sgva */
    968   1.1      matt 	bus_size_t	_dm_sgvalen;	/* svga length */
    969   1.1      matt 
    970   1.1      matt 	/*
    971   1.1      matt 	 * PUBLIC MEMBERS: these are used by machine-independent code.
    972   1.1      matt 	 */
    973  1.23      matt 	bus_size_t	dm_maxsegsz;	/* largest possible segment */
    974   1.1      matt 	bus_size_t	dm_mapsize;	/* size of the mapping */
    975   1.1      matt 	int		dm_nsegs;	/* # valid segments in mapping */
    976   1.1      matt 	bus_dma_segment_t dm_segs[1];	/* segments; variable length */
    977   1.1      matt };
    978   1.1      matt 
    979  1.20      matt /*#ifdef _VAX_BUS_DMA_PRIVATE */
    980  1.30      matt int	_bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
    981  1.30      matt 	    bus_size_t, int, bus_dmamap_t *);
    982  1.30      matt void	_bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
    983  1.30      matt 
    984  1.30      matt int	_bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t,
    985  1.30      matt 	    void *, bus_size_t, struct proc *, int);
    986  1.30      matt int	_bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, struct mbuf *, int);
    987  1.30      matt int	_bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, struct uio *, int);
    988  1.30      matt int	_bus_dmamap_load_raw(bus_dma_tag_t,
    989  1.30      matt 	    bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int);
    990  1.30      matt 
    991  1.30      matt void	_bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
    992  1.30      matt void	_bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
    993  1.30      matt 	    bus_size_t, int);
    994   1.1      matt 
    995  1.30      matt int	_bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
    996   1.1      matt 	    bus_size_t alignment, bus_size_t boundary,
    997  1.30      matt 	    bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags);
    998  1.30      matt void	_bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, int nsegs);
    999  1.30      matt int	_bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs,
   1000  1.30      matt 	    int nsegs, size_t size, void **kvap, int flags);
   1001  1.30      matt void	_bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, size_t size);
   1002  1.30      matt paddr_t	_bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
   1003  1.30      matt 	    int nsegs, off_t off, int prot, int flags);
   1004  1.20      matt /*#endif*/ /* _VAX_BUS_DMA_PRIVATE */
   1005   1.1      matt 
   1006   1.1      matt #endif /* _VAX_BUS_H_ */
   1007