bus.h revision 1.9 1 1.9 drochner /* $NetBSD: bus.h,v 1.9 2000/01/25 22:13:24 drochner Exp $ */
2 1.1 matt
3 1.1 matt /*-
4 1.1 matt * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
5 1.1 matt * All rights reserved.
6 1.1 matt *
7 1.1 matt * This code is derived from software contributed to The NetBSD Foundation
8 1.1 matt * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.1 matt * NASA Ames Research Center.
10 1.1 matt *
11 1.1 matt * Redistribution and use in source and binary forms, with or without
12 1.1 matt * modification, are permitted provided that the following conditions
13 1.1 matt * are met:
14 1.1 matt * 1. Redistributions of source code must retain the above copyright
15 1.1 matt * notice, this list of conditions and the following disclaimer.
16 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 matt * notice, this list of conditions and the following disclaimer in the
18 1.1 matt * documentation and/or other materials provided with the distribution.
19 1.1 matt * 3. All advertising materials mentioning features or use of this software
20 1.1 matt * must display the following acknowledgement:
21 1.1 matt * This product includes software developed by the NetBSD
22 1.1 matt * Foundation, Inc. and its contributors.
23 1.1 matt * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 matt * contributors may be used to endorse or promote products derived
25 1.1 matt * from this software without specific prior written permission.
26 1.1 matt *
27 1.1 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 matt * POSSIBILITY OF SUCH DAMAGE.
38 1.1 matt */
39 1.1 matt
40 1.1 matt /*
41 1.1 matt * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
42 1.1 matt * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
43 1.1 matt *
44 1.1 matt * Redistribution and use in source and binary forms, with or without
45 1.1 matt * modification, are permitted provided that the following conditions
46 1.1 matt * are met:
47 1.1 matt * 1. Redistributions of source code must retain the above copyright
48 1.1 matt * notice, this list of conditions and the following disclaimer.
49 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
50 1.1 matt * notice, this list of conditions and the following disclaimer in the
51 1.1 matt * documentation and/or other materials provided with the distribution.
52 1.1 matt * 3. All advertising materials mentioning features or use of this software
53 1.1 matt * must display the following acknowledgement:
54 1.1 matt * This product includes software developed by Christopher G. Demetriou
55 1.1 matt * for the NetBSD Project.
56 1.1 matt * 4. The name of the author may not be used to endorse or promote products
57 1.1 matt * derived from this software without specific prior written permission
58 1.1 matt *
59 1.1 matt * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
60 1.1 matt * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
61 1.1 matt * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62 1.1 matt * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
63 1.1 matt * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
64 1.1 matt * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
65 1.1 matt * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
66 1.1 matt * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
67 1.1 matt * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
68 1.1 matt * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
69 1.1 matt */
70 1.1 matt
71 1.1 matt #ifndef _VAX_BUS_H_
72 1.1 matt #define _VAX_BUS_H_
73 1.1 matt
74 1.1 matt #ifdef BUS_SPACE_DEBUG
75 1.1 matt /*
76 1.1 matt * Macros for sanity-checking the aligned-ness of pointers passed to
77 1.1 matt * bus space ops. These are not strictly necessary on the VAX, but
78 1.1 matt * could lead to performance improvements, and help catch problems
79 1.1 matt * with drivers that would creep up on other architectures.
80 1.1 matt */
81 1.1 matt #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \
82 1.1 matt ((((u_long)(p)) & (sizeof(t)-1)) == 0)
83 1.1 matt
84 1.1 matt #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \
85 1.1 matt ({ \
86 1.1 matt if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \
87 1.1 matt printf("%s 0x%lx not aligned to %d bytes %s:%d\n", \
88 1.1 matt d, (u_long)(p), sizeof(t), __FILE__, __LINE__); \
89 1.1 matt } \
90 1.1 matt (void) 0; \
91 1.1 matt })
92 1.4 drochner
93 1.4 drochner #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t)
94 1.1 matt #else
95 1.1 matt #define __BUS_SPACE_ADDRESS_SANITY(p,t,d) (void) 0
96 1.4 drochner #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
97 1.1 matt #endif /* BUS_SPACE_DEBUG */
98 1.1 matt
99 1.1 matt /*
100 1.1 matt * Bus address and size types
101 1.1 matt */
102 1.1 matt typedef u_long bus_addr_t;
103 1.1 matt typedef u_long bus_size_t;
104 1.1 matt
105 1.1 matt /*
106 1.1 matt * Access methods for bus resources and address space.
107 1.1 matt */
108 1.6 ragge typedef struct vax_bus_space *bus_space_tag_t;
109 1.1 matt typedef u_long bus_space_handle_t;
110 1.1 matt
111 1.1 matt struct vax_bus_space {
112 1.1 matt /* cookie */
113 1.1 matt void *vbs_cookie;
114 1.1 matt
115 1.1 matt /* mapping/unmapping */
116 1.1 matt int (*vbs_map) __P((void *, bus_addr_t, bus_size_t,
117 1.1 matt int, bus_space_handle_t *, int));
118 1.1 matt void (*vbs_unmap) __P((void *, bus_space_handle_t,
119 1.1 matt bus_size_t, int));
120 1.1 matt int (*vbs_subregion) __P((void *, bus_space_handle_t,
121 1.1 matt bus_size_t, bus_size_t, bus_space_handle_t *));
122 1.1 matt
123 1.1 matt /* allocation/deallocation */
124 1.1 matt int (*vbs_alloc) __P((void *, bus_addr_t, bus_addr_t,
125 1.1 matt bus_size_t, bus_size_t, bus_size_t, int,
126 1.1 matt bus_addr_t *, bus_space_handle_t *));
127 1.1 matt void (*vbs_free) __P((void *, bus_space_handle_t,
128 1.1 matt bus_size_t));
129 1.1 matt };
130 1.1 matt
131 1.1 matt /*
132 1.1 matt * int bus_space_map __P((bus_space_tag_t t, bus_addr_t addr,
133 1.1 matt * bus_size_t size, int flags, bus_space_handle_t *bshp));
134 1.1 matt *
135 1.1 matt * Map a region of bus space.
136 1.1 matt */
137 1.1 matt
138 1.1 matt #define BUS_SPACE_MAP_CACHEABLE 0x01
139 1.1 matt #define BUS_SPACE_MAP_LINEAR 0x02
140 1.9 drochner #define BUS_SPACE_MAP_PREFETCHABLE 0x04
141 1.1 matt
142 1.1 matt #define bus_space_map(t, a, s, f, hp) \
143 1.1 matt (*(t)->vbs_map)((t)->vbs_cookie, (a), (s), (f), (hp), 1)
144 1.1 matt #define vax_bus_space_map_noacct(t, a, s, f, hp) \
145 1.1 matt (*(t)->vbs_map)((t)->vbs_cookie, (a), (s), (f), (hp), 0)
146 1.1 matt
147 1.1 matt /*
148 1.1 matt * int bus_space_unmap __P((bus_space_tag_t t,
149 1.1 matt * bus_space_handle_t bsh, bus_size_t size));
150 1.1 matt *
151 1.1 matt * Unmap a region of bus space.
152 1.1 matt */
153 1.1 matt
154 1.1 matt #define bus_space_unmap(t, h, s) \
155 1.1 matt (*(t)->vbs_unmap)((t)->vbs_cookie, (h), (s), 1)
156 1.1 matt #define vax_bus_space_unmap_noacct(t, h, s) \
157 1.1 matt (*(t)->vbs_unmap)((t)->vbs_cookie, (h), (s), 0)
158 1.1 matt
159 1.1 matt /*
160 1.1 matt * int bus_space_subregion __P((bus_space_tag_t t,
161 1.1 matt * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
162 1.1 matt * bus_space_handle_t *nbshp));
163 1.1 matt *
164 1.1 matt * Get a new handle for a subregion of an already-mapped area of bus space.
165 1.1 matt */
166 1.1 matt
167 1.1 matt #define bus_space_subregion(t, h, o, s, nhp) \
168 1.1 matt (*(t)->vbs_subregion)((t)->vbs_cookie, (h), (o), (s), (hp))
169 1.1 matt
170 1.1 matt /*
171 1.1 matt * int bus_space_alloc __P((bus_space_tag_t t, bus_addr_t rstart,
172 1.1 matt * bus_addr_t rend, bus_size_t size, bus_size_t align,
173 1.1 matt * bus_size_t boundary, int flags, bus_addr_t *addrp,
174 1.1 matt * bus_space_handle_t *bshp));
175 1.1 matt *
176 1.1 matt * Allocate a region of bus space.
177 1.1 matt */
178 1.1 matt
179 1.1 matt #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \
180 1.1 matt (*(t)->vbs_alloc)((t)->vbs_cookie, (rs), (re), (s), (a), (b), \
181 1.1 matt (f), (ap), (hp))
182 1.1 matt
183 1.1 matt /*
184 1.1 matt * int bus_space_free __P((bus_space_tag_t t,
185 1.1 matt * bus_space_handle_t bsh, bus_size_t size));
186 1.1 matt *
187 1.1 matt * Free a region of bus space.
188 1.1 matt */
189 1.1 matt
190 1.1 matt #define bus_space_free(t, h, s) \
191 1.1 matt (*(t)->vbs_free)((t)->vbs_cookie, (h), (s))
192 1.1 matt
193 1.1 matt /*
194 1.1 matt * u_intN_t bus_space_read_N __P((bus_space_tag_t tag,
195 1.1 matt * bus_space_handle_t bsh, bus_size_t offset));
196 1.1 matt *
197 1.1 matt * Read a 1, 2, 4, or 8 byte quantity from bus space
198 1.1 matt * described by tag/handle/offset.
199 1.1 matt */
200 1.1 matt
201 1.1 matt #define bus_space_read_1(t, h, o) \
202 1.1 matt (*(volatile u_int8_t *)((h) + (o)))
203 1.1 matt
204 1.1 matt #define bus_space_read_2(t, h, o) \
205 1.1 matt (__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr"), \
206 1.1 matt (*(volatile u_int16_t *)((h) + (o))))
207 1.1 matt
208 1.1 matt #define bus_space_read_4(t, h, o) \
209 1.1 matt (__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr"), \
210 1.1 matt (*(volatile u_int32_t *)((h) + (o))))
211 1.1 matt
212 1.1 matt #if 0 /* Cause a link error for bus_space_read_8 */
213 1.1 matt #define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!!
214 1.1 matt #endif
215 1.1 matt
216 1.1 matt /*
217 1.1 matt * void bus_space_read_multi_N __P((bus_space_tag_t tag,
218 1.1 matt * bus_space_handle_t bsh, bus_size_t offset,
219 1.1 matt * u_intN_t *addr, size_t count));
220 1.1 matt *
221 1.1 matt * Read `count' 1, 2, 4, or 8 byte quantities from bus space
222 1.1 matt * described by tag/handle/offset and copy into buffer provided.
223 1.1 matt */
224 1.1 matt static __inline void vax_mem_read_multi_1 __P((bus_space_tag_t,
225 1.1 matt bus_space_handle_t, bus_size_t, u_int8_t *, size_t));
226 1.1 matt static __inline void vax_mem_read_multi_2 __P((bus_space_tag_t,
227 1.1 matt bus_space_handle_t, bus_size_t, u_int16_t *, size_t));
228 1.1 matt static __inline void vax_mem_read_multi_4 __P((bus_space_tag_t,
229 1.1 matt bus_space_handle_t, bus_size_t, u_int32_t *, size_t));
230 1.1 matt
231 1.1 matt #define bus_space_read_multi_1(t, h, o, a, c) \
232 1.1 matt vax_mem_read_multi_1((t), (h), (o), (a), (c))
233 1.1 matt
234 1.1 matt #define bus_space_read_multi_2(t, h, o, a, c) \
235 1.1 matt do { \
236 1.1 matt __BUS_SPACE_ADDRESS_SANITY((a), u_int16_t, "buffer"); \
237 1.1 matt __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr"); \
238 1.1 matt vax_mem_read_multi_2((t), (h), (o), (a), (c)); \
239 1.1 matt } while (0)
240 1.1 matt
241 1.1 matt #define bus_space_read_multi_4(t, h, o, a, c) \
242 1.1 matt do { \
243 1.1 matt __BUS_SPACE_ADDRESS_SANITY((a), u_int32_t, "buffer"); \
244 1.1 matt __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr"); \
245 1.1 matt vax_mem_read_multi_4((t), (h), (o), (a), (c)); \
246 1.1 matt } while (0)
247 1.1 matt
248 1.1 matt #if 0 /* Cause a link error for bus_space_read_multi_8 */
249 1.1 matt #define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!!
250 1.1 matt #endif
251 1.1 matt
252 1.1 matt static __inline void
253 1.3 matt vax_mem_read_multi_1(t, h, o, a, c)
254 1.1 matt bus_space_tag_t t;
255 1.1 matt bus_space_handle_t h;
256 1.1 matt bus_size_t o;
257 1.3 matt u_int8_t *a;
258 1.1 matt size_t c;
259 1.1 matt {
260 1.1 matt const bus_addr_t addr = h + o;
261 1.1 matt
262 1.1 matt for (; c != 0; c--, a++)
263 1.1 matt *a = *(volatile u_int8_t *)(addr);
264 1.1 matt }
265 1.1 matt
266 1.1 matt static __inline void
267 1.3 matt vax_mem_read_multi_2(t, h, o, a, c)
268 1.1 matt bus_space_tag_t t;
269 1.1 matt bus_space_handle_t h;
270 1.1 matt bus_size_t o;
271 1.3 matt u_int16_t *a;
272 1.1 matt size_t c;
273 1.1 matt {
274 1.1 matt const bus_addr_t addr = h + o;
275 1.1 matt
276 1.1 matt for (; c != 0; c--, a++)
277 1.1 matt *a = *(volatile u_int16_t *)(addr);
278 1.1 matt }
279 1.1 matt
280 1.1 matt static __inline void
281 1.3 matt vax_mem_read_multi_4(t, h, o, a, c)
282 1.1 matt bus_space_tag_t t;
283 1.1 matt bus_space_handle_t h;
284 1.1 matt bus_size_t o;
285 1.3 matt u_int32_t *a;
286 1.1 matt size_t c;
287 1.1 matt {
288 1.1 matt const bus_addr_t addr = h + o;
289 1.1 matt
290 1.1 matt for (; c != 0; c--, a++)
291 1.1 matt *a = *(volatile u_int32_t *)(addr);
292 1.1 matt }
293 1.1 matt
294 1.1 matt /*
295 1.1 matt * void bus_space_read_region_N __P((bus_space_tag_t tag,
296 1.1 matt * bus_space_handle_t bsh, bus_size_t offset,
297 1.1 matt * u_intN_t *addr, size_t count));
298 1.1 matt *
299 1.1 matt * Read `count' 1, 2, 4, or 8 byte quantities from bus space
300 1.1 matt * described by tag/handle and starting at `offset' and copy into
301 1.1 matt * buffer provided.
302 1.1 matt */
303 1.1 matt
304 1.1 matt static __inline void vax_mem_read_region_1 __P((bus_space_tag_t,
305 1.1 matt bus_space_handle_t, bus_size_t, u_int8_t *, size_t));
306 1.1 matt static __inline void vax_mem_read_region_2 __P((bus_space_tag_t,
307 1.1 matt bus_space_handle_t, bus_size_t, u_int16_t *, size_t));
308 1.1 matt static __inline void vax_mem_read_region_4 __P((bus_space_tag_t,
309 1.1 matt bus_space_handle_t, bus_size_t, u_int32_t *, size_t));
310 1.1 matt
311 1.1 matt #define bus_space_read_region_1(t, h, o, a, c) \
312 1.1 matt do { \
313 1.1 matt vax_mem_read_region_1((t), (h), (o), (a), (c)); \
314 1.1 matt } while (0)
315 1.1 matt
316 1.1 matt #define bus_space_read_region_2(t, h, o, a, c) \
317 1.1 matt do { \
318 1.1 matt __BUS_SPACE_ADDRESS_SANITY((a), u_int16_t, "buffer"); \
319 1.1 matt __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr"); \
320 1.1 matt vax_mem_read_region_2((t), (h), (o), (a), (c)); \
321 1.1 matt } while (0)
322 1.1 matt
323 1.1 matt #define bus_space_read_region_4(t, h, o, a, c) \
324 1.1 matt do { \
325 1.1 matt __BUS_SPACE_ADDRESS_SANITY((a), u_int32_t, "buffer"); \
326 1.1 matt __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr"); \
327 1.1 matt vax_mem_read_region_4((t), (h), (o), (a), (c)); \
328 1.1 matt } while (0)
329 1.1 matt
330 1.1 matt #if 0 /* Cause a link error for bus_space_read_region_8 */
331 1.1 matt #define bus_space_read_region_8 \
332 1.1 matt !!! bus_space_read_region_8 unimplemented !!!
333 1.1 matt #endif
334 1.1 matt
335 1.1 matt static __inline void
336 1.1 matt vax_mem_read_region_1(t, h, o, a, c)
337 1.1 matt bus_space_tag_t t;
338 1.1 matt bus_space_handle_t h;
339 1.1 matt bus_size_t o;
340 1.3 matt u_int8_t *a;
341 1.1 matt size_t c;
342 1.1 matt {
343 1.1 matt bus_addr_t addr = h + o;
344 1.1 matt
345 1.1 matt for (; c != 0; c--, addr++, a++)
346 1.1 matt *a = *(volatile u_int8_t *)(addr);
347 1.1 matt }
348 1.1 matt
349 1.1 matt static __inline void
350 1.1 matt vax_mem_read_region_2(t, h, o, a, c)
351 1.1 matt bus_space_tag_t t;
352 1.1 matt bus_space_handle_t h;
353 1.1 matt bus_size_t o;
354 1.3 matt u_int16_t *a;
355 1.1 matt size_t c;
356 1.1 matt {
357 1.1 matt bus_addr_t addr = h + o;
358 1.1 matt
359 1.1 matt for (; c != 0; c--, addr++, a++)
360 1.1 matt *a = *(volatile u_int16_t *)(addr);
361 1.1 matt }
362 1.1 matt
363 1.1 matt static __inline void
364 1.1 matt vax_mem_read_region_4(t, h, o, a, c)
365 1.1 matt bus_space_tag_t t;
366 1.1 matt bus_space_handle_t h;
367 1.1 matt bus_size_t o;
368 1.3 matt u_int32_t *a;
369 1.1 matt size_t c;
370 1.1 matt {
371 1.1 matt bus_addr_t addr = h + o;
372 1.1 matt
373 1.1 matt for (; c != 0; c--, addr++, a++)
374 1.1 matt *a = *(volatile u_int32_t *)(addr);
375 1.1 matt }
376 1.1 matt
377 1.1 matt /*
378 1.1 matt * void bus_space_write_N __P((bus_space_tag_t tag,
379 1.1 matt * bus_space_handle_t bsh, bus_size_t offset,
380 1.1 matt * u_intN_t value));
381 1.1 matt *
382 1.1 matt * Write the 1, 2, 4, or 8 byte value `value' to bus space
383 1.1 matt * described by tag/handle/offset.
384 1.1 matt */
385 1.1 matt
386 1.1 matt #define bus_space_write_1(t, h, o, v) \
387 1.1 matt do { \
388 1.1 matt ((void)(*(volatile u_int8_t *)((h) + (o)) = (v))); \
389 1.1 matt } while (0)
390 1.1 matt
391 1.1 matt #define bus_space_write_2(t, h, o, v) \
392 1.1 matt do { \
393 1.1 matt __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr"); \
394 1.1 matt ((void)(*(volatile u_int16_t *)((h) + (o)) = (v))); \
395 1.1 matt } while (0)
396 1.1 matt
397 1.1 matt #define bus_space_write_4(t, h, o, v) \
398 1.1 matt do { \
399 1.1 matt __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr"); \
400 1.1 matt ((void)(*(volatile u_int32_t *)((h) + (o)) = (v))); \
401 1.1 matt } while (0)
402 1.1 matt
403 1.1 matt #if 0 /* Cause a link error for bus_space_write_8 */
404 1.1 matt #define bus_space_write_8 !!! bus_space_write_8 not implemented !!!
405 1.1 matt #endif
406 1.1 matt
407 1.1 matt /*
408 1.1 matt * void bus_space_write_multi_N __P((bus_space_tag_t tag,
409 1.1 matt * bus_space_handle_t bsh, bus_size_t offset,
410 1.1 matt * const u_intN_t *addr, size_t count));
411 1.1 matt *
412 1.1 matt * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
413 1.1 matt * provided to bus space described by tag/handle/offset.
414 1.1 matt */
415 1.1 matt static __inline void vax_mem_write_multi_1 __P((bus_space_tag_t,
416 1.1 matt bus_space_handle_t, bus_size_t, const u_int8_t *, size_t));
417 1.1 matt static __inline void vax_mem_write_multi_2 __P((bus_space_tag_t,
418 1.1 matt bus_space_handle_t, bus_size_t, const u_int16_t *, size_t));
419 1.1 matt static __inline void vax_mem_write_multi_4 __P((bus_space_tag_t,
420 1.1 matt bus_space_handle_t, bus_size_t, const u_int32_t *, size_t));
421 1.1 matt
422 1.1 matt #define bus_space_write_multi_1(t, h, o, a, c) \
423 1.1 matt do { \
424 1.1 matt vax_mem_write_multi_1((t), (h), (o), (a), (c)); \
425 1.1 matt } while (0)
426 1.1 matt
427 1.1 matt #define bus_space_write_multi_2(t, h, o, a, c) \
428 1.1 matt do { \
429 1.1 matt __BUS_SPACE_ADDRESS_SANITY((a), u_int16_t, "buffer"); \
430 1.1 matt __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr"); \
431 1.1 matt vax_mem_write_multi_2((t), (h), (o), (a), (c)); \
432 1.1 matt } while (0)
433 1.1 matt
434 1.1 matt #define bus_space_write_multi_4(t, h, o, a, c) \
435 1.1 matt do { \
436 1.1 matt __BUS_SPACE_ADDRESS_SANITY((a), u_int32_t, "buffer"); \
437 1.1 matt __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr"); \
438 1.1 matt vax_mem_write_multi_4((t), (h), (o), (a), (c)); \
439 1.1 matt } while (0)
440 1.1 matt
441 1.1 matt #if 0 /* Cause a link error for bus_space_write_multi_8 */
442 1.1 matt #define bus_space_write_multi_8(t, h, o, a, c) \
443 1.1 matt !!! bus_space_write_multi_8 unimplemented !!!
444 1.1 matt #endif
445 1.1 matt
446 1.1 matt static __inline void
447 1.1 matt vax_mem_write_multi_1(t, h, o, a, c)
448 1.1 matt bus_space_tag_t t;
449 1.1 matt bus_space_handle_t h;
450 1.1 matt bus_size_t o;
451 1.1 matt const u_int8_t *a;
452 1.1 matt size_t c;
453 1.1 matt {
454 1.1 matt const bus_addr_t addr = h + o;
455 1.1 matt
456 1.1 matt for (; c != 0; c--, a++)
457 1.1 matt *(volatile u_int8_t *)(addr) = *a;
458 1.1 matt }
459 1.1 matt
460 1.1 matt static __inline void
461 1.1 matt vax_mem_write_multi_2(t, h, o, a, c)
462 1.1 matt bus_space_tag_t t;
463 1.1 matt bus_space_handle_t h;
464 1.1 matt bus_size_t o;
465 1.3 matt const u_int16_t *a;
466 1.1 matt size_t c;
467 1.1 matt {
468 1.1 matt const bus_addr_t addr = h + o;
469 1.1 matt
470 1.3 matt for (; c != 0; c--, a++)
471 1.1 matt *(volatile u_int16_t *)(addr) = *a;
472 1.1 matt }
473 1.1 matt
474 1.1 matt static __inline void
475 1.1 matt vax_mem_write_multi_4(t, h, o, a, c)
476 1.1 matt bus_space_tag_t t;
477 1.1 matt bus_space_handle_t h;
478 1.1 matt bus_size_t o;
479 1.1 matt const u_int32_t *a;
480 1.1 matt size_t c;
481 1.1 matt {
482 1.1 matt const bus_addr_t addr = h + o;
483 1.1 matt
484 1.1 matt for (; c != 0; c--, a++)
485 1.1 matt *(volatile u_int32_t *)(addr) = *a;
486 1.1 matt }
487 1.1 matt
488 1.1 matt /*
489 1.1 matt * void bus_space_write_region_N __P((bus_space_tag_t tag,
490 1.1 matt * bus_space_handle_t bsh, bus_size_t offset,
491 1.1 matt * const u_intN_t *addr, size_t count));
492 1.1 matt *
493 1.1 matt * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
494 1.1 matt * to bus space described by tag/handle starting at `offset'.
495 1.1 matt */
496 1.1 matt static __inline void vax_mem_write_region_1 __P((bus_space_tag_t,
497 1.1 matt bus_space_handle_t, bus_size_t, const u_int8_t *, size_t));
498 1.1 matt static __inline void vax_mem_write_region_2 __P((bus_space_tag_t,
499 1.1 matt bus_space_handle_t, bus_size_t, const u_int16_t *, size_t));
500 1.1 matt static __inline void vax_mem_write_region_4 __P((bus_space_tag_t,
501 1.1 matt bus_space_handle_t, bus_size_t, const u_int32_t *, size_t));
502 1.1 matt
503 1.1 matt #define bus_space_write_region_1(t, h, o, a, c) \
504 1.1 matt vax_mem_write_region_1((t), (h), (o), (a), (c))
505 1.1 matt
506 1.1 matt #define bus_space_write_region_2(t, h, o, a, c) \
507 1.1 matt do { \
508 1.1 matt __BUS_SPACE_ADDRESS_SANITY((a), u_int16_t, "buffer"); \
509 1.1 matt __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr"); \
510 1.1 matt vax_mem_write_region_2((t), (h), (o), (a), (c)); \
511 1.1 matt } while (0)
512 1.1 matt
513 1.1 matt #define bus_space_write_region_4(t, h, o, a, c) \
514 1.1 matt do { \
515 1.1 matt __BUS_SPACE_ADDRESS_SANITY((a), u_int32_t, "buffer"); \
516 1.1 matt __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr"); \
517 1.1 matt vax_mem_write_region_4((t), (h), (o), (a), (c)); \
518 1.1 matt } while (0)
519 1.1 matt
520 1.1 matt #if 0 /* Cause a link error for bus_space_write_region_8 */
521 1.1 matt #define bus_space_write_region_8 \
522 1.1 matt !!! bus_space_write_region_8 unimplemented !!!
523 1.1 matt #endif
524 1.1 matt
525 1.1 matt static __inline void
526 1.1 matt vax_mem_write_region_1(t, h, o, a, c)
527 1.1 matt bus_space_tag_t t;
528 1.1 matt bus_space_handle_t h;
529 1.1 matt bus_size_t o;
530 1.1 matt const u_int8_t *a;
531 1.1 matt size_t c;
532 1.1 matt {
533 1.1 matt bus_addr_t addr = h + o;
534 1.1 matt
535 1.1 matt for (; c != 0; c--, addr++, a++)
536 1.1 matt *(volatile u_int8_t *)(addr) = *a;
537 1.1 matt }
538 1.1 matt
539 1.1 matt static __inline void
540 1.1 matt vax_mem_write_region_2(t, h, o, a, c)
541 1.1 matt bus_space_tag_t t;
542 1.1 matt bus_space_handle_t h;
543 1.1 matt bus_size_t o;
544 1.3 matt const u_int16_t *a;
545 1.1 matt size_t c;
546 1.1 matt {
547 1.1 matt bus_addr_t addr = h + o;
548 1.1 matt
549 1.1 matt for (; c != 0; c--, addr++, a++)
550 1.1 matt *(volatile u_int16_t *)(addr) = *a;
551 1.1 matt }
552 1.1 matt
553 1.1 matt static __inline void
554 1.1 matt vax_mem_write_region_4(t, h, o, a, c)
555 1.1 matt bus_space_tag_t t;
556 1.1 matt bus_space_handle_t h;
557 1.1 matt bus_size_t o;
558 1.1 matt const u_int32_t *a;
559 1.1 matt size_t c;
560 1.1 matt {
561 1.1 matt bus_addr_t addr = h + o;
562 1.1 matt
563 1.1 matt for (; c != 0; c--, addr++, a++)
564 1.1 matt *(volatile u_int32_t *)(addr) = *a;
565 1.1 matt }
566 1.1 matt
567 1.1 matt /*
568 1.1 matt * void bus_space_set_multi_N __P((bus_space_tag_t tag,
569 1.1 matt * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
570 1.1 matt * size_t count));
571 1.1 matt *
572 1.1 matt * Write the 1, 2, 4, or 8 byte value `val' to bus space described
573 1.1 matt * by tag/handle/offset `count' times.
574 1.1 matt */
575 1.1 matt
576 1.1 matt static __inline void vax_mem_set_multi_1 __P((bus_space_tag_t,
577 1.1 matt bus_space_handle_t, bus_size_t, u_int8_t, size_t));
578 1.1 matt static __inline void vax_mem_set_multi_2 __P((bus_space_tag_t,
579 1.1 matt bus_space_handle_t, bus_size_t, u_int16_t, size_t));
580 1.1 matt static __inline void vax_mem_set_multi_4 __P((bus_space_tag_t,
581 1.1 matt bus_space_handle_t, bus_size_t, u_int32_t, size_t));
582 1.1 matt
583 1.1 matt #define bus_space_set_multi_1(t, h, o, v, c) \
584 1.1 matt vax_mem_set_multi_1((t), (h), (o), (v), (c))
585 1.1 matt
586 1.1 matt #define bus_space_set_multi_2(t, h, o, v, c) \
587 1.1 matt do { \
588 1.1 matt __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr"); \
589 1.1 matt vax_mem_set_multi_2((t), (h), (o), (v), (c)); \
590 1.1 matt } while (0)
591 1.1 matt
592 1.1 matt #define bus_space_set_multi_4(t, h, o, v, c) \
593 1.1 matt do { \
594 1.1 matt __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr"); \
595 1.1 matt vax_mem_set_multi_4((t), (h), (o), (v), (c)); \
596 1.1 matt } while (0)
597 1.1 matt
598 1.1 matt static __inline void
599 1.1 matt vax_mem_set_multi_1(t, h, o, v, c)
600 1.1 matt bus_space_tag_t t;
601 1.1 matt bus_space_handle_t h;
602 1.1 matt bus_size_t o;
603 1.1 matt u_int8_t v;
604 1.1 matt size_t c;
605 1.1 matt {
606 1.1 matt bus_addr_t addr = h + o;
607 1.1 matt
608 1.1 matt while (c--)
609 1.1 matt *(volatile u_int8_t *)(addr) = v;
610 1.1 matt }
611 1.1 matt
612 1.1 matt static __inline void
613 1.1 matt vax_mem_set_multi_2(t, h, o, v, c)
614 1.1 matt bus_space_tag_t t;
615 1.1 matt bus_space_handle_t h;
616 1.1 matt bus_size_t o;
617 1.1 matt u_int16_t v;
618 1.1 matt size_t c;
619 1.1 matt {
620 1.1 matt bus_addr_t addr = h + o;
621 1.1 matt
622 1.1 matt while (c--)
623 1.1 matt *(volatile u_int16_t *)(addr) = v;
624 1.1 matt }
625 1.1 matt
626 1.1 matt static __inline void
627 1.1 matt vax_mem_set_multi_4(t, h, o, v, c)
628 1.1 matt bus_space_tag_t t;
629 1.1 matt bus_space_handle_t h;
630 1.1 matt bus_size_t o;
631 1.1 matt u_int32_t v;
632 1.1 matt size_t c;
633 1.1 matt {
634 1.1 matt bus_addr_t addr = h + o;
635 1.1 matt
636 1.1 matt while (c--)
637 1.1 matt *(volatile u_int32_t *)(addr) = v;
638 1.1 matt }
639 1.1 matt
640 1.1 matt #if 0 /* Cause a link error for bus_space_set_multi_8 */
641 1.1 matt #define bus_space_set_multi_8 !!! bus_space_set_multi_8 unimplemented !!!
642 1.1 matt #endif
643 1.1 matt
644 1.1 matt /*
645 1.1 matt * void bus_space_set_region_N __P((bus_space_tag_t tag,
646 1.1 matt * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
647 1.1 matt * size_t count));
648 1.1 matt *
649 1.1 matt * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
650 1.1 matt * by tag/handle starting at `offset'.
651 1.1 matt */
652 1.1 matt
653 1.1 matt static __inline void vax_mem_set_region_1 __P((bus_space_tag_t,
654 1.1 matt bus_space_handle_t, bus_size_t, u_int8_t, size_t));
655 1.1 matt static __inline void vax_mem_set_region_2 __P((bus_space_tag_t,
656 1.1 matt bus_space_handle_t, bus_size_t, u_int16_t, size_t));
657 1.1 matt static __inline void vax_mem_set_region_4 __P((bus_space_tag_t,
658 1.1 matt bus_space_handle_t, bus_size_t, u_int32_t, size_t));
659 1.1 matt
660 1.1 matt #define bus_space_set_region_1(t, h, o, v, c) \
661 1.1 matt vax_mem_set_region_1((t), (h), (o), (v), (c))
662 1.1 matt
663 1.1 matt #define bus_space_set_region_2(t, h, o, v, c) \
664 1.1 matt do { \
665 1.1 matt __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr"); \
666 1.1 matt vax_mem_set_region_2((t), (h), (o), (v), (c)); \
667 1.1 matt } while (0)
668 1.1 matt
669 1.1 matt #define bus_space_set_region_4(t, h, o, v, c) \
670 1.1 matt do { \
671 1.1 matt __BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr"); \
672 1.1 matt vax_mem_set_region_4((t), (h), (o), (v), (c)); \
673 1.1 matt } while (0)
674 1.1 matt
675 1.1 matt static __inline void
676 1.1 matt vax_mem_set_region_1(t, h, o, v, c)
677 1.1 matt bus_space_tag_t t;
678 1.1 matt bus_space_handle_t h;
679 1.1 matt bus_size_t o;
680 1.1 matt u_int8_t v;
681 1.1 matt size_t c;
682 1.1 matt {
683 1.1 matt bus_addr_t addr = h + o;
684 1.1 matt
685 1.1 matt for (; c != 0; c--, addr++)
686 1.1 matt *(volatile u_int8_t *)(addr) = v;
687 1.1 matt }
688 1.1 matt
689 1.1 matt static __inline void
690 1.1 matt vax_mem_set_region_2(t, h, o, v, c)
691 1.1 matt bus_space_tag_t t;
692 1.1 matt bus_space_handle_t h;
693 1.1 matt bus_size_t o;
694 1.1 matt u_int16_t v;
695 1.1 matt size_t c;
696 1.1 matt {
697 1.1 matt bus_addr_t addr = h + o;
698 1.1 matt
699 1.1 matt for (; c != 0; c--, addr += 2)
700 1.1 matt *(volatile u_int16_t *)(addr) = v;
701 1.1 matt }
702 1.1 matt
703 1.1 matt static __inline void
704 1.1 matt vax_mem_set_region_4(t, h, o, v, c)
705 1.1 matt bus_space_tag_t t;
706 1.1 matt bus_space_handle_t h;
707 1.1 matt bus_size_t o;
708 1.1 matt u_int32_t v;
709 1.1 matt size_t c;
710 1.1 matt {
711 1.1 matt bus_addr_t addr = h + o;
712 1.1 matt
713 1.1 matt for (; c != 0; c--, addr += 4)
714 1.1 matt *(volatile u_int32_t *)(addr) = v;
715 1.1 matt }
716 1.1 matt
717 1.1 matt #if 0 /* Cause a link error for bus_space_set_region_8 */
718 1.1 matt #define bus_space_set_region_8 !!! bus_space_set_region_8 unimplemented !!!
719 1.1 matt #endif
720 1.1 matt
721 1.1 matt /*
722 1.1 matt * void bus_space_copy_region_N __P((bus_space_tag_t tag,
723 1.1 matt * bus_space_handle_t bsh1, bus_size_t off1,
724 1.1 matt * bus_space_handle_t bsh2, bus_size_t off2,
725 1.1 matt * size_t count));
726 1.1 matt *
727 1.1 matt * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
728 1.1 matt * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
729 1.1 matt */
730 1.1 matt
731 1.1 matt static __inline void vax_mem_copy_region_1 __P((bus_space_tag_t,
732 1.1 matt bus_space_handle_t, bus_size_t, bus_space_handle_t,
733 1.1 matt bus_size_t, size_t));
734 1.1 matt static __inline void vax_mem_copy_region_2 __P((bus_space_tag_t,
735 1.1 matt bus_space_handle_t, bus_size_t, bus_space_handle_t,
736 1.1 matt bus_size_t, size_t));
737 1.1 matt static __inline void vax_mem_copy_region_4 __P((bus_space_tag_t,
738 1.1 matt bus_space_handle_t, bus_size_t, bus_space_handle_t,
739 1.1 matt bus_size_t, size_t));
740 1.1 matt
741 1.1 matt #define bus_space_copy_region_1(t, h1, o1, h2, o2, c) \
742 1.1 matt vax_mem_copy_region_1((t), (h1), (o1), (h2), (o2), (c))
743 1.1 matt
744 1.1 matt #define bus_space_copy_region_2(t, h1, o1, h2, o2, c) \
745 1.1 matt do { \
746 1.1 matt __BUS_SPACE_ADDRESS_SANITY((h1) + (o1), u_int16_t, "bus addr 1"); \
747 1.1 matt __BUS_SPACE_ADDRESS_SANITY((h2) + (o2), u_int16_t, "bus addr 2"); \
748 1.1 matt vax_mem_copy_region_2((t), (h1), (o1), (h2), (o2), (c)); \
749 1.1 matt } while (0)
750 1.1 matt
751 1.1 matt #define bus_space_copy_region_4(t, h1, o1, h2, o2, c) \
752 1.1 matt do { \
753 1.1 matt __BUS_SPACE_ADDRESS_SANITY((h1) + (o1), u_int32_t, "bus addr 1"); \
754 1.1 matt __BUS_SPACE_ADDRESS_SANITY((h2) + (o2), u_int32_t, "bus addr 2"); \
755 1.1 matt vax_mem_copy_region_4((t), (h1), (o1), (h2), (o2), (c)); \
756 1.1 matt } while (0)
757 1.1 matt
758 1.1 matt static __inline void
759 1.1 matt vax_mem_copy_region_1(t, h1, o1, h2, o2, c)
760 1.1 matt bus_space_tag_t t;
761 1.1 matt bus_space_handle_t h1;
762 1.1 matt bus_size_t o1;
763 1.1 matt bus_space_handle_t h2;
764 1.1 matt bus_size_t o2;
765 1.1 matt size_t c;
766 1.1 matt {
767 1.1 matt bus_addr_t addr1 = h1 + o1;
768 1.1 matt bus_addr_t addr2 = h2 + o2;
769 1.1 matt
770 1.1 matt if (addr1 >= addr2) {
771 1.1 matt /* src after dest: copy forward */
772 1.1 matt for (; c != 0; c--, addr1++, addr2++)
773 1.1 matt *(volatile u_int8_t *)(addr2) =
774 1.1 matt *(volatile u_int8_t *)(addr1);
775 1.1 matt } else {
776 1.1 matt /* dest after src: copy backwards */
777 1.1 matt for (addr1 += (c - 1), addr2 += (c - 1);
778 1.1 matt c != 0; c--, addr1--, addr2--)
779 1.1 matt *(volatile u_int8_t *)(addr2) =
780 1.1 matt *(volatile u_int8_t *)(addr1);
781 1.1 matt }
782 1.1 matt }
783 1.1 matt
784 1.1 matt static __inline void
785 1.1 matt vax_mem_copy_region_2(t, h1, o1, h2, o2, c)
786 1.1 matt bus_space_tag_t t;
787 1.1 matt bus_space_handle_t h1;
788 1.1 matt bus_size_t o1;
789 1.1 matt bus_space_handle_t h2;
790 1.1 matt bus_size_t o2;
791 1.1 matt size_t c;
792 1.1 matt {
793 1.1 matt bus_addr_t addr1 = h1 + o1;
794 1.1 matt bus_addr_t addr2 = h2 + o2;
795 1.1 matt
796 1.1 matt if (addr1 >= addr2) {
797 1.1 matt /* src after dest: copy forward */
798 1.1 matt for (; c != 0; c--, addr1 += 2, addr2 += 2)
799 1.1 matt *(volatile u_int16_t *)(addr2) =
800 1.1 matt *(volatile u_int16_t *)(addr1);
801 1.1 matt } else {
802 1.1 matt /* dest after src: copy backwards */
803 1.1 matt for (addr1 += 2 * (c - 1), addr2 += 2 * (c - 1);
804 1.1 matt c != 0; c--, addr1 -= 2, addr2 -= 2)
805 1.1 matt *(volatile u_int16_t *)(addr2) =
806 1.1 matt *(volatile u_int16_t *)(addr1);
807 1.1 matt }
808 1.1 matt }
809 1.1 matt
810 1.1 matt static __inline void
811 1.1 matt vax_mem_copy_region_4(t, h1, o1, h2, o2, c)
812 1.1 matt bus_space_tag_t t;
813 1.1 matt bus_space_handle_t h1;
814 1.1 matt bus_size_t o1;
815 1.1 matt bus_space_handle_t h2;
816 1.1 matt bus_size_t o2;
817 1.1 matt size_t c;
818 1.1 matt {
819 1.1 matt bus_addr_t addr1 = h1 + o1;
820 1.1 matt bus_addr_t addr2 = h2 + o2;
821 1.1 matt
822 1.1 matt if (addr1 >= addr2) {
823 1.1 matt /* src after dest: copy forward */
824 1.1 matt for (; c != 0; c--, addr1 += 4, addr2 += 4)
825 1.1 matt *(volatile u_int32_t *)(addr2) =
826 1.1 matt *(volatile u_int32_t *)(addr1);
827 1.1 matt } else {
828 1.1 matt /* dest after src: copy backwards */
829 1.1 matt for (addr1 += 4 * (c - 1), addr2 += 4 * (c - 1);
830 1.1 matt c != 0; c--, addr1 -= 4, addr2 -= 4)
831 1.1 matt *(volatile u_int32_t *)(addr2) =
832 1.1 matt *(volatile u_int32_t *)(addr1);
833 1.1 matt }
834 1.1 matt }
835 1.1 matt
836 1.1 matt #if 0 /* Cause a link error for bus_space_copy_8 */
837 1.1 matt #define bus_space_copy_region_8 !!! bus_space_copy_region_8 unimplemented !!!
838 1.1 matt #endif
839 1.1 matt
840 1.1 matt
841 1.1 matt /*
842 1.1 matt * Bus read/write barrier methods.
843 1.1 matt *
844 1.1 matt * void bus_space_barrier __P((bus_space_tag_t tag,
845 1.1 matt * bus_space_handle_t bsh, bus_size_t offset,
846 1.1 matt * bus_size_t len, int flags));
847 1.1 matt *
848 1.1 matt * Note: the vax does not currently require barriers, but we must
849 1.1 matt * provide the flags to MI code.
850 1.1 matt */
851 1.1 matt #define bus_space_barrier(t, h, o, l, f) \
852 1.1 matt ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
853 1.1 matt #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
854 1.1 matt #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
855 1.1 matt
856 1.1 matt
857 1.1 matt /*
858 1.1 matt * Flags used in various bus DMA methods.
859 1.1 matt */
860 1.1 matt #define BUS_DMA_WAITOK 0x00 /* safe to sleep (pseudo-flag) */
861 1.1 matt #define BUS_DMA_NOWAIT 0x01 /* not safe to sleep */
862 1.1 matt #define BUS_DMA_ALLOCNOW 0x02 /* perform resource allocation now */
863 1.1 matt #define BUS_DMA_COHERENT 0x04 /* hint: map memory DMA coherent */
864 1.1 matt #define BUS_DMA_BUS1 0x10 /* placeholders for bus functions... */
865 1.1 matt #define BUS_DMA_BUS2 0x20
866 1.1 matt #define BUS_DMA_BUS3 0x40
867 1.1 matt #define BUS_DMA_BUS4 0x80
868 1.7 ragge
869 1.7 ragge /*
870 1.7 ragge * Private flags stored in the DMA map.
871 1.7 ragge */
872 1.7 ragge #define DMAMAP_HAS_SGMAP 0x80000000 /* sgva/len are valid */
873 1.1 matt
874 1.1 matt /* Forwards needed by prototypes below. */
875 1.1 matt struct mbuf;
876 1.1 matt struct uio;
877 1.1 matt struct vax_sgmap;
878 1.1 matt
879 1.1 matt /*
880 1.1 matt * Operations performed by bus_dmamap_sync().
881 1.1 matt */
882 1.1 matt #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
883 1.1 matt #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
884 1.1 matt #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
885 1.1 matt #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
886 1.1 matt
887 1.1 matt /*
888 1.1 matt * vax_bus_t
889 1.1 matt *
890 1.1 matt * Busses supported by NetBSD/vax, used by internal
891 1.1 matt * utility functions. NOT TO BE USED BY MACHINE-INDEPENDENT
892 1.1 matt * CODE!
893 1.1 matt */
894 1.1 matt typedef enum {
895 1.1 matt VAX_BUS_MAINBUS,
896 1.1 matt VAX_BUS_SBI,
897 1.1 matt VAX_BUS_MASSBUS,
898 1.1 matt VAX_BUS_UNIBUS, /* Also handles QBUS */
899 1.1 matt VAX_BUS_BI,
900 1.1 matt VAX_BUS_XMI,
901 1.1 matt VAX_BUS_TURBOCHANNEL
902 1.1 matt } vax_bus_t;
903 1.1 matt
904 1.1 matt typedef struct vax_bus_dma_tag *bus_dma_tag_t;
905 1.1 matt typedef struct vax_bus_dmamap *bus_dmamap_t;
906 1.1 matt
907 1.1 matt /*
908 1.1 matt * bus_dma_segment_t
909 1.1 matt *
910 1.1 matt * Describes a single contiguous DMA transaction. Values
911 1.1 matt * are suitable for programming into DMA registers.
912 1.1 matt */
913 1.1 matt struct vax_bus_dma_segment {
914 1.1 matt bus_addr_t ds_addr; /* DMA address */
915 1.1 matt bus_size_t ds_len; /* length of transfer */
916 1.1 matt };
917 1.1 matt typedef struct vax_bus_dma_segment bus_dma_segment_t;
918 1.1 matt
919 1.1 matt /*
920 1.1 matt * bus_dma_tag_t
921 1.1 matt *
922 1.1 matt * A machine-dependent opaque type describing the implementation of
923 1.1 matt * DMA for a given bus.
924 1.1 matt */
925 1.1 matt struct vax_bus_dma_tag {
926 1.1 matt void *_cookie; /* cookie used in the guts */
927 1.1 matt bus_addr_t _wbase; /* DMA window base */
928 1.1 matt bus_size_t _wsize; /* DMA window size */
929 1.1 matt
930 1.1 matt /*
931 1.1 matt * Some chipsets have a built-in boundary constraint, independent
932 1.1 matt * of what the device requests. This allows that boundary to
933 1.1 matt * be specified. If the device has a more restrictive contraint,
934 1.1 matt * the map will use that, otherwise this boundary will be used.
935 1.1 matt * This value is ignored if 0.
936 1.1 matt */
937 1.1 matt bus_size_t _boundary;
938 1.1 matt
939 1.1 matt /*
940 1.1 matt * A bus may have more than one SGMAP window, so SGMAP
941 1.1 matt * windows also get a pointer to their SGMAP state.
942 1.1 matt */
943 1.1 matt struct vax_sgmap *_sgmap;
944 1.1 matt
945 1.1 matt /*
946 1.1 matt * Internal-use only utility methods. NOT TO BE USED BY
947 1.1 matt * MACHINE-INDEPENDENT CODE!
948 1.1 matt */
949 1.1 matt bus_dma_tag_t (*_get_tag) __P((bus_dma_tag_t, vax_bus_t));
950 1.1 matt
951 1.1 matt /*
952 1.1 matt * DMA mapping methods.
953 1.1 matt */
954 1.1 matt int (*_dmamap_create) __P((bus_dma_tag_t, bus_size_t, int,
955 1.1 matt bus_size_t, bus_size_t, int, bus_dmamap_t *));
956 1.1 matt void (*_dmamap_destroy) __P((bus_dma_tag_t, bus_dmamap_t));
957 1.1 matt int (*_dmamap_load) __P((bus_dma_tag_t, bus_dmamap_t, void *,
958 1.1 matt bus_size_t, struct proc *, int));
959 1.1 matt int (*_dmamap_load_mbuf) __P((bus_dma_tag_t, bus_dmamap_t,
960 1.1 matt struct mbuf *, int));
961 1.1 matt int (*_dmamap_load_uio) __P((bus_dma_tag_t, bus_dmamap_t,
962 1.1 matt struct uio *, int));
963 1.1 matt int (*_dmamap_load_raw) __P((bus_dma_tag_t, bus_dmamap_t,
964 1.1 matt bus_dma_segment_t *, int, bus_size_t, int));
965 1.1 matt void (*_dmamap_unload) __P((bus_dma_tag_t, bus_dmamap_t));
966 1.1 matt void (*_dmamap_sync) __P((bus_dma_tag_t, bus_dmamap_t,
967 1.1 matt bus_addr_t, bus_size_t, int));
968 1.1 matt
969 1.1 matt /*
970 1.1 matt * DMA memory utility functions.
971 1.1 matt */
972 1.1 matt int (*_dmamem_alloc) __P((bus_dma_tag_t, bus_size_t, bus_size_t,
973 1.1 matt bus_size_t, bus_dma_segment_t *, int, int *, int));
974 1.1 matt void (*_dmamem_free) __P((bus_dma_tag_t,
975 1.1 matt bus_dma_segment_t *, int));
976 1.1 matt int (*_dmamem_map) __P((bus_dma_tag_t, bus_dma_segment_t *,
977 1.1 matt int, size_t, caddr_t *, int));
978 1.1 matt void (*_dmamem_unmap) __P((bus_dma_tag_t, caddr_t, size_t));
979 1.1 matt int (*_dmamem_mmap) __P((bus_dma_tag_t, bus_dma_segment_t *,
980 1.1 matt int, int, int, int));
981 1.1 matt };
982 1.1 matt
983 1.1 matt #define vaxbus_dma_get_tag(t, b) \
984 1.1 matt (*(t)->_get_tag)(t, b)
985 1.1 matt
986 1.1 matt #define bus_dmamap_create(t, s, n, m, b, f, p) \
987 1.1 matt (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
988 1.1 matt #define bus_dmamap_destroy(t, p) \
989 1.1 matt (*(t)->_dmamap_destroy)((t), (p))
990 1.1 matt #define bus_dmamap_load(t, m, b, s, p, f) \
991 1.1 matt (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
992 1.1 matt #define bus_dmamap_load_mbuf(t, m, b, f) \
993 1.1 matt (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
994 1.1 matt #define bus_dmamap_load_uio(t, m, u, f) \
995 1.1 matt (*(t)->_dmamap_load_uio)((t), (m), (u), (f))
996 1.1 matt #define bus_dmamap_load_raw(t, m, sg, n, s, f) \
997 1.1 matt (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
998 1.1 matt #define bus_dmamap_unload(t, p) \
999 1.1 matt (*(t)->_dmamap_unload)((t), (p))
1000 1.1 matt #define bus_dmamap_sync(t, p, o, l, ops) \
1001 1.1 matt (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
1002 1.1 matt #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
1003 1.1 matt (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
1004 1.1 matt #define bus_dmamem_free(t, sg, n) \
1005 1.1 matt (*(t)->_dmamem_free)((t), (sg), (n))
1006 1.1 matt #define bus_dmamem_map(t, sg, n, s, k, f) \
1007 1.1 matt (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
1008 1.1 matt #define bus_dmamem_unmap(t, k, s) \
1009 1.1 matt (*(t)->_dmamem_unmap)((t), (k), (s))
1010 1.1 matt #define bus_dmamem_mmap(t, sg, n, o, p, f) \
1011 1.1 matt (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
1012 1.1 matt
1013 1.1 matt /*
1014 1.1 matt * bus_dmamap_t
1015 1.1 matt *
1016 1.1 matt * Describes a DMA mapping.
1017 1.1 matt */
1018 1.1 matt struct vax_bus_dmamap {
1019 1.1 matt /*
1020 1.1 matt * PRIVATE MEMBERS: not for use my machine-independent code.
1021 1.1 matt */
1022 1.1 matt bus_size_t _dm_size; /* largest DMA transfer mappable */
1023 1.1 matt int _dm_segcnt; /* number of segs this map can map */
1024 1.1 matt bus_size_t _dm_maxsegsz; /* largest possible segment */
1025 1.1 matt bus_size_t _dm_boundary; /* don't cross this */
1026 1.1 matt int _dm_flags; /* misc. flags */
1027 1.1 matt
1028 1.1 matt /*
1029 1.1 matt * This is used only for SGMAP-mapped DMA, but we keep it
1030 1.1 matt * here to avoid pointless indirection.
1031 1.1 matt */
1032 1.1 matt int _dm_pteidx; /* PTE index */
1033 1.1 matt int _dm_ptecnt; /* PTE count */
1034 1.1 matt u_long _dm_sgva; /* allocated sgva */
1035 1.1 matt bus_size_t _dm_sgvalen; /* svga length */
1036 1.1 matt
1037 1.1 matt /*
1038 1.1 matt * PUBLIC MEMBERS: these are used by machine-independent code.
1039 1.1 matt */
1040 1.1 matt bus_size_t dm_mapsize; /* size of the mapping */
1041 1.1 matt int dm_nsegs; /* # valid segments in mapping */
1042 1.1 matt bus_dma_segment_t dm_segs[1]; /* segments; variable length */
1043 1.1 matt };
1044 1.1 matt
1045 1.1 matt #ifdef _VAX_BUS_DMA_PRIVATE
1046 1.1 matt int _bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int, bus_size_t,
1047 1.1 matt bus_size_t, int, bus_dmamap_t *));
1048 1.1 matt void _bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t));
1049 1.1 matt
1050 1.5 ragge int _bus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t,
1051 1.1 matt void *, bus_size_t, struct proc *, int));
1052 1.5 ragge int _bus_dmamap_load_mbuf __P((bus_dma_tag_t,
1053 1.1 matt bus_dmamap_t, struct mbuf *, int));
1054 1.5 ragge int _bus_dmamap_load_uio __P((bus_dma_tag_t,
1055 1.1 matt bus_dmamap_t, struct uio *, int));
1056 1.5 ragge int _bus_dmamap_load_raw __P((bus_dma_tag_t,
1057 1.1 matt bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int));
1058 1.1 matt
1059 1.1 matt void _bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
1060 1.1 matt void _bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
1061 1.1 matt bus_size_t, int));
1062 1.1 matt
1063 1.1 matt int _bus_dmamem_alloc __P((bus_dma_tag_t tag, bus_size_t size,
1064 1.1 matt bus_size_t alignment, bus_size_t boundary,
1065 1.1 matt bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags));
1066 1.1 matt void _bus_dmamem_free __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
1067 1.1 matt int nsegs));
1068 1.1 matt int _bus_dmamem_map __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
1069 1.1 matt int nsegs, size_t size, caddr_t *kvap, int flags));
1070 1.1 matt void _bus_dmamem_unmap __P((bus_dma_tag_t tag, caddr_t kva,
1071 1.1 matt size_t size));
1072 1.1 matt int _bus_dmamem_mmap __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
1073 1.1 matt int nsegs, int off, int prot, int flags));
1074 1.1 matt #endif /* _VAX_BUS_DMA_PRIVATE */
1075 1.1 matt
1076 1.1 matt #endif /* _VAX_BUS_H_ */
1077