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bus.h revision 1.1
      1 /*	$NetBSD: bus.h,v 1.1 1998/08/18 23:55:00 matt Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *	This product includes software developed by the NetBSD
     22  *	Foundation, Inc. and its contributors.
     23  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  *    contributors may be used to endorse or promote products derived
     25  *    from this software without specific prior written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  * POSSIBILITY OF SUCH DAMAGE.
     38  */
     39 
     40 /*
     41  * Copyright (c) 1996 Charles M. Hannum.  All rights reserved.
     42  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
     43  *
     44  * Redistribution and use in source and binary forms, with or without
     45  * modification, are permitted provided that the following conditions
     46  * are met:
     47  * 1. Redistributions of source code must retain the above copyright
     48  *    notice, this list of conditions and the following disclaimer.
     49  * 2. Redistributions in binary form must reproduce the above copyright
     50  *    notice, this list of conditions and the following disclaimer in the
     51  *    documentation and/or other materials provided with the distribution.
     52  * 3. All advertising materials mentioning features or use of this software
     53  *    must display the following acknowledgement:
     54  *      This product includes software developed by Christopher G. Demetriou
     55  *	for the NetBSD Project.
     56  * 4. The name of the author may not be used to endorse or promote products
     57  *    derived from this software without specific prior written permission
     58  *
     59  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     60  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     61  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     62  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     63  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     64  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     65  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     66  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     67  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     68  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     69  */
     70 
     71 #ifndef _VAX_BUS_H_
     72 #define _VAX_BUS_H_
     73 
     74 #ifndef __BUS_SPACE_COMPAT_OLDDEFS
     75 #define	__BUS_SPACE_COMPAT_OLDDEFS
     76 #endif
     77 
     78 #ifdef BUS_SPACE_DEBUG
     79 /*
     80  * Macros for sanity-checking the aligned-ness of pointers passed to
     81  * bus space ops.  These are not strictly necessary on the VAX, but
     82  * could lead to performance improvements, and help catch problems
     83  * with drivers that would creep up on other architectures.
     84  */
     85 #define	__BUS_SPACE_ALIGNED_ADDRESS(p, t)				\
     86 	((((u_long)(p)) & (sizeof(t)-1)) == 0)
     87 
     88 #define	__BUS_SPACE_ADDRESS_SANITY(p, t, d)				\
     89 ({									\
     90 	if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) {			\
     91 		printf("%s 0x%lx not aligned to %d bytes %s:%d\n",	\
     92 		    d, (u_long)(p), sizeof(t), __FILE__, __LINE__);	\
     93 	}								\
     94 	(void) 0;							\
     95 })
     96 #else
     97 #define	__BUS_SPACE_ADDRESS_SANITY(p,t,d)	(void) 0
     98 #endif /* BUS_SPACE_DEBUG */
     99 
    100 /*
    101  * Bus address and size types
    102  */
    103 typedef u_long bus_addr_t;
    104 typedef u_long bus_size_t;
    105 
    106 /*
    107  * Access methods for bus resources and address space.
    108  */
    109 typedef	struct vax_bus_space bus_space_tag_t;
    110 typedef	u_long bus_space_handle_t;
    111 
    112 struct vax_bus_space {
    113 	/* cookie */
    114 	void		*vbs_cookie;
    115 
    116 	/* mapping/unmapping */
    117 	int		(*vbs_map) __P((void *, bus_addr_t, bus_size_t,
    118 			    int, bus_space_handle_t *, int));
    119 	void		(*vbs_unmap) __P((void *, bus_space_handle_t,
    120 			    bus_size_t, int));
    121 	int		(*vbs_subregion) __P((void *, bus_space_handle_t,
    122 			    bus_size_t, bus_size_t, bus_space_handle_t *));
    123 
    124 	/* allocation/deallocation */
    125 	int		(*vbs_alloc) __P((void *, bus_addr_t, bus_addr_t,
    126 			    bus_size_t, bus_size_t, bus_size_t, int,
    127 			    bus_addr_t *, bus_space_handle_t *));
    128 	void		(*vbs_free) __P((void *, bus_space_handle_t,
    129 			    bus_size_t));
    130 };
    131 
    132 /*
    133  *	int bus_space_map  __P((bus_space_tag_t t, bus_addr_t addr,
    134  *	    bus_size_t size, int flags, bus_space_handle_t *bshp));
    135  *
    136  * Map a region of bus space.
    137  */
    138 
    139 #define	BUS_SPACE_MAP_CACHEABLE		0x01
    140 #define	BUS_SPACE_MAP_LINEAR		0x02
    141 
    142 #define	bus_space_map(t, a, s, f, hp)					\
    143 	(*(t)->vbs_map)((t)->vbs_cookie, (a), (s), (f), (hp), 1)
    144 #define	vax_bus_space_map_noacct(t, a, s, f, hp)			\
    145 	(*(t)->vbs_map)((t)->vbs_cookie, (a), (s), (f), (hp), 0)
    146 
    147 /*
    148  *	int bus_space_unmap __P((bus_space_tag_t t,
    149  *	    bus_space_handle_t bsh, bus_size_t size));
    150  *
    151  * Unmap a region of bus space.
    152  */
    153 
    154 #define bus_space_unmap(t, h, s)					\
    155 	(*(t)->vbs_unmap)((t)->vbs_cookie, (h), (s), 1)
    156 #define vax_bus_space_unmap_noacct(t, h, s)				\
    157 	(*(t)->vbs_unmap)((t)->vbs_cookie, (h), (s), 0)
    158 
    159 /*
    160  *	int bus_space_subregion __P((bus_space_tag_t t,
    161  *	    bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
    162  *	    bus_space_handle_t *nbshp));
    163  *
    164  * Get a new handle for a subregion of an already-mapped area of bus space.
    165  */
    166 
    167 #define bus_space_subregion(t, h, o, s, nhp)				\
    168 	(*(t)->vbs_subregion)((t)->vbs_cookie, (h), (o), (s), (hp))
    169 
    170 /*
    171  *	int bus_space_alloc __P((bus_space_tag_t t, bus_addr_t rstart,
    172  *	    bus_addr_t rend, bus_size_t size, bus_size_t align,
    173  *	    bus_size_t boundary, int flags, bus_addr_t *addrp,
    174  *	    bus_space_handle_t *bshp));
    175  *
    176  * Allocate a region of bus space.
    177  */
    178 
    179 #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp)			\
    180 	(*(t)->vbs_alloc)((t)->vbs_cookie, (rs), (re), (s), (a), (b),   \
    181 	    (f), (ap), (hp))
    182 
    183 /*
    184  *	int bus_space_free __P((bus_space_tag_t t,
    185  *	    bus_space_handle_t bsh, bus_size_t size));
    186  *
    187  * Free a region of bus space.
    188  */
    189 
    190 #define bus_space_free(t, h, s)						\
    191 	(*(t)->vbs_free)((t)->vbs_cookie, (h), (s))
    192 
    193 /*
    194  *	u_intN_t bus_space_read_N __P((bus_space_tag_t tag,
    195  *	    bus_space_handle_t bsh, bus_size_t offset));
    196  *
    197  * Read a 1, 2, 4, or 8 byte quantity from bus space
    198  * described by tag/handle/offset.
    199  */
    200 
    201 #define	bus_space_read_1(t, h, o)					\
    202 	    (*(volatile u_int8_t *)((h) + (o)))
    203 
    204 #define	bus_space_read_2(t, h, o)					\
    205 	 (__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr"),	\
    206 	    (*(volatile u_int16_t *)((h) + (o))))
    207 
    208 #define	bus_space_read_4(t, h, o)					\
    209 	 (__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr"),	\
    210 	    (*(volatile u_int32_t *)((h) + (o))))
    211 
    212 #if 0	/* Cause a link error for bus_space_read_8 */
    213 #define	bus_space_read_8(t, h, o)	!!! bus_space_read_8 unimplemented !!!
    214 #endif
    215 
    216 /*
    217  *	void bus_space_read_multi_N __P((bus_space_tag_t tag,
    218  *	    bus_space_handle_t bsh, bus_size_t offset,
    219  *	    u_intN_t *addr, size_t count));
    220  *
    221  * Read `count' 1, 2, 4, or 8 byte quantities from bus space
    222  * described by tag/handle/offset and copy into buffer provided.
    223  */
    224 static __inline void vax_mem_read_multi_1 __P((bus_space_tag_t,
    225 	bus_space_handle_t, bus_size_t, u_int8_t *, size_t));
    226 static __inline void vax_mem_read_multi_2 __P((bus_space_tag_t,
    227 	bus_space_handle_t, bus_size_t, u_int16_t *, size_t));
    228 static __inline void vax_mem_read_multi_4 __P((bus_space_tag_t,
    229 	bus_space_handle_t, bus_size_t, u_int32_t *, size_t));
    230 
    231 #define	bus_space_read_multi_1(t, h, o, a, c)				\
    232 	vax_mem_read_multi_1((t), (h), (o), (a), (c))
    233 
    234 #define bus_space_read_multi_2(t, h, o, a, c)				\
    235 do {									\
    236 	__BUS_SPACE_ADDRESS_SANITY((a), u_int16_t, "buffer");		\
    237 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr");	\
    238 	vax_mem_read_multi_2((t), (h), (o), (a), (c));		\
    239 } while (0)
    240 
    241 #define bus_space_read_multi_4(t, h, o, a, c)				\
    242 do {									\
    243 	__BUS_SPACE_ADDRESS_SANITY((a), u_int32_t, "buffer");		\
    244 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr");	\
    245 	vax_mem_read_multi_4((t), (h), (o), (a), (c));		\
    246 } while (0)
    247 
    248 #if 0	/* Cause a link error for bus_space_read_multi_8 */
    249 #define	bus_space_read_multi_8	!!! bus_space_read_multi_8 unimplemented !!!
    250 #endif
    251 
    252 static __inline void
    253 vax_mem_read_region_1(t, h, o, a, c)
    254 	bus_space_tag_t t;
    255 	bus_space_handle_t h;
    256 	bus_size_t o;
    257 	const u_int8_t *a;
    258 	size_t c;
    259 {
    260 	const bus_addr_t addr = h + o;
    261 
    262 	for (; c != 0; c--, a++)
    263 		*a = *(volatile u_int8_t *)(addr);
    264 }
    265 
    266 static __inline void
    267 vax_mem_read_region_2(t, h, o, a, c)
    268 	bus_space_tag_t t;
    269 	bus_space_handle_t h;
    270 	bus_size_t o;
    271 	const u_int8_t *a;
    272 	size_t c;
    273 {
    274 	const bus_addr_t addr = h + o;
    275 
    276 	for (; c != 0; c--, a++)
    277 		*a = *(volatile u_int16_t *)(addr);
    278 }
    279 
    280 static __inline void
    281 vax_mem_read_region_4(t, h, o, a, c)
    282 	bus_space_tag_t t;
    283 	bus_space_handle_t h;
    284 	bus_size_t o;
    285 	const u_int32_t *a;
    286 	size_t c;
    287 {
    288 	const bus_addr_t addr = h + o;
    289 
    290 	for (; c != 0; c--, a++)
    291 		*a = *(volatile u_int32_t *)(addr);
    292 }
    293 
    294 /*
    295  *	void bus_space_read_region_N __P((bus_space_tag_t tag,
    296  *	    bus_space_handle_t bsh, bus_size_t offset,
    297  *	    u_intN_t *addr, size_t count));
    298  *
    299  * Read `count' 1, 2, 4, or 8 byte quantities from bus space
    300  * described by tag/handle and starting at `offset' and copy into
    301  * buffer provided.
    302  */
    303 
    304 static __inline void vax_mem_read_region_1 __P((bus_space_tag_t,
    305 	bus_space_handle_t, bus_size_t, u_int8_t *, size_t));
    306 static __inline void vax_mem_read_region_2 __P((bus_space_tag_t,
    307 	bus_space_handle_t, bus_size_t, u_int16_t *, size_t));
    308 static __inline void vax_mem_read_region_4 __P((bus_space_tag_t,
    309 	bus_space_handle_t, bus_size_t, u_int32_t *, size_t));
    310 
    311 #define	bus_space_read_region_1(t, h, o, a, c)				\
    312 do {									\
    313 	vax_mem_read_region_1((t), (h), (o), (a), (c));		\
    314 } while (0)
    315 
    316 #define bus_space_read_region_2(t, h, o, a, c)				\
    317 do {									\
    318 	__BUS_SPACE_ADDRESS_SANITY((a), u_int16_t, "buffer");		\
    319 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr");	\
    320 	vax_mem_read_region_2((t), (h), (o), (a), (c));		\
    321 } while (0)
    322 
    323 #define bus_space_read_region_4(t, h, o, a, c)				\
    324 do {									\
    325 	__BUS_SPACE_ADDRESS_SANITY((a), u_int32_t, "buffer");		\
    326 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr");	\
    327 	vax_mem_read_region_4((t), (h), (o), (a), (c));		\
    328 } while (0)
    329 
    330 #if 0	/* Cause a link error for bus_space_read_region_8 */
    331 #define	bus_space_read_region_8					\
    332 			!!! bus_space_read_region_8 unimplemented !!!
    333 #endif
    334 
    335 static __inline void
    336 vax_mem_read_region_1(t, h, o, a, c)
    337 	bus_space_tag_t t;
    338 	bus_space_handle_t h;
    339 	bus_size_t o;
    340 	const u_int8_t *a;
    341 	size_t c;
    342 {
    343 	bus_addr_t addr = h + o;
    344 
    345 	for (; c != 0; c--, addr++, a++)
    346 		*a = *(volatile u_int8_t *)(addr);
    347 }
    348 
    349 static __inline void
    350 vax_mem_read_region_2(t, h, o, a, c)
    351 	bus_space_tag_t t;
    352 	bus_space_handle_t h;
    353 	bus_size_t o;
    354 	const u_int8_t *a;
    355 	size_t c;
    356 {
    357 	bus_addr_t addr = h + o;
    358 
    359 	for (; c != 0; c--, addr++, a++)
    360 		*a = *(volatile u_int16_t *)(addr);
    361 }
    362 
    363 static __inline void
    364 vax_mem_read_region_4(t, h, o, a, c)
    365 	bus_space_tag_t t;
    366 	bus_space_handle_t h;
    367 	bus_size_t o;
    368 	const u_int32_t *a;
    369 	size_t c;
    370 {
    371 	bus_addr_t addr = h + o;
    372 
    373 	for (; c != 0; c--, addr++, a++)
    374 		*a = *(volatile u_int32_t *)(addr);
    375 }
    376 
    377 /*
    378  *	void bus_space_write_N __P((bus_space_tag_t tag,
    379  *	    bus_space_handle_t bsh, bus_size_t offset,
    380  *	    u_intN_t value));
    381  *
    382  * Write the 1, 2, 4, or 8 byte value `value' to bus space
    383  * described by tag/handle/offset.
    384  */
    385 
    386 #define	bus_space_write_1(t, h, o, v)					\
    387 do {									\
    388 	((void)(*(volatile u_int8_t *)((h) + (o)) = (v)));		\
    389 } while (0)
    390 
    391 #define	bus_space_write_2(t, h, o, v)					\
    392 do {									\
    393 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr");	\
    394 	((void)(*(volatile u_int16_t *)((h) + (o)) = (v)));		\
    395 } while (0)
    396 
    397 #define	bus_space_write_4(t, h, o, v)					\
    398 do {									\
    399 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr");	\
    400 	((void)(*(volatile u_int32_t *)((h) + (o)) = (v)));		\
    401 } while (0)
    402 
    403 #if 0	/* Cause a link error for bus_space_write_8 */
    404 #define	bus_space_write_8	!!! bus_space_write_8 not implemented !!!
    405 #endif
    406 
    407 /*
    408  *	void bus_space_write_multi_N __P((bus_space_tag_t tag,
    409  *	    bus_space_handle_t bsh, bus_size_t offset,
    410  *	    const u_intN_t *addr, size_t count));
    411  *
    412  * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
    413  * provided to bus space described by tag/handle/offset.
    414  */
    415 static __inline void vax_mem_write_multi_1 __P((bus_space_tag_t,
    416 	bus_space_handle_t, bus_size_t, const u_int8_t *, size_t));
    417 static __inline void vax_mem_write_multi_2 __P((bus_space_tag_t,
    418 	bus_space_handle_t, bus_size_t, const u_int16_t *, size_t));
    419 static __inline void vax_mem_write_multi_4 __P((bus_space_tag_t,
    420 	bus_space_handle_t, bus_size_t, const u_int32_t *, size_t));
    421 
    422 #define	bus_space_write_multi_1(t, h, o, a, c)				\
    423 do {									\
    424 	vax_mem_write_multi_1((t), (h), (o), (a), (c));		\
    425 } while (0)
    426 
    427 #define bus_space_write_multi_2(t, h, o, a, c)				\
    428 do {									\
    429 	__BUS_SPACE_ADDRESS_SANITY((a), u_int16_t, "buffer");		\
    430 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr");	\
    431 	vax_mem_write_multi_2((t), (h), (o), (a), (c));		\
    432 } while (0)
    433 
    434 #define bus_space_write_multi_4(t, h, o, a, c)				\
    435 do {									\
    436 	__BUS_SPACE_ADDRESS_SANITY((a), u_int32_t, "buffer");		\
    437 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr");	\
    438 	vax_mem_write_multi_4((t), (h), (o), (a), (c));		\
    439 } while (0)
    440 
    441 #if 0	/* Cause a link error for bus_space_write_multi_8 */
    442 #define	bus_space_write_multi_8(t, h, o, a, c)				\
    443 			!!! bus_space_write_multi_8 unimplemented !!!
    444 #endif
    445 
    446 static __inline void
    447 vax_mem_write_multi_1(t, h, o, a, c)
    448 	bus_space_tag_t t;
    449 	bus_space_handle_t h;
    450 	bus_size_t o;
    451 	const u_int8_t *a;
    452 	size_t c;
    453 {
    454 	const bus_addr_t addr = h + o;
    455 
    456 	for (; c != 0; c--, a++)
    457 		*(volatile u_int8_t *)(addr) = *a;
    458 }
    459 
    460 static __inline void
    461 vax_mem_write_multi_2(t, h, o, a, c)
    462 	bus_space_tag_t t;
    463 	bus_space_handle_t h;
    464 	bus_size_t o;
    465 	const u_int8_t *a;
    466 	size_t c;
    467 {
    468 	const bus_addr_t addr = h + o;
    469 
    470 	for (; c != 0; c--, addr++, a++)
    471 		*(volatile u_int16_t *)(addr) = *a;
    472 }
    473 
    474 static __inline void
    475 vax_mem_write_multi_4(t, h, o, a, c)
    476 	bus_space_tag_t t;
    477 	bus_space_handle_t h;
    478 	bus_size_t o;
    479 	const u_int32_t *a;
    480 	size_t c;
    481 {
    482 	const bus_addr_t addr = h + o;
    483 
    484 	for (; c != 0; c--, a++)
    485 		*(volatile u_int32_t *)(addr) = *a;
    486 }
    487 
    488 /*
    489  *	void bus_space_write_region_N __P((bus_space_tag_t tag,
    490  *	    bus_space_handle_t bsh, bus_size_t offset,
    491  *	    const u_intN_t *addr, size_t count));
    492  *
    493  * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
    494  * to bus space described by tag/handle starting at `offset'.
    495  */
    496 static __inline void vax_mem_write_region_1 __P((bus_space_tag_t,
    497 	bus_space_handle_t, bus_size_t, const u_int8_t *, size_t));
    498 static __inline void vax_mem_write_region_2 __P((bus_space_tag_t,
    499 	bus_space_handle_t, bus_size_t, const u_int16_t *, size_t));
    500 static __inline void vax_mem_write_region_4 __P((bus_space_tag_t,
    501 	bus_space_handle_t, bus_size_t, const u_int32_t *, size_t));
    502 
    503 #define	bus_space_write_region_1(t, h, o, a, c)				\
    504 	vax_mem_write_region_1((t), (h), (o), (a), (c))
    505 
    506 #define bus_space_write_region_2(t, h, o, a, c)				\
    507 do {									\
    508 	__BUS_SPACE_ADDRESS_SANITY((a), u_int16_t, "buffer");		\
    509 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr");	\
    510 	vax_mem_write_region_2((t), (h), (o), (a), (c));		\
    511 } while (0)
    512 
    513 #define bus_space_write_region_4(t, h, o, a, c)				\
    514 do {									\
    515 	__BUS_SPACE_ADDRESS_SANITY((a), u_int32_t, "buffer");		\
    516 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr");	\
    517 	vax_mem_write_region_4((t), (h), (o), (a), (c));		\
    518 } while (0)
    519 
    520 #if 0	/* Cause a link error for bus_space_write_region_8 */
    521 #define	bus_space_write_region_8					\
    522 			!!! bus_space_write_region_8 unimplemented !!!
    523 #endif
    524 
    525 static __inline void
    526 vax_mem_write_region_1(t, h, o, a, c)
    527 	bus_space_tag_t t;
    528 	bus_space_handle_t h;
    529 	bus_size_t o;
    530 	const u_int8_t *a;
    531 	size_t c;
    532 {
    533 	bus_addr_t addr = h + o;
    534 
    535 	for (; c != 0; c--, addr++, a++)
    536 		*(volatile u_int8_t *)(addr) = *a;
    537 }
    538 
    539 static __inline void
    540 vax_mem_write_region_2(t, h, o, a, c)
    541 	bus_space_tag_t t;
    542 	bus_space_handle_t h;
    543 	bus_size_t o;
    544 	const u_int8_t *a;
    545 	size_t c;
    546 {
    547 	bus_addr_t addr = h + o;
    548 
    549 	for (; c != 0; c--, addr++, a++)
    550 		*(volatile u_int16_t *)(addr) = *a;
    551 }
    552 
    553 static __inline void
    554 vax_mem_write_region_4(t, h, o, a, c)
    555 	bus_space_tag_t t;
    556 	bus_space_handle_t h;
    557 	bus_size_t o;
    558 	const u_int32_t *a;
    559 	size_t c;
    560 {
    561 	bus_addr_t addr = h + o;
    562 
    563 	for (; c != 0; c--, addr++, a++)
    564 		*(volatile u_int32_t *)(addr) = *a;
    565 }
    566 
    567 /*
    568  *	void bus_space_set_multi_N __P((bus_space_tag_t tag,
    569  *	    bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
    570  *	    size_t count));
    571  *
    572  * Write the 1, 2, 4, or 8 byte value `val' to bus space described
    573  * by tag/handle/offset `count' times.
    574  */
    575 
    576 static __inline void vax_mem_set_multi_1 __P((bus_space_tag_t,
    577 	bus_space_handle_t, bus_size_t, u_int8_t, size_t));
    578 static __inline void vax_mem_set_multi_2 __P((bus_space_tag_t,
    579 	bus_space_handle_t, bus_size_t, u_int16_t, size_t));
    580 static __inline void vax_mem_set_multi_4 __P((bus_space_tag_t,
    581 	bus_space_handle_t, bus_size_t, u_int32_t, size_t));
    582 
    583 #define	bus_space_set_multi_1(t, h, o, v, c)				\
    584 	vax_mem_set_multi_1((t), (h), (o), (v), (c))
    585 
    586 #define	bus_space_set_multi_2(t, h, o, v, c)				\
    587 do {									\
    588 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr");	\
    589 	vax_mem_set_multi_2((t), (h), (o), (v), (c));		\
    590 } while (0)
    591 
    592 #define	bus_space_set_multi_4(t, h, o, v, c)				\
    593 do {									\
    594 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr");	\
    595 	vax_mem_set_multi_4((t), (h), (o), (v), (c));		\
    596 } while (0)
    597 
    598 static __inline void
    599 vax_mem_set_multi_1(t, h, o, v, c)
    600 	bus_space_tag_t t;
    601 	bus_space_handle_t h;
    602 	bus_size_t o;
    603 	u_int8_t v;
    604 	size_t c;
    605 {
    606 	bus_addr_t addr = h + o;
    607 
    608 	while (c--)
    609 		*(volatile u_int8_t *)(addr) = v;
    610 }
    611 
    612 static __inline void
    613 vax_mem_set_multi_2(t, h, o, v, c)
    614 	bus_space_tag_t t;
    615 	bus_space_handle_t h;
    616 	bus_size_t o;
    617 	u_int16_t v;
    618 	size_t c;
    619 {
    620 	bus_addr_t addr = h + o;
    621 
    622 	while (c--)
    623 		*(volatile u_int16_t *)(addr) = v;
    624 }
    625 
    626 static __inline void
    627 vax_mem_set_multi_4(t, h, o, v, c)
    628 	bus_space_tag_t t;
    629 	bus_space_handle_t h;
    630 	bus_size_t o;
    631 	u_int32_t v;
    632 	size_t c;
    633 {
    634 	bus_addr_t addr = h + o;
    635 
    636 	while (c--)
    637 		*(volatile u_int32_t *)(addr) = v;
    638 }
    639 
    640 #if 0	/* Cause a link error for bus_space_set_multi_8 */
    641 #define	bus_space_set_multi_8 !!! bus_space_set_multi_8 unimplemented !!!
    642 #endif
    643 
    644 /*
    645  *	void bus_space_set_region_N __P((bus_space_tag_t tag,
    646  *	    bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
    647  *	    size_t count));
    648  *
    649  * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
    650  * by tag/handle starting at `offset'.
    651  */
    652 
    653 static __inline void vax_mem_set_region_1 __P((bus_space_tag_t,
    654 	bus_space_handle_t, bus_size_t, u_int8_t, size_t));
    655 static __inline void vax_mem_set_region_2 __P((bus_space_tag_t,
    656 	bus_space_handle_t, bus_size_t, u_int16_t, size_t));
    657 static __inline void vax_mem_set_region_4 __P((bus_space_tag_t,
    658 	bus_space_handle_t, bus_size_t, u_int32_t, size_t));
    659 
    660 #define	bus_space_set_region_1(t, h, o, v, c)				\
    661 	vax_mem_set_region_1((t), (h), (o), (v), (c))
    662 
    663 #define	bus_space_set_region_2(t, h, o, v, c)				\
    664 do {									\
    665 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr");	\
    666 	vax_mem_set_region_2((t), (h), (o), (v), (c));		\
    667 } while (0)
    668 
    669 #define	bus_space_set_region_4(t, h, o, v, c)				\
    670 do {									\
    671 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr");	\
    672 	vax_mem_set_region_4((t), (h), (o), (v), (c));		\
    673 } while (0)
    674 
    675 static __inline void
    676 vax_mem_set_region_1(t, h, o, v, c)
    677 	bus_space_tag_t t;
    678 	bus_space_handle_t h;
    679 	bus_size_t o;
    680 	u_int8_t v;
    681 	size_t c;
    682 {
    683 	bus_addr_t addr = h + o;
    684 
    685 	for (; c != 0; c--, addr++)
    686 		*(volatile u_int8_t *)(addr) = v;
    687 }
    688 
    689 static __inline void
    690 vax_mem_set_region_2(t, h, o, v, c)
    691 	bus_space_tag_t t;
    692 	bus_space_handle_t h;
    693 	bus_size_t o;
    694 	u_int16_t v;
    695 	size_t c;
    696 {
    697 	bus_addr_t addr = h + o;
    698 
    699 	for (; c != 0; c--, addr += 2)
    700 		*(volatile u_int16_t *)(addr) = v;
    701 }
    702 
    703 static __inline void
    704 vax_mem_set_region_4(t, h, o, v, c)
    705 	bus_space_tag_t t;
    706 	bus_space_handle_t h;
    707 	bus_size_t o;
    708 	u_int32_t v;
    709 	size_t c;
    710 {
    711 	bus_addr_t addr = h + o;
    712 
    713 	for (; c != 0; c--, addr += 4)
    714 		*(volatile u_int32_t *)(addr) = v;
    715 }
    716 
    717 #if 0	/* Cause a link error for bus_space_set_region_8 */
    718 #define	bus_space_set_region_8	!!! bus_space_set_region_8 unimplemented !!!
    719 #endif
    720 
    721 /*
    722  *	void bus_space_copy_region_N __P((bus_space_tag_t tag,
    723  *	    bus_space_handle_t bsh1, bus_size_t off1,
    724  *	    bus_space_handle_t bsh2, bus_size_t off2,
    725  *	    size_t count));
    726  *
    727  * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
    728  * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
    729  */
    730 
    731 static __inline void vax_mem_copy_region_1 __P((bus_space_tag_t,
    732 	bus_space_handle_t, bus_size_t, bus_space_handle_t,
    733 	bus_size_t, size_t));
    734 static __inline void vax_mem_copy_region_2 __P((bus_space_tag_t,
    735 	bus_space_handle_t, bus_size_t, bus_space_handle_t,
    736 	bus_size_t, size_t));
    737 static __inline void vax_mem_copy_region_4 __P((bus_space_tag_t,
    738 	bus_space_handle_t, bus_size_t, bus_space_handle_t,
    739 	bus_size_t, size_t));
    740 
    741 #define	bus_space_copy_region_1(t, h1, o1, h2, o2, c)			\
    742 	vax_mem_copy_region_1((t), (h1), (o1), (h2), (o2), (c))
    743 
    744 #define	bus_space_copy_region_2(t, h1, o1, h2, o2, c)			\
    745 do {									\
    746 	__BUS_SPACE_ADDRESS_SANITY((h1) + (o1), u_int16_t, "bus addr 1"); \
    747 	__BUS_SPACE_ADDRESS_SANITY((h2) + (o2), u_int16_t, "bus addr 2"); \
    748 	vax_mem_copy_region_2((t), (h1), (o1), (h2), (o2), (c));	\
    749 } while (0)
    750 
    751 #define	bus_space_copy_region_4(t, h1, o1, h2, o2, c)			\
    752 do {									\
    753 	__BUS_SPACE_ADDRESS_SANITY((h1) + (o1), u_int32_t, "bus addr 1"); \
    754 	__BUS_SPACE_ADDRESS_SANITY((h2) + (o2), u_int32_t, "bus addr 2"); \
    755 	vax_mem_copy_region_4((t), (h1), (o1), (h2), (o2), (c));	\
    756 } while (0)
    757 
    758 static __inline void
    759 vax_mem_copy_region_1(t, h1, o1, h2, o2, c)
    760 	bus_space_tag_t t;
    761 	bus_space_handle_t h1;
    762 	bus_size_t o1;
    763 	bus_space_handle_t h2;
    764 	bus_size_t o2;
    765 	size_t c;
    766 {
    767 	bus_addr_t addr1 = h1 + o1;
    768 	bus_addr_t addr2 = h2 + o2;
    769 
    770 	if (addr1 >= addr2) {
    771 		/* src after dest: copy forward */
    772 		for (; c != 0; c--, addr1++, addr2++)
    773 			*(volatile u_int8_t *)(addr2) =
    774 			    *(volatile u_int8_t *)(addr1);
    775 	} else {
    776 		/* dest after src: copy backwards */
    777 		for (addr1 += (c - 1), addr2 += (c - 1);
    778 		    c != 0; c--, addr1--, addr2--)
    779 			*(volatile u_int8_t *)(addr2) =
    780 			    *(volatile u_int8_t *)(addr1);
    781 	}
    782 }
    783 
    784 static __inline void
    785 vax_mem_copy_region_2(t, h1, o1, h2, o2, c)
    786 	bus_space_tag_t t;
    787 	bus_space_handle_t h1;
    788 	bus_size_t o1;
    789 	bus_space_handle_t h2;
    790 	bus_size_t o2;
    791 	size_t c;
    792 {
    793 	bus_addr_t addr1 = h1 + o1;
    794 	bus_addr_t addr2 = h2 + o2;
    795 
    796 	if (addr1 >= addr2) {
    797 		/* src after dest: copy forward */
    798 		for (; c != 0; c--, addr1 += 2, addr2 += 2)
    799 			*(volatile u_int16_t *)(addr2) =
    800 			    *(volatile u_int16_t *)(addr1);
    801 	} else {
    802 		/* dest after src: copy backwards */
    803 		for (addr1 += 2 * (c - 1), addr2 += 2 * (c - 1);
    804 		    c != 0; c--, addr1 -= 2, addr2 -= 2)
    805 			*(volatile u_int16_t *)(addr2) =
    806 			    *(volatile u_int16_t *)(addr1);
    807 	}
    808 }
    809 
    810 static __inline void
    811 vax_mem_copy_region_4(t, h1, o1, h2, o2, c)
    812 	bus_space_tag_t t;
    813 	bus_space_handle_t h1;
    814 	bus_size_t o1;
    815 	bus_space_handle_t h2;
    816 	bus_size_t o2;
    817 	size_t c;
    818 {
    819 	bus_addr_t addr1 = h1 + o1;
    820 	bus_addr_t addr2 = h2 + o2;
    821 
    822 	if (addr1 >= addr2) {
    823 		/* src after dest: copy forward */
    824 		for (; c != 0; c--, addr1 += 4, addr2 += 4)
    825 			*(volatile u_int32_t *)(addr2) =
    826 			    *(volatile u_int32_t *)(addr1);
    827 	} else {
    828 		/* dest after src: copy backwards */
    829 		for (addr1 += 4 * (c - 1), addr2 += 4 * (c - 1);
    830 		    c != 0; c--, addr1 -= 4, addr2 -= 4)
    831 			*(volatile u_int32_t *)(addr2) =
    832 			    *(volatile u_int32_t *)(addr1);
    833 	}
    834 }
    835 
    836 #if 0	/* Cause a link error for bus_space_copy_8 */
    837 #define	bus_space_copy_region_8	!!! bus_space_copy_region_8 unimplemented !!!
    838 #endif
    839 
    840 #ifdef __BUS_SPACE_COMPAT_OLDDEFS
    841 /* compatibility definitions; deprecated */
    842 #define	bus_space_copy_1(t, h1, o1, h2, o2, c)				\
    843 	bus_space_copy_region_1((t), (h1), (o1), (h2), (o2), (c))
    844 #define	bus_space_copy_2(t, h1, o1, h2, o2, c)				\
    845 	bus_space_copy_region_1((t), (h1), (o1), (h2), (o2), (c))
    846 #define	bus_space_copy_4(t, h1, o1, h2, o2, c)				\
    847 	bus_space_copy_region_1((t), (h1), (o1), (h2), (o2), (c))
    848 #define	bus_space_copy_8(t, h1, o1, h2, o2, c)				\
    849 	bus_space_copy_region_1((t), (h1), (o1), (h2), (o2), (c))
    850 #endif
    851 
    852 
    853 /*
    854  * Bus read/write barrier methods.
    855  *
    856  *	void bus_space_barrier __P((bus_space_tag_t tag,
    857  *	    bus_space_handle_t bsh, bus_size_t offset,
    858  *	    bus_size_t len, int flags));
    859  *
    860  * Note: the vax does not currently require barriers, but we must
    861  * provide the flags to MI code.
    862  */
    863 #define	bus_space_barrier(t, h, o, l, f)	\
    864 	((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
    865 #define	BUS_SPACE_BARRIER_READ	0x01		/* force read barrier */
    866 #define	BUS_SPACE_BARRIER_WRITE	0x02		/* force write barrier */
    867 
    868 #ifdef __BUS_SPACE_COMPAT_OLDDEFS
    869 /* compatibility definitions; deprecated */
    870 #define	BUS_BARRIER_READ	BUS_SPACE_BARRIER_READ
    871 #define	BUS_BARRIER_WRITE	BUS_SPACE_BARRIER_WRITE
    872 #endif
    873 
    874 
    875 /*
    876  * Flags used in various bus DMA methods.
    877  */
    878 #define	BUS_DMA_WAITOK		0x00	/* safe to sleep (pseudo-flag) */
    879 #define	BUS_DMA_NOWAIT		0x01	/* not safe to sleep */
    880 #define	BUS_DMA_ALLOCNOW	0x02	/* perform resource allocation now */
    881 #define	BUS_DMA_COHERENT	0x04	/* hint: map memory DMA coherent */
    882 #define	BUS_DMA_BUS1		0x10	/* placeholders for bus functions... */
    883 #define	BUS_DMA_BUS2		0x20
    884 #define	BUS_DMA_BUS3		0x40
    885 #define	BUS_DMA_BUS4		0x80
    886 
    887 /* Forwards needed by prototypes below. */
    888 struct mbuf;
    889 struct uio;
    890 struct vax_sgmap;
    891 
    892 /*
    893  * Operations performed by bus_dmamap_sync().
    894  */
    895 #define	BUS_DMASYNC_PREREAD	0x01	/* pre-read synchronization */
    896 #define	BUS_DMASYNC_POSTREAD	0x02	/* post-read synchronization */
    897 #define	BUS_DMASYNC_PREWRITE	0x04	/* pre-write synchronization */
    898 #define	BUS_DMASYNC_POSTWRITE	0x08	/* post-write synchronization */
    899 
    900 /*
    901  *	vax_bus_t
    902  *
    903  *	Busses supported by NetBSD/vax, used by internal
    904  *	utility functions.  NOT TO BE USED BY MACHINE-INDEPENDENT
    905  *	CODE!
    906  */
    907 typedef enum {
    908 	VAX_BUS_MAINBUS,
    909 	VAX_BUS_SBI,
    910 	VAX_BUS_MASSBUS,
    911 	VAX_BUS_UNIBUS,		/* Also handles QBUS */
    912 	VAX_BUS_BI,
    913 	VAX_BUS_XMI,
    914 	VAX_BUS_TURBOCHANNEL
    915 } vax_bus_t;
    916 
    917 typedef struct vax_bus_dma_tag	*bus_dma_tag_t;
    918 typedef struct vax_bus_dmamap	*bus_dmamap_t;
    919 
    920 /*
    921  *	bus_dma_segment_t
    922  *
    923  *	Describes a single contiguous DMA transaction.  Values
    924  *	are suitable for programming into DMA registers.
    925  */
    926 struct vax_bus_dma_segment {
    927 	bus_addr_t	ds_addr;	/* DMA address */
    928 	bus_size_t	ds_len;		/* length of transfer */
    929 };
    930 typedef struct vax_bus_dma_segment	bus_dma_segment_t;
    931 
    932 /*
    933  *	bus_dma_tag_t
    934  *
    935  *	A machine-dependent opaque type describing the implementation of
    936  *	DMA for a given bus.
    937  */
    938 struct vax_bus_dma_tag {
    939 	void	*_cookie;		/* cookie used in the guts */
    940 	bus_addr_t _wbase;		/* DMA window base */
    941 	bus_size_t _wsize;		/* DMA window size */
    942 
    943 	/*
    944 	 * Some chipsets have a built-in boundary constraint, independent
    945 	 * of what the device requests.  This allows that boundary to
    946 	 * be specified.  If the device has a more restrictive contraint,
    947 	 * the map will use that, otherwise this boundary will be used.
    948 	 * This value is ignored if 0.
    949 	 */
    950 	bus_size_t _boundary;
    951 
    952 	/*
    953 	 * A bus may have more than one SGMAP window, so SGMAP
    954 	 * windows also get a pointer to their SGMAP state.
    955 	 */
    956 	struct vax_sgmap *_sgmap;
    957 
    958 	/*
    959 	 * Internal-use only utility methods.  NOT TO BE USED BY
    960 	 * MACHINE-INDEPENDENT CODE!
    961 	 */
    962 	bus_dma_tag_t (*_get_tag) __P((bus_dma_tag_t, vax_bus_t));
    963 
    964 	/*
    965 	 * DMA mapping methods.
    966 	 */
    967 	int	(*_dmamap_create) __P((bus_dma_tag_t, bus_size_t, int,
    968 		    bus_size_t, bus_size_t, int, bus_dmamap_t *));
    969 	void	(*_dmamap_destroy) __P((bus_dma_tag_t, bus_dmamap_t));
    970 	int	(*_dmamap_load) __P((bus_dma_tag_t, bus_dmamap_t, void *,
    971 		    bus_size_t, struct proc *, int));
    972 	int	(*_dmamap_load_mbuf) __P((bus_dma_tag_t, bus_dmamap_t,
    973 		    struct mbuf *, int));
    974 	int	(*_dmamap_load_uio) __P((bus_dma_tag_t, bus_dmamap_t,
    975 		    struct uio *, int));
    976 	int	(*_dmamap_load_raw) __P((bus_dma_tag_t, bus_dmamap_t,
    977 		    bus_dma_segment_t *, int, bus_size_t, int));
    978 	void	(*_dmamap_unload) __P((bus_dma_tag_t, bus_dmamap_t));
    979 	void	(*_dmamap_sync) __P((bus_dma_tag_t, bus_dmamap_t,
    980 		    bus_addr_t, bus_size_t, int));
    981 
    982 	/*
    983 	 * DMA memory utility functions.
    984 	 */
    985 	int	(*_dmamem_alloc) __P((bus_dma_tag_t, bus_size_t, bus_size_t,
    986 		    bus_size_t, bus_dma_segment_t *, int, int *, int));
    987 	void	(*_dmamem_free) __P((bus_dma_tag_t,
    988 		    bus_dma_segment_t *, int));
    989 	int	(*_dmamem_map) __P((bus_dma_tag_t, bus_dma_segment_t *,
    990 		    int, size_t, caddr_t *, int));
    991 	void	(*_dmamem_unmap) __P((bus_dma_tag_t, caddr_t, size_t));
    992 	int	(*_dmamem_mmap) __P((bus_dma_tag_t, bus_dma_segment_t *,
    993 		    int, int, int, int));
    994 };
    995 
    996 #define	vaxbus_dma_get_tag(t, b)				\
    997 	(*(t)->_get_tag)(t, b)
    998 
    999 #define	bus_dmamap_create(t, s, n, m, b, f, p)			\
   1000 	(*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
   1001 #define	bus_dmamap_destroy(t, p)				\
   1002 	(*(t)->_dmamap_destroy)((t), (p))
   1003 #define	bus_dmamap_load(t, m, b, s, p, f)			\
   1004 	(*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
   1005 #define	bus_dmamap_load_mbuf(t, m, b, f)			\
   1006 	(*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
   1007 #define	bus_dmamap_load_uio(t, m, u, f)				\
   1008 	(*(t)->_dmamap_load_uio)((t), (m), (u), (f))
   1009 #define	bus_dmamap_load_raw(t, m, sg, n, s, f)			\
   1010 	(*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
   1011 #define	bus_dmamap_unload(t, p)					\
   1012 	(*(t)->_dmamap_unload)((t), (p))
   1013 #define	bus_dmamap_sync(t, p, o, l, ops)			\
   1014 	(*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
   1015 #define	bus_dmamem_alloc(t, s, a, b, sg, n, r, f)		\
   1016 	(*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
   1017 #define	bus_dmamem_free(t, sg, n)				\
   1018 	(*(t)->_dmamem_free)((t), (sg), (n))
   1019 #define	bus_dmamem_map(t, sg, n, s, k, f)			\
   1020 	(*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
   1021 #define	bus_dmamem_unmap(t, k, s)				\
   1022 	(*(t)->_dmamem_unmap)((t), (k), (s))
   1023 #define	bus_dmamem_mmap(t, sg, n, o, p, f)			\
   1024 	(*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
   1025 
   1026 /*
   1027  *	bus_dmamap_t
   1028  *
   1029  *	Describes a DMA mapping.
   1030  */
   1031 struct vax_bus_dmamap {
   1032 	/*
   1033 	 * PRIVATE MEMBERS: not for use my machine-independent code.
   1034 	 */
   1035 	bus_size_t	_dm_size;	/* largest DMA transfer mappable */
   1036 	int		_dm_segcnt;	/* number of segs this map can map */
   1037 	bus_size_t	_dm_maxsegsz;	/* largest possible segment */
   1038 	bus_size_t	_dm_boundary;	/* don't cross this */
   1039 	int		_dm_flags;	/* misc. flags */
   1040 
   1041 	/*
   1042 	 * This is used only for SGMAP-mapped DMA, but we keep it
   1043 	 * here to avoid pointless indirection.
   1044 	 */
   1045 	int		_dm_pteidx;	/* PTE index */
   1046 	int		_dm_ptecnt;	/* PTE count */
   1047 	u_long		_dm_sgva;	/* allocated sgva */
   1048 	bus_size_t	_dm_sgvalen;	/* svga length */
   1049 
   1050 	/*
   1051 	 * PUBLIC MEMBERS: these are used by machine-independent code.
   1052 	 */
   1053 	bus_size_t	dm_mapsize;	/* size of the mapping */
   1054 	int		dm_nsegs;	/* # valid segments in mapping */
   1055 	bus_dma_segment_t dm_segs[1];	/* segments; variable length */
   1056 };
   1057 
   1058 #ifdef _VAX_BUS_DMA_PRIVATE
   1059 int	_bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int, bus_size_t,
   1060 	    bus_size_t, int, bus_dmamap_t *));
   1061 void	_bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t));
   1062 
   1063 int	_bus_dmamap_load_direct __P((bus_dma_tag_t, bus_dmamap_t,
   1064 	    void *, bus_size_t, struct proc *, int));
   1065 int	_bus_dmamap_load_mbuf_direct __P((bus_dma_tag_t,
   1066 	    bus_dmamap_t, struct mbuf *, int));
   1067 int	_bus_dmamap_load_uio_direct __P((bus_dma_tag_t,
   1068 	    bus_dmamap_t, struct uio *, int));
   1069 int	_bus_dmamap_load_raw_direct __P((bus_dma_tag_t,
   1070 	    bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int));
   1071 
   1072 void	_bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
   1073 void	_bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
   1074 	    bus_size_t, int));
   1075 
   1076 int	_bus_dmamem_alloc __P((bus_dma_tag_t tag, bus_size_t size,
   1077 	    bus_size_t alignment, bus_size_t boundary,
   1078 	    bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags));
   1079 void	_bus_dmamem_free __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
   1080 	    int nsegs));
   1081 int	_bus_dmamem_map __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
   1082 	    int nsegs, size_t size, caddr_t *kvap, int flags));
   1083 void	_bus_dmamem_unmap __P((bus_dma_tag_t tag, caddr_t kva,
   1084 	    size_t size));
   1085 int	_bus_dmamem_mmap __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
   1086 	    int nsegs, int off, int prot, int flags));
   1087 #endif /* _VAX_BUS_DMA_PRIVATE */
   1088 
   1089 #endif /* _VAX_BUS_H_ */
   1090