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bus.h revision 1.3
      1 /*	$NetBSD: bus.h,v 1.3 1998/10/09 06:20:06 matt Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *	This product includes software developed by the NetBSD
     22  *	Foundation, Inc. and its contributors.
     23  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  *    contributors may be used to endorse or promote products derived
     25  *    from this software without specific prior written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  * POSSIBILITY OF SUCH DAMAGE.
     38  */
     39 
     40 /*
     41  * Copyright (c) 1996 Charles M. Hannum.  All rights reserved.
     42  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
     43  *
     44  * Redistribution and use in source and binary forms, with or without
     45  * modification, are permitted provided that the following conditions
     46  * are met:
     47  * 1. Redistributions of source code must retain the above copyright
     48  *    notice, this list of conditions and the following disclaimer.
     49  * 2. Redistributions in binary form must reproduce the above copyright
     50  *    notice, this list of conditions and the following disclaimer in the
     51  *    documentation and/or other materials provided with the distribution.
     52  * 3. All advertising materials mentioning features or use of this software
     53  *    must display the following acknowledgement:
     54  *      This product includes software developed by Christopher G. Demetriou
     55  *	for the NetBSD Project.
     56  * 4. The name of the author may not be used to endorse or promote products
     57  *    derived from this software without specific prior written permission
     58  *
     59  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     60  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     61  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     62  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     63  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     64  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     65  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     66  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     67  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     68  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     69  */
     70 
     71 #ifndef _VAX_BUS_H_
     72 #define _VAX_BUS_H_
     73 
     74 #ifdef BUS_SPACE_DEBUG
     75 /*
     76  * Macros for sanity-checking the aligned-ness of pointers passed to
     77  * bus space ops.  These are not strictly necessary on the VAX, but
     78  * could lead to performance improvements, and help catch problems
     79  * with drivers that would creep up on other architectures.
     80  */
     81 #define	__BUS_SPACE_ALIGNED_ADDRESS(p, t)				\
     82 	((((u_long)(p)) & (sizeof(t)-1)) == 0)
     83 
     84 #define	__BUS_SPACE_ADDRESS_SANITY(p, t, d)				\
     85 ({									\
     86 	if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) {			\
     87 		printf("%s 0x%lx not aligned to %d bytes %s:%d\n",	\
     88 		    d, (u_long)(p), sizeof(t), __FILE__, __LINE__);	\
     89 	}								\
     90 	(void) 0;							\
     91 })
     92 #else
     93 #define	__BUS_SPACE_ADDRESS_SANITY(p,t,d)	(void) 0
     94 #endif /* BUS_SPACE_DEBUG */
     95 
     96 /*
     97  * Bus address and size types
     98  */
     99 typedef u_long bus_addr_t;
    100 typedef u_long bus_size_t;
    101 
    102 /*
    103  * Access methods for bus resources and address space.
    104  */
    105 typedef	struct vax_bus_space bus_space_tag_t;
    106 typedef	u_long bus_space_handle_t;
    107 
    108 struct vax_bus_space {
    109 	/* cookie */
    110 	void		*vbs_cookie;
    111 
    112 	/* mapping/unmapping */
    113 	int		(*vbs_map) __P((void *, bus_addr_t, bus_size_t,
    114 			    int, bus_space_handle_t *, int));
    115 	void		(*vbs_unmap) __P((void *, bus_space_handle_t,
    116 			    bus_size_t, int));
    117 	int		(*vbs_subregion) __P((void *, bus_space_handle_t,
    118 			    bus_size_t, bus_size_t, bus_space_handle_t *));
    119 
    120 	/* allocation/deallocation */
    121 	int		(*vbs_alloc) __P((void *, bus_addr_t, bus_addr_t,
    122 			    bus_size_t, bus_size_t, bus_size_t, int,
    123 			    bus_addr_t *, bus_space_handle_t *));
    124 	void		(*vbs_free) __P((void *, bus_space_handle_t,
    125 			    bus_size_t));
    126 };
    127 
    128 /*
    129  *	int bus_space_map  __P((bus_space_tag_t t, bus_addr_t addr,
    130  *	    bus_size_t size, int flags, bus_space_handle_t *bshp));
    131  *
    132  * Map a region of bus space.
    133  */
    134 
    135 #define	BUS_SPACE_MAP_CACHEABLE		0x01
    136 #define	BUS_SPACE_MAP_LINEAR		0x02
    137 
    138 #define	bus_space_map(t, a, s, f, hp)					\
    139 	(*(t)->vbs_map)((t)->vbs_cookie, (a), (s), (f), (hp), 1)
    140 #define	vax_bus_space_map_noacct(t, a, s, f, hp)			\
    141 	(*(t)->vbs_map)((t)->vbs_cookie, (a), (s), (f), (hp), 0)
    142 
    143 /*
    144  *	int bus_space_unmap __P((bus_space_tag_t t,
    145  *	    bus_space_handle_t bsh, bus_size_t size));
    146  *
    147  * Unmap a region of bus space.
    148  */
    149 
    150 #define bus_space_unmap(t, h, s)					\
    151 	(*(t)->vbs_unmap)((t)->vbs_cookie, (h), (s), 1)
    152 #define vax_bus_space_unmap_noacct(t, h, s)				\
    153 	(*(t)->vbs_unmap)((t)->vbs_cookie, (h), (s), 0)
    154 
    155 /*
    156  *	int bus_space_subregion __P((bus_space_tag_t t,
    157  *	    bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
    158  *	    bus_space_handle_t *nbshp));
    159  *
    160  * Get a new handle for a subregion of an already-mapped area of bus space.
    161  */
    162 
    163 #define bus_space_subregion(t, h, o, s, nhp)				\
    164 	(*(t)->vbs_subregion)((t)->vbs_cookie, (h), (o), (s), (hp))
    165 
    166 /*
    167  *	int bus_space_alloc __P((bus_space_tag_t t, bus_addr_t rstart,
    168  *	    bus_addr_t rend, bus_size_t size, bus_size_t align,
    169  *	    bus_size_t boundary, int flags, bus_addr_t *addrp,
    170  *	    bus_space_handle_t *bshp));
    171  *
    172  * Allocate a region of bus space.
    173  */
    174 
    175 #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp)			\
    176 	(*(t)->vbs_alloc)((t)->vbs_cookie, (rs), (re), (s), (a), (b),   \
    177 	    (f), (ap), (hp))
    178 
    179 /*
    180  *	int bus_space_free __P((bus_space_tag_t t,
    181  *	    bus_space_handle_t bsh, bus_size_t size));
    182  *
    183  * Free a region of bus space.
    184  */
    185 
    186 #define bus_space_free(t, h, s)						\
    187 	(*(t)->vbs_free)((t)->vbs_cookie, (h), (s))
    188 
    189 /*
    190  *	u_intN_t bus_space_read_N __P((bus_space_tag_t tag,
    191  *	    bus_space_handle_t bsh, bus_size_t offset));
    192  *
    193  * Read a 1, 2, 4, or 8 byte quantity from bus space
    194  * described by tag/handle/offset.
    195  */
    196 
    197 #define	bus_space_read_1(t, h, o)					\
    198 	    (*(volatile u_int8_t *)((h) + (o)))
    199 
    200 #define	bus_space_read_2(t, h, o)					\
    201 	 (__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr"),	\
    202 	    (*(volatile u_int16_t *)((h) + (o))))
    203 
    204 #define	bus_space_read_4(t, h, o)					\
    205 	 (__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr"),	\
    206 	    (*(volatile u_int32_t *)((h) + (o))))
    207 
    208 #if 0	/* Cause a link error for bus_space_read_8 */
    209 #define	bus_space_read_8(t, h, o)	!!! bus_space_read_8 unimplemented !!!
    210 #endif
    211 
    212 /*
    213  *	void bus_space_read_multi_N __P((bus_space_tag_t tag,
    214  *	    bus_space_handle_t bsh, bus_size_t offset,
    215  *	    u_intN_t *addr, size_t count));
    216  *
    217  * Read `count' 1, 2, 4, or 8 byte quantities from bus space
    218  * described by tag/handle/offset and copy into buffer provided.
    219  */
    220 static __inline void vax_mem_read_multi_1 __P((bus_space_tag_t,
    221 	bus_space_handle_t, bus_size_t, u_int8_t *, size_t));
    222 static __inline void vax_mem_read_multi_2 __P((bus_space_tag_t,
    223 	bus_space_handle_t, bus_size_t, u_int16_t *, size_t));
    224 static __inline void vax_mem_read_multi_4 __P((bus_space_tag_t,
    225 	bus_space_handle_t, bus_size_t, u_int32_t *, size_t));
    226 
    227 #define	bus_space_read_multi_1(t, h, o, a, c)				\
    228 	vax_mem_read_multi_1((t), (h), (o), (a), (c))
    229 
    230 #define bus_space_read_multi_2(t, h, o, a, c)				\
    231 do {									\
    232 	__BUS_SPACE_ADDRESS_SANITY((a), u_int16_t, "buffer");		\
    233 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr");	\
    234 	vax_mem_read_multi_2((t), (h), (o), (a), (c));		\
    235 } while (0)
    236 
    237 #define bus_space_read_multi_4(t, h, o, a, c)				\
    238 do {									\
    239 	__BUS_SPACE_ADDRESS_SANITY((a), u_int32_t, "buffer");		\
    240 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr");	\
    241 	vax_mem_read_multi_4((t), (h), (o), (a), (c));		\
    242 } while (0)
    243 
    244 #if 0	/* Cause a link error for bus_space_read_multi_8 */
    245 #define	bus_space_read_multi_8	!!! bus_space_read_multi_8 unimplemented !!!
    246 #endif
    247 
    248 static __inline void
    249 vax_mem_read_multi_1(t, h, o, a, c)
    250 	bus_space_tag_t t;
    251 	bus_space_handle_t h;
    252 	bus_size_t o;
    253 	u_int8_t *a;
    254 	size_t c;
    255 {
    256 	const bus_addr_t addr = h + o;
    257 
    258 	for (; c != 0; c--, a++)
    259 		*a = *(volatile u_int8_t *)(addr);
    260 }
    261 
    262 static __inline void
    263 vax_mem_read_multi_2(t, h, o, a, c)
    264 	bus_space_tag_t t;
    265 	bus_space_handle_t h;
    266 	bus_size_t o;
    267 	u_int16_t *a;
    268 	size_t c;
    269 {
    270 	const bus_addr_t addr = h + o;
    271 
    272 	for (; c != 0; c--, a++)
    273 		*a = *(volatile u_int16_t *)(addr);
    274 }
    275 
    276 static __inline void
    277 vax_mem_read_multi_4(t, h, o, a, c)
    278 	bus_space_tag_t t;
    279 	bus_space_handle_t h;
    280 	bus_size_t o;
    281 	u_int32_t *a;
    282 	size_t c;
    283 {
    284 	const bus_addr_t addr = h + o;
    285 
    286 	for (; c != 0; c--, a++)
    287 		*a = *(volatile u_int32_t *)(addr);
    288 }
    289 
    290 /*
    291  *	void bus_space_read_region_N __P((bus_space_tag_t tag,
    292  *	    bus_space_handle_t bsh, bus_size_t offset,
    293  *	    u_intN_t *addr, size_t count));
    294  *
    295  * Read `count' 1, 2, 4, or 8 byte quantities from bus space
    296  * described by tag/handle and starting at `offset' and copy into
    297  * buffer provided.
    298  */
    299 
    300 static __inline void vax_mem_read_region_1 __P((bus_space_tag_t,
    301 	bus_space_handle_t, bus_size_t, u_int8_t *, size_t));
    302 static __inline void vax_mem_read_region_2 __P((bus_space_tag_t,
    303 	bus_space_handle_t, bus_size_t, u_int16_t *, size_t));
    304 static __inline void vax_mem_read_region_4 __P((bus_space_tag_t,
    305 	bus_space_handle_t, bus_size_t, u_int32_t *, size_t));
    306 
    307 #define	bus_space_read_region_1(t, h, o, a, c)				\
    308 do {									\
    309 	vax_mem_read_region_1((t), (h), (o), (a), (c));		\
    310 } while (0)
    311 
    312 #define bus_space_read_region_2(t, h, o, a, c)				\
    313 do {									\
    314 	__BUS_SPACE_ADDRESS_SANITY((a), u_int16_t, "buffer");		\
    315 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr");	\
    316 	vax_mem_read_region_2((t), (h), (o), (a), (c));		\
    317 } while (0)
    318 
    319 #define bus_space_read_region_4(t, h, o, a, c)				\
    320 do {									\
    321 	__BUS_SPACE_ADDRESS_SANITY((a), u_int32_t, "buffer");		\
    322 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr");	\
    323 	vax_mem_read_region_4((t), (h), (o), (a), (c));		\
    324 } while (0)
    325 
    326 #if 0	/* Cause a link error for bus_space_read_region_8 */
    327 #define	bus_space_read_region_8					\
    328 			!!! bus_space_read_region_8 unimplemented !!!
    329 #endif
    330 
    331 static __inline void
    332 vax_mem_read_region_1(t, h, o, a, c)
    333 	bus_space_tag_t t;
    334 	bus_space_handle_t h;
    335 	bus_size_t o;
    336 	u_int8_t *a;
    337 	size_t c;
    338 {
    339 	bus_addr_t addr = h + o;
    340 
    341 	for (; c != 0; c--, addr++, a++)
    342 		*a = *(volatile u_int8_t *)(addr);
    343 }
    344 
    345 static __inline void
    346 vax_mem_read_region_2(t, h, o, a, c)
    347 	bus_space_tag_t t;
    348 	bus_space_handle_t h;
    349 	bus_size_t o;
    350 	u_int16_t *a;
    351 	size_t c;
    352 {
    353 	bus_addr_t addr = h + o;
    354 
    355 	for (; c != 0; c--, addr++, a++)
    356 		*a = *(volatile u_int16_t *)(addr);
    357 }
    358 
    359 static __inline void
    360 vax_mem_read_region_4(t, h, o, a, c)
    361 	bus_space_tag_t t;
    362 	bus_space_handle_t h;
    363 	bus_size_t o;
    364 	u_int32_t *a;
    365 	size_t c;
    366 {
    367 	bus_addr_t addr = h + o;
    368 
    369 	for (; c != 0; c--, addr++, a++)
    370 		*a = *(volatile u_int32_t *)(addr);
    371 }
    372 
    373 /*
    374  *	void bus_space_write_N __P((bus_space_tag_t tag,
    375  *	    bus_space_handle_t bsh, bus_size_t offset,
    376  *	    u_intN_t value));
    377  *
    378  * Write the 1, 2, 4, or 8 byte value `value' to bus space
    379  * described by tag/handle/offset.
    380  */
    381 
    382 #define	bus_space_write_1(t, h, o, v)					\
    383 do {									\
    384 	((void)(*(volatile u_int8_t *)((h) + (o)) = (v)));		\
    385 } while (0)
    386 
    387 #define	bus_space_write_2(t, h, o, v)					\
    388 do {									\
    389 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr");	\
    390 	((void)(*(volatile u_int16_t *)((h) + (o)) = (v)));		\
    391 } while (0)
    392 
    393 #define	bus_space_write_4(t, h, o, v)					\
    394 do {									\
    395 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr");	\
    396 	((void)(*(volatile u_int32_t *)((h) + (o)) = (v)));		\
    397 } while (0)
    398 
    399 #if 0	/* Cause a link error for bus_space_write_8 */
    400 #define	bus_space_write_8	!!! bus_space_write_8 not implemented !!!
    401 #endif
    402 
    403 /*
    404  *	void bus_space_write_multi_N __P((bus_space_tag_t tag,
    405  *	    bus_space_handle_t bsh, bus_size_t offset,
    406  *	    const u_intN_t *addr, size_t count));
    407  *
    408  * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
    409  * provided to bus space described by tag/handle/offset.
    410  */
    411 static __inline void vax_mem_write_multi_1 __P((bus_space_tag_t,
    412 	bus_space_handle_t, bus_size_t, const u_int8_t *, size_t));
    413 static __inline void vax_mem_write_multi_2 __P((bus_space_tag_t,
    414 	bus_space_handle_t, bus_size_t, const u_int16_t *, size_t));
    415 static __inline void vax_mem_write_multi_4 __P((bus_space_tag_t,
    416 	bus_space_handle_t, bus_size_t, const u_int32_t *, size_t));
    417 
    418 #define	bus_space_write_multi_1(t, h, o, a, c)				\
    419 do {									\
    420 	vax_mem_write_multi_1((t), (h), (o), (a), (c));		\
    421 } while (0)
    422 
    423 #define bus_space_write_multi_2(t, h, o, a, c)				\
    424 do {									\
    425 	__BUS_SPACE_ADDRESS_SANITY((a), u_int16_t, "buffer");		\
    426 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr");	\
    427 	vax_mem_write_multi_2((t), (h), (o), (a), (c));		\
    428 } while (0)
    429 
    430 #define bus_space_write_multi_4(t, h, o, a, c)				\
    431 do {									\
    432 	__BUS_SPACE_ADDRESS_SANITY((a), u_int32_t, "buffer");		\
    433 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr");	\
    434 	vax_mem_write_multi_4((t), (h), (o), (a), (c));		\
    435 } while (0)
    436 
    437 #if 0	/* Cause a link error for bus_space_write_multi_8 */
    438 #define	bus_space_write_multi_8(t, h, o, a, c)				\
    439 			!!! bus_space_write_multi_8 unimplemented !!!
    440 #endif
    441 
    442 static __inline void
    443 vax_mem_write_multi_1(t, h, o, a, c)
    444 	bus_space_tag_t t;
    445 	bus_space_handle_t h;
    446 	bus_size_t o;
    447 	const u_int8_t *a;
    448 	size_t c;
    449 {
    450 	const bus_addr_t addr = h + o;
    451 
    452 	for (; c != 0; c--, a++)
    453 		*(volatile u_int8_t *)(addr) = *a;
    454 }
    455 
    456 static __inline void
    457 vax_mem_write_multi_2(t, h, o, a, c)
    458 	bus_space_tag_t t;
    459 	bus_space_handle_t h;
    460 	bus_size_t o;
    461 	const u_int16_t *a;
    462 	size_t c;
    463 {
    464 	const bus_addr_t addr = h + o;
    465 
    466 	for (; c != 0; c--, a++)
    467 		*(volatile u_int16_t *)(addr) = *a;
    468 }
    469 
    470 static __inline void
    471 vax_mem_write_multi_4(t, h, o, a, c)
    472 	bus_space_tag_t t;
    473 	bus_space_handle_t h;
    474 	bus_size_t o;
    475 	const u_int32_t *a;
    476 	size_t c;
    477 {
    478 	const bus_addr_t addr = h + o;
    479 
    480 	for (; c != 0; c--, a++)
    481 		*(volatile u_int32_t *)(addr) = *a;
    482 }
    483 
    484 /*
    485  *	void bus_space_write_region_N __P((bus_space_tag_t tag,
    486  *	    bus_space_handle_t bsh, bus_size_t offset,
    487  *	    const u_intN_t *addr, size_t count));
    488  *
    489  * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
    490  * to bus space described by tag/handle starting at `offset'.
    491  */
    492 static __inline void vax_mem_write_region_1 __P((bus_space_tag_t,
    493 	bus_space_handle_t, bus_size_t, const u_int8_t *, size_t));
    494 static __inline void vax_mem_write_region_2 __P((bus_space_tag_t,
    495 	bus_space_handle_t, bus_size_t, const u_int16_t *, size_t));
    496 static __inline void vax_mem_write_region_4 __P((bus_space_tag_t,
    497 	bus_space_handle_t, bus_size_t, const u_int32_t *, size_t));
    498 
    499 #define	bus_space_write_region_1(t, h, o, a, c)				\
    500 	vax_mem_write_region_1((t), (h), (o), (a), (c))
    501 
    502 #define bus_space_write_region_2(t, h, o, a, c)				\
    503 do {									\
    504 	__BUS_SPACE_ADDRESS_SANITY((a), u_int16_t, "buffer");		\
    505 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr");	\
    506 	vax_mem_write_region_2((t), (h), (o), (a), (c));		\
    507 } while (0)
    508 
    509 #define bus_space_write_region_4(t, h, o, a, c)				\
    510 do {									\
    511 	__BUS_SPACE_ADDRESS_SANITY((a), u_int32_t, "buffer");		\
    512 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr");	\
    513 	vax_mem_write_region_4((t), (h), (o), (a), (c));		\
    514 } while (0)
    515 
    516 #if 0	/* Cause a link error for bus_space_write_region_8 */
    517 #define	bus_space_write_region_8					\
    518 			!!! bus_space_write_region_8 unimplemented !!!
    519 #endif
    520 
    521 static __inline void
    522 vax_mem_write_region_1(t, h, o, a, c)
    523 	bus_space_tag_t t;
    524 	bus_space_handle_t h;
    525 	bus_size_t o;
    526 	const u_int8_t *a;
    527 	size_t c;
    528 {
    529 	bus_addr_t addr = h + o;
    530 
    531 	for (; c != 0; c--, addr++, a++)
    532 		*(volatile u_int8_t *)(addr) = *a;
    533 }
    534 
    535 static __inline void
    536 vax_mem_write_region_2(t, h, o, a, c)
    537 	bus_space_tag_t t;
    538 	bus_space_handle_t h;
    539 	bus_size_t o;
    540 	const u_int16_t *a;
    541 	size_t c;
    542 {
    543 	bus_addr_t addr = h + o;
    544 
    545 	for (; c != 0; c--, addr++, a++)
    546 		*(volatile u_int16_t *)(addr) = *a;
    547 }
    548 
    549 static __inline void
    550 vax_mem_write_region_4(t, h, o, a, c)
    551 	bus_space_tag_t t;
    552 	bus_space_handle_t h;
    553 	bus_size_t o;
    554 	const u_int32_t *a;
    555 	size_t c;
    556 {
    557 	bus_addr_t addr = h + o;
    558 
    559 	for (; c != 0; c--, addr++, a++)
    560 		*(volatile u_int32_t *)(addr) = *a;
    561 }
    562 
    563 /*
    564  *	void bus_space_set_multi_N __P((bus_space_tag_t tag,
    565  *	    bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
    566  *	    size_t count));
    567  *
    568  * Write the 1, 2, 4, or 8 byte value `val' to bus space described
    569  * by tag/handle/offset `count' times.
    570  */
    571 
    572 static __inline void vax_mem_set_multi_1 __P((bus_space_tag_t,
    573 	bus_space_handle_t, bus_size_t, u_int8_t, size_t));
    574 static __inline void vax_mem_set_multi_2 __P((bus_space_tag_t,
    575 	bus_space_handle_t, bus_size_t, u_int16_t, size_t));
    576 static __inline void vax_mem_set_multi_4 __P((bus_space_tag_t,
    577 	bus_space_handle_t, bus_size_t, u_int32_t, size_t));
    578 
    579 #define	bus_space_set_multi_1(t, h, o, v, c)				\
    580 	vax_mem_set_multi_1((t), (h), (o), (v), (c))
    581 
    582 #define	bus_space_set_multi_2(t, h, o, v, c)				\
    583 do {									\
    584 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr");	\
    585 	vax_mem_set_multi_2((t), (h), (o), (v), (c));		\
    586 } while (0)
    587 
    588 #define	bus_space_set_multi_4(t, h, o, v, c)				\
    589 do {									\
    590 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr");	\
    591 	vax_mem_set_multi_4((t), (h), (o), (v), (c));		\
    592 } while (0)
    593 
    594 static __inline void
    595 vax_mem_set_multi_1(t, h, o, v, c)
    596 	bus_space_tag_t t;
    597 	bus_space_handle_t h;
    598 	bus_size_t o;
    599 	u_int8_t v;
    600 	size_t c;
    601 {
    602 	bus_addr_t addr = h + o;
    603 
    604 	while (c--)
    605 		*(volatile u_int8_t *)(addr) = v;
    606 }
    607 
    608 static __inline void
    609 vax_mem_set_multi_2(t, h, o, v, c)
    610 	bus_space_tag_t t;
    611 	bus_space_handle_t h;
    612 	bus_size_t o;
    613 	u_int16_t v;
    614 	size_t c;
    615 {
    616 	bus_addr_t addr = h + o;
    617 
    618 	while (c--)
    619 		*(volatile u_int16_t *)(addr) = v;
    620 }
    621 
    622 static __inline void
    623 vax_mem_set_multi_4(t, h, o, v, c)
    624 	bus_space_tag_t t;
    625 	bus_space_handle_t h;
    626 	bus_size_t o;
    627 	u_int32_t v;
    628 	size_t c;
    629 {
    630 	bus_addr_t addr = h + o;
    631 
    632 	while (c--)
    633 		*(volatile u_int32_t *)(addr) = v;
    634 }
    635 
    636 #if 0	/* Cause a link error for bus_space_set_multi_8 */
    637 #define	bus_space_set_multi_8 !!! bus_space_set_multi_8 unimplemented !!!
    638 #endif
    639 
    640 /*
    641  *	void bus_space_set_region_N __P((bus_space_tag_t tag,
    642  *	    bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
    643  *	    size_t count));
    644  *
    645  * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
    646  * by tag/handle starting at `offset'.
    647  */
    648 
    649 static __inline void vax_mem_set_region_1 __P((bus_space_tag_t,
    650 	bus_space_handle_t, bus_size_t, u_int8_t, size_t));
    651 static __inline void vax_mem_set_region_2 __P((bus_space_tag_t,
    652 	bus_space_handle_t, bus_size_t, u_int16_t, size_t));
    653 static __inline void vax_mem_set_region_4 __P((bus_space_tag_t,
    654 	bus_space_handle_t, bus_size_t, u_int32_t, size_t));
    655 
    656 #define	bus_space_set_region_1(t, h, o, v, c)				\
    657 	vax_mem_set_region_1((t), (h), (o), (v), (c))
    658 
    659 #define	bus_space_set_region_2(t, h, o, v, c)				\
    660 do {									\
    661 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int16_t, "bus addr");	\
    662 	vax_mem_set_region_2((t), (h), (o), (v), (c));		\
    663 } while (0)
    664 
    665 #define	bus_space_set_region_4(t, h, o, v, c)				\
    666 do {									\
    667 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), u_int32_t, "bus addr");	\
    668 	vax_mem_set_region_4((t), (h), (o), (v), (c));		\
    669 } while (0)
    670 
    671 static __inline void
    672 vax_mem_set_region_1(t, h, o, v, c)
    673 	bus_space_tag_t t;
    674 	bus_space_handle_t h;
    675 	bus_size_t o;
    676 	u_int8_t v;
    677 	size_t c;
    678 {
    679 	bus_addr_t addr = h + o;
    680 
    681 	for (; c != 0; c--, addr++)
    682 		*(volatile u_int8_t *)(addr) = v;
    683 }
    684 
    685 static __inline void
    686 vax_mem_set_region_2(t, h, o, v, c)
    687 	bus_space_tag_t t;
    688 	bus_space_handle_t h;
    689 	bus_size_t o;
    690 	u_int16_t v;
    691 	size_t c;
    692 {
    693 	bus_addr_t addr = h + o;
    694 
    695 	for (; c != 0; c--, addr += 2)
    696 		*(volatile u_int16_t *)(addr) = v;
    697 }
    698 
    699 static __inline void
    700 vax_mem_set_region_4(t, h, o, v, c)
    701 	bus_space_tag_t t;
    702 	bus_space_handle_t h;
    703 	bus_size_t o;
    704 	u_int32_t v;
    705 	size_t c;
    706 {
    707 	bus_addr_t addr = h + o;
    708 
    709 	for (; c != 0; c--, addr += 4)
    710 		*(volatile u_int32_t *)(addr) = v;
    711 }
    712 
    713 #if 0	/* Cause a link error for bus_space_set_region_8 */
    714 #define	bus_space_set_region_8	!!! bus_space_set_region_8 unimplemented !!!
    715 #endif
    716 
    717 /*
    718  *	void bus_space_copy_region_N __P((bus_space_tag_t tag,
    719  *	    bus_space_handle_t bsh1, bus_size_t off1,
    720  *	    bus_space_handle_t bsh2, bus_size_t off2,
    721  *	    size_t count));
    722  *
    723  * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
    724  * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
    725  */
    726 
    727 static __inline void vax_mem_copy_region_1 __P((bus_space_tag_t,
    728 	bus_space_handle_t, bus_size_t, bus_space_handle_t,
    729 	bus_size_t, size_t));
    730 static __inline void vax_mem_copy_region_2 __P((bus_space_tag_t,
    731 	bus_space_handle_t, bus_size_t, bus_space_handle_t,
    732 	bus_size_t, size_t));
    733 static __inline void vax_mem_copy_region_4 __P((bus_space_tag_t,
    734 	bus_space_handle_t, bus_size_t, bus_space_handle_t,
    735 	bus_size_t, size_t));
    736 
    737 #define	bus_space_copy_region_1(t, h1, o1, h2, o2, c)			\
    738 	vax_mem_copy_region_1((t), (h1), (o1), (h2), (o2), (c))
    739 
    740 #define	bus_space_copy_region_2(t, h1, o1, h2, o2, c)			\
    741 do {									\
    742 	__BUS_SPACE_ADDRESS_SANITY((h1) + (o1), u_int16_t, "bus addr 1"); \
    743 	__BUS_SPACE_ADDRESS_SANITY((h2) + (o2), u_int16_t, "bus addr 2"); \
    744 	vax_mem_copy_region_2((t), (h1), (o1), (h2), (o2), (c));	\
    745 } while (0)
    746 
    747 #define	bus_space_copy_region_4(t, h1, o1, h2, o2, c)			\
    748 do {									\
    749 	__BUS_SPACE_ADDRESS_SANITY((h1) + (o1), u_int32_t, "bus addr 1"); \
    750 	__BUS_SPACE_ADDRESS_SANITY((h2) + (o2), u_int32_t, "bus addr 2"); \
    751 	vax_mem_copy_region_4((t), (h1), (o1), (h2), (o2), (c));	\
    752 } while (0)
    753 
    754 static __inline void
    755 vax_mem_copy_region_1(t, h1, o1, h2, o2, c)
    756 	bus_space_tag_t t;
    757 	bus_space_handle_t h1;
    758 	bus_size_t o1;
    759 	bus_space_handle_t h2;
    760 	bus_size_t o2;
    761 	size_t c;
    762 {
    763 	bus_addr_t addr1 = h1 + o1;
    764 	bus_addr_t addr2 = h2 + o2;
    765 
    766 	if (addr1 >= addr2) {
    767 		/* src after dest: copy forward */
    768 		for (; c != 0; c--, addr1++, addr2++)
    769 			*(volatile u_int8_t *)(addr2) =
    770 			    *(volatile u_int8_t *)(addr1);
    771 	} else {
    772 		/* dest after src: copy backwards */
    773 		for (addr1 += (c - 1), addr2 += (c - 1);
    774 		    c != 0; c--, addr1--, addr2--)
    775 			*(volatile u_int8_t *)(addr2) =
    776 			    *(volatile u_int8_t *)(addr1);
    777 	}
    778 }
    779 
    780 static __inline void
    781 vax_mem_copy_region_2(t, h1, o1, h2, o2, c)
    782 	bus_space_tag_t t;
    783 	bus_space_handle_t h1;
    784 	bus_size_t o1;
    785 	bus_space_handle_t h2;
    786 	bus_size_t o2;
    787 	size_t c;
    788 {
    789 	bus_addr_t addr1 = h1 + o1;
    790 	bus_addr_t addr2 = h2 + o2;
    791 
    792 	if (addr1 >= addr2) {
    793 		/* src after dest: copy forward */
    794 		for (; c != 0; c--, addr1 += 2, addr2 += 2)
    795 			*(volatile u_int16_t *)(addr2) =
    796 			    *(volatile u_int16_t *)(addr1);
    797 	} else {
    798 		/* dest after src: copy backwards */
    799 		for (addr1 += 2 * (c - 1), addr2 += 2 * (c - 1);
    800 		    c != 0; c--, addr1 -= 2, addr2 -= 2)
    801 			*(volatile u_int16_t *)(addr2) =
    802 			    *(volatile u_int16_t *)(addr1);
    803 	}
    804 }
    805 
    806 static __inline void
    807 vax_mem_copy_region_4(t, h1, o1, h2, o2, c)
    808 	bus_space_tag_t t;
    809 	bus_space_handle_t h1;
    810 	bus_size_t o1;
    811 	bus_space_handle_t h2;
    812 	bus_size_t o2;
    813 	size_t c;
    814 {
    815 	bus_addr_t addr1 = h1 + o1;
    816 	bus_addr_t addr2 = h2 + o2;
    817 
    818 	if (addr1 >= addr2) {
    819 		/* src after dest: copy forward */
    820 		for (; c != 0; c--, addr1 += 4, addr2 += 4)
    821 			*(volatile u_int32_t *)(addr2) =
    822 			    *(volatile u_int32_t *)(addr1);
    823 	} else {
    824 		/* dest after src: copy backwards */
    825 		for (addr1 += 4 * (c - 1), addr2 += 4 * (c - 1);
    826 		    c != 0; c--, addr1 -= 4, addr2 -= 4)
    827 			*(volatile u_int32_t *)(addr2) =
    828 			    *(volatile u_int32_t *)(addr1);
    829 	}
    830 }
    831 
    832 #if 0	/* Cause a link error for bus_space_copy_8 */
    833 #define	bus_space_copy_region_8	!!! bus_space_copy_region_8 unimplemented !!!
    834 #endif
    835 
    836 #ifdef __BUS_SPACE_COMPAT_OLDDEFS
    837 /* compatibility definitions; deprecated */
    838 #define	bus_space_copy_1(t, h1, o1, h2, o2, c)				\
    839 	bus_space_copy_region_1((t), (h1), (o1), (h2), (o2), (c))
    840 #define	bus_space_copy_2(t, h1, o1, h2, o2, c)				\
    841 	bus_space_copy_region_1((t), (h1), (o1), (h2), (o2), (c))
    842 #define	bus_space_copy_4(t, h1, o1, h2, o2, c)				\
    843 	bus_space_copy_region_1((t), (h1), (o1), (h2), (o2), (c))
    844 #define	bus_space_copy_8(t, h1, o1, h2, o2, c)				\
    845 	bus_space_copy_region_1((t), (h1), (o1), (h2), (o2), (c))
    846 #endif
    847 
    848 
    849 /*
    850  * Bus read/write barrier methods.
    851  *
    852  *	void bus_space_barrier __P((bus_space_tag_t tag,
    853  *	    bus_space_handle_t bsh, bus_size_t offset,
    854  *	    bus_size_t len, int flags));
    855  *
    856  * Note: the vax does not currently require barriers, but we must
    857  * provide the flags to MI code.
    858  */
    859 #define	bus_space_barrier(t, h, o, l, f)	\
    860 	((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
    861 #define	BUS_SPACE_BARRIER_READ	0x01		/* force read barrier */
    862 #define	BUS_SPACE_BARRIER_WRITE	0x02		/* force write barrier */
    863 
    864 #ifdef __BUS_SPACE_COMPAT_OLDDEFS
    865 /* compatibility definitions; deprecated */
    866 #define	BUS_BARRIER_READ	BUS_SPACE_BARRIER_READ
    867 #define	BUS_BARRIER_WRITE	BUS_SPACE_BARRIER_WRITE
    868 #endif
    869 
    870 
    871 /*
    872  * Flags used in various bus DMA methods.
    873  */
    874 #define	BUS_DMA_WAITOK		0x00	/* safe to sleep (pseudo-flag) */
    875 #define	BUS_DMA_NOWAIT		0x01	/* not safe to sleep */
    876 #define	BUS_DMA_ALLOCNOW	0x02	/* perform resource allocation now */
    877 #define	BUS_DMA_COHERENT	0x04	/* hint: map memory DMA coherent */
    878 #define	BUS_DMA_BUS1		0x10	/* placeholders for bus functions... */
    879 #define	BUS_DMA_BUS2		0x20
    880 #define	BUS_DMA_BUS3		0x40
    881 #define	BUS_DMA_BUS4		0x80
    882 
    883 /* Forwards needed by prototypes below. */
    884 struct mbuf;
    885 struct uio;
    886 struct vax_sgmap;
    887 
    888 /*
    889  * Operations performed by bus_dmamap_sync().
    890  */
    891 #define	BUS_DMASYNC_PREREAD	0x01	/* pre-read synchronization */
    892 #define	BUS_DMASYNC_POSTREAD	0x02	/* post-read synchronization */
    893 #define	BUS_DMASYNC_PREWRITE	0x04	/* pre-write synchronization */
    894 #define	BUS_DMASYNC_POSTWRITE	0x08	/* post-write synchronization */
    895 
    896 /*
    897  *	vax_bus_t
    898  *
    899  *	Busses supported by NetBSD/vax, used by internal
    900  *	utility functions.  NOT TO BE USED BY MACHINE-INDEPENDENT
    901  *	CODE!
    902  */
    903 typedef enum {
    904 	VAX_BUS_MAINBUS,
    905 	VAX_BUS_SBI,
    906 	VAX_BUS_MASSBUS,
    907 	VAX_BUS_UNIBUS,		/* Also handles QBUS */
    908 	VAX_BUS_BI,
    909 	VAX_BUS_XMI,
    910 	VAX_BUS_TURBOCHANNEL
    911 } vax_bus_t;
    912 
    913 typedef struct vax_bus_dma_tag	*bus_dma_tag_t;
    914 typedef struct vax_bus_dmamap	*bus_dmamap_t;
    915 
    916 /*
    917  *	bus_dma_segment_t
    918  *
    919  *	Describes a single contiguous DMA transaction.  Values
    920  *	are suitable for programming into DMA registers.
    921  */
    922 struct vax_bus_dma_segment {
    923 	bus_addr_t	ds_addr;	/* DMA address */
    924 	bus_size_t	ds_len;		/* length of transfer */
    925 };
    926 typedef struct vax_bus_dma_segment	bus_dma_segment_t;
    927 
    928 /*
    929  *	bus_dma_tag_t
    930  *
    931  *	A machine-dependent opaque type describing the implementation of
    932  *	DMA for a given bus.
    933  */
    934 struct vax_bus_dma_tag {
    935 	void	*_cookie;		/* cookie used in the guts */
    936 	bus_addr_t _wbase;		/* DMA window base */
    937 	bus_size_t _wsize;		/* DMA window size */
    938 
    939 	/*
    940 	 * Some chipsets have a built-in boundary constraint, independent
    941 	 * of what the device requests.  This allows that boundary to
    942 	 * be specified.  If the device has a more restrictive contraint,
    943 	 * the map will use that, otherwise this boundary will be used.
    944 	 * This value is ignored if 0.
    945 	 */
    946 	bus_size_t _boundary;
    947 
    948 	/*
    949 	 * A bus may have more than one SGMAP window, so SGMAP
    950 	 * windows also get a pointer to their SGMAP state.
    951 	 */
    952 	struct vax_sgmap *_sgmap;
    953 
    954 	/*
    955 	 * Internal-use only utility methods.  NOT TO BE USED BY
    956 	 * MACHINE-INDEPENDENT CODE!
    957 	 */
    958 	bus_dma_tag_t (*_get_tag) __P((bus_dma_tag_t, vax_bus_t));
    959 
    960 	/*
    961 	 * DMA mapping methods.
    962 	 */
    963 	int	(*_dmamap_create) __P((bus_dma_tag_t, bus_size_t, int,
    964 		    bus_size_t, bus_size_t, int, bus_dmamap_t *));
    965 	void	(*_dmamap_destroy) __P((bus_dma_tag_t, bus_dmamap_t));
    966 	int	(*_dmamap_load) __P((bus_dma_tag_t, bus_dmamap_t, void *,
    967 		    bus_size_t, struct proc *, int));
    968 	int	(*_dmamap_load_mbuf) __P((bus_dma_tag_t, bus_dmamap_t,
    969 		    struct mbuf *, int));
    970 	int	(*_dmamap_load_uio) __P((bus_dma_tag_t, bus_dmamap_t,
    971 		    struct uio *, int));
    972 	int	(*_dmamap_load_raw) __P((bus_dma_tag_t, bus_dmamap_t,
    973 		    bus_dma_segment_t *, int, bus_size_t, int));
    974 	void	(*_dmamap_unload) __P((bus_dma_tag_t, bus_dmamap_t));
    975 	void	(*_dmamap_sync) __P((bus_dma_tag_t, bus_dmamap_t,
    976 		    bus_addr_t, bus_size_t, int));
    977 
    978 	/*
    979 	 * DMA memory utility functions.
    980 	 */
    981 	int	(*_dmamem_alloc) __P((bus_dma_tag_t, bus_size_t, bus_size_t,
    982 		    bus_size_t, bus_dma_segment_t *, int, int *, int));
    983 	void	(*_dmamem_free) __P((bus_dma_tag_t,
    984 		    bus_dma_segment_t *, int));
    985 	int	(*_dmamem_map) __P((bus_dma_tag_t, bus_dma_segment_t *,
    986 		    int, size_t, caddr_t *, int));
    987 	void	(*_dmamem_unmap) __P((bus_dma_tag_t, caddr_t, size_t));
    988 	int	(*_dmamem_mmap) __P((bus_dma_tag_t, bus_dma_segment_t *,
    989 		    int, int, int, int));
    990 };
    991 
    992 #define	vaxbus_dma_get_tag(t, b)				\
    993 	(*(t)->_get_tag)(t, b)
    994 
    995 #define	bus_dmamap_create(t, s, n, m, b, f, p)			\
    996 	(*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
    997 #define	bus_dmamap_destroy(t, p)				\
    998 	(*(t)->_dmamap_destroy)((t), (p))
    999 #define	bus_dmamap_load(t, m, b, s, p, f)			\
   1000 	(*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
   1001 #define	bus_dmamap_load_mbuf(t, m, b, f)			\
   1002 	(*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
   1003 #define	bus_dmamap_load_uio(t, m, u, f)				\
   1004 	(*(t)->_dmamap_load_uio)((t), (m), (u), (f))
   1005 #define	bus_dmamap_load_raw(t, m, sg, n, s, f)			\
   1006 	(*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
   1007 #define	bus_dmamap_unload(t, p)					\
   1008 	(*(t)->_dmamap_unload)((t), (p))
   1009 #define	bus_dmamap_sync(t, p, o, l, ops)			\
   1010 	(*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
   1011 #define	bus_dmamem_alloc(t, s, a, b, sg, n, r, f)		\
   1012 	(*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
   1013 #define	bus_dmamem_free(t, sg, n)				\
   1014 	(*(t)->_dmamem_free)((t), (sg), (n))
   1015 #define	bus_dmamem_map(t, sg, n, s, k, f)			\
   1016 	(*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
   1017 #define	bus_dmamem_unmap(t, k, s)				\
   1018 	(*(t)->_dmamem_unmap)((t), (k), (s))
   1019 #define	bus_dmamem_mmap(t, sg, n, o, p, f)			\
   1020 	(*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
   1021 
   1022 /*
   1023  *	bus_dmamap_t
   1024  *
   1025  *	Describes a DMA mapping.
   1026  */
   1027 struct vax_bus_dmamap {
   1028 	/*
   1029 	 * PRIVATE MEMBERS: not for use my machine-independent code.
   1030 	 */
   1031 	bus_size_t	_dm_size;	/* largest DMA transfer mappable */
   1032 	int		_dm_segcnt;	/* number of segs this map can map */
   1033 	bus_size_t	_dm_maxsegsz;	/* largest possible segment */
   1034 	bus_size_t	_dm_boundary;	/* don't cross this */
   1035 	int		_dm_flags;	/* misc. flags */
   1036 
   1037 	/*
   1038 	 * This is used only for SGMAP-mapped DMA, but we keep it
   1039 	 * here to avoid pointless indirection.
   1040 	 */
   1041 	int		_dm_pteidx;	/* PTE index */
   1042 	int		_dm_ptecnt;	/* PTE count */
   1043 	u_long		_dm_sgva;	/* allocated sgva */
   1044 	bus_size_t	_dm_sgvalen;	/* svga length */
   1045 
   1046 	/*
   1047 	 * PUBLIC MEMBERS: these are used by machine-independent code.
   1048 	 */
   1049 	bus_size_t	dm_mapsize;	/* size of the mapping */
   1050 	int		dm_nsegs;	/* # valid segments in mapping */
   1051 	bus_dma_segment_t dm_segs[1];	/* segments; variable length */
   1052 };
   1053 
   1054 #ifdef _VAX_BUS_DMA_PRIVATE
   1055 int	_bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int, bus_size_t,
   1056 	    bus_size_t, int, bus_dmamap_t *));
   1057 void	_bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t));
   1058 
   1059 int	_bus_dmamap_load_direct __P((bus_dma_tag_t, bus_dmamap_t,
   1060 	    void *, bus_size_t, struct proc *, int));
   1061 int	_bus_dmamap_load_mbuf_direct __P((bus_dma_tag_t,
   1062 	    bus_dmamap_t, struct mbuf *, int));
   1063 int	_bus_dmamap_load_uio_direct __P((bus_dma_tag_t,
   1064 	    bus_dmamap_t, struct uio *, int));
   1065 int	_bus_dmamap_load_raw_direct __P((bus_dma_tag_t,
   1066 	    bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int));
   1067 
   1068 void	_bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
   1069 void	_bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
   1070 	    bus_size_t, int));
   1071 
   1072 int	_bus_dmamem_alloc __P((bus_dma_tag_t tag, bus_size_t size,
   1073 	    bus_size_t alignment, bus_size_t boundary,
   1074 	    bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags));
   1075 void	_bus_dmamem_free __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
   1076 	    int nsegs));
   1077 int	_bus_dmamem_map __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
   1078 	    int nsegs, size_t size, caddr_t *kvap, int flags));
   1079 void	_bus_dmamem_unmap __P((bus_dma_tag_t tag, caddr_t kva,
   1080 	    size_t size));
   1081 int	_bus_dmamem_mmap __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
   1082 	    int nsegs, int off, int prot, int flags));
   1083 #endif /* _VAX_BUS_DMA_PRIVATE */
   1084 
   1085 #endif /* _VAX_BUS_H_ */
   1086