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      1  1.31  riastrad /* 	$NetBSD: intr.h,v 1.31 2023/07/11 11:48:45 riastradh Exp $	*/
      2   1.1      matt 
      3   1.1      matt /*
      4   1.1      matt  * Copyright (c) 1998 Matt Thomas.
      5   1.1      matt  * All rights reserved.
      6   1.1      matt  *
      7   1.1      matt  * Redistribution and use in source and binary forms, with or without
      8   1.1      matt  * modification, are permitted provided that the following conditions
      9   1.1      matt  * are met:
     10   1.1      matt  * 1. Redistributions of source code must retain the above copyright
     11   1.1      matt  *    notice, this list of conditions and the following disclaimer.
     12   1.1      matt  * 2. Redistributions in binary form must reproduce the above copyright
     13   1.1      matt  *    notice, this list of conditions and the following disclaimer in the
     14   1.1      matt  *    documentation and/or other materials provided with the distribution.
     15   1.1      matt  * 3. The name of the company nor the name of the author may be used to
     16   1.1      matt  *    endorse or promote products derived from this software without specific
     17   1.1      matt  *    prior written permission.
     18   1.1      matt  *
     19   1.1      matt  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     20   1.1      matt  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     21   1.1      matt  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     22   1.1      matt  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     23   1.1      matt  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     24   1.1      matt  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     25   1.1      matt  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     26   1.1      matt  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     27   1.1      matt  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     28   1.1      matt  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     29   1.1      matt  * SUCH DAMAGE.
     30   1.1      matt  */
     31   1.1      matt 
     32   1.1      matt #ifndef _VAX_INTR_H_
     33   1.1      matt #define _VAX_INTR_H_
     34   1.1      matt 
     35   1.2      matt #include <sys/queue.h>
     36  1.22      matt #include <machine/mtpr.h>
     37   1.2      matt 
     38   1.1      matt /* Define the various Interrupt Priority Levels */
     39   1.1      matt 
     40   1.1      matt /* Interrupt Priority Levels are not mutually exclusive. */
     41   1.1      matt 
     42  1.27      matt /* Hardware interrupt levels are 16 (0x10) thru 31 (0x1f) */
     43   1.2      matt #define IPL_HIGH	0x1f	/* high -- blocks all interrupts */
     44  1.25        ad #define IPL_SCHED	0x18	/* clock */
     45  1.14   thorpej #define IPL_VM		0x17	/* memory allocation */
     46   1.1      matt 
     47  1.27      matt /* Software interrupt levels are 0 (0x00) thru 15 (0x0f) */
     48   1.2      matt #define IPL_SOFTDDB	0x0f	/* used by DDB on VAX */
     49   1.2      matt #define IPL_SOFTSERIAL	0x0d	/* soft serial */
     50   1.2      matt #define IPL_SOFTNET	0x0c	/* soft network */
     51  1.26      matt #define IPL_SOFTBIO	0x0b	/* soft bio */
     52   1.2      matt #define IPL_SOFTCLOCK	0x08
     53   1.2      matt #define IPL_NONE	0x00
     54   1.2      matt 
     55  1.27      matt /* vax weirdness */
     56  1.25        ad #define IPL_UBA		IPL_VM	/* unibus adapters */
     57  1.25        ad #define IPL_CONSMEDIA	IPL_VM	/* console media */
     58  1.25        ad 
     59  1.27      matt /* Misc */
     60   1.2      matt #define IPL_LEVELS	32
     61   1.2      matt 
     62   1.2      matt #define IST_UNUSABLE	-1	/* interrupt cannot be used */
     63   1.2      matt #define IST_NONE	0	/* none (dummy) */
     64   1.2      matt #define IST_PULSE	1	/* pulsed */
     65   1.2      matt #define IST_EDGE	2	/* edge-triggered */
     66   1.2      matt #define IST_LEVEL	3	/* level-triggered */
     67   1.2      matt 
     68  1.31  riastrad #if defined(_KERNEL) || defined(_KMEMUSER)
     69  1.31  riastrad typedef struct {
     70  1.31  riastrad 	uint8_t _ipl;
     71  1.31  riastrad } ipl_cookie_t;
     72  1.31  riastrad #endif
     73   1.2      matt 
     74   1.2      matt #ifdef _KERNEL
     75  1.22      matt typedef int ipl_t;
     76  1.22      matt 
     77  1.30       ryo static inline __always_inline void
     78  1.24      matt _splset(ipl_t ipl)
     79  1.24      matt {
     80  1.24      matt 	mtpr(ipl, PR_IPL);
     81  1.24      matt }
     82  1.24      matt 
     83  1.30       ryo static inline __always_inline ipl_t
     84  1.24      matt _splget(void)
     85  1.22      matt {
     86  1.24      matt 	return mfpr(PR_IPL);
     87  1.22      matt }
     88  1.22      matt 
     89  1.30       ryo static inline __always_inline ipl_t
     90  1.24      matt splx(ipl_t new_ipl)
     91  1.22      matt {
     92  1.24      matt 	ipl_t old_ipl = _splget();
     93  1.24      matt 	_splset(new_ipl);
     94  1.24      matt 	return old_ipl;
     95  1.22      matt }
     96   1.4      matt 
     97  1.30       ryo static inline __always_inline ipl_cookie_t
     98  1.21      yamt makeiplcookie(ipl_t ipl)
     99  1.21      yamt {
    100  1.24      matt 	return (ipl_cookie_t){._ipl = (uint8_t)ipl};
    101  1.21      yamt }
    102  1.21      yamt 
    103  1.30       ryo static inline __always_inline int
    104  1.21      yamt splraiseipl(ipl_cookie_t icookie)
    105  1.21      yamt {
    106  1.22      matt 	ipl_t newipl = icookie._ipl;
    107  1.24      matt 	ipl_t oldipl;
    108  1.21      yamt 
    109  1.24      matt 	oldipl = _splget();
    110  1.24      matt 	if (newipl > oldipl) {
    111  1.21      yamt 		_splset(newipl);
    112  1.21      yamt 	}
    113  1.24      matt 	return oldipl;
    114  1.21      yamt }
    115   1.4      matt 
    116   1.2      matt 
    117   1.4      matt #define spl0()		_splset(IPL_NONE)		/* IPL00 */
    118  1.21      yamt #define splddb()	splraiseipl(makeiplcookie(IPL_SOFTDDB)) /* IPL0F */
    119  1.27      matt #define splconsmedia()	splraiseipl(makeiplcookie(IPL_CONSMEDIA)) /* IPL17 */
    120   1.6   thorpej 
    121  1.17      yamt #include <sys/spl.h>
    122   1.2      matt 
    123   1.2      matt /* These are better to use when playing with VAX buses */
    124  1.21      yamt #define	spluba()	splraiseipl(makeiplcookie(IPL_UBA)) /* IPL17 */
    125  1.27      matt #define spl7()		splvm()
    126   1.1      matt 
    127   1.2      matt /* schedule software interrupts
    128   1.2      matt  */
    129  1.27      matt #define setsoftddb()	((void)mtpr(IPL_SOFTDDB, PR_SIRR))
    130   1.2      matt 
    131   1.2      matt #if !defined(_LOCORE)
    132   1.2      matt 
    133  1.27      matt #if defined(__HAVE_FAST_SOFTINTS)
    134  1.27      matt static inline void
    135  1.27      matt softint_trigger(uintptr_t machdep)
    136  1.27      matt {
    137  1.27      matt 	mtpr(machdep, PR_SIRR);
    138   1.2      matt }
    139  1.27      matt #endif /* __HAVE_FAST_SOFTINTS */
    140  1.27      matt #endif /* !_LOCORE */
    141   1.2      matt #endif /* _KERNEL */
    142   1.1      matt #endif	/* _VAX_INTR_H */
    143