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intr.h revision 1.20
      1  1.20     perry /* 	$NetBSD: intr.h,v 1.20 2006/02/16 20:17:15 perry Exp $	*/
      2   1.1      matt 
      3   1.1      matt /*
      4   1.1      matt  * Copyright (c) 1998 Matt Thomas.
      5   1.1      matt  * All rights reserved.
      6   1.1      matt  *
      7   1.1      matt  * Redistribution and use in source and binary forms, with or without
      8   1.1      matt  * modification, are permitted provided that the following conditions
      9   1.1      matt  * are met:
     10   1.1      matt  * 1. Redistributions of source code must retain the above copyright
     11   1.1      matt  *    notice, this list of conditions and the following disclaimer.
     12   1.1      matt  * 2. Redistributions in binary form must reproduce the above copyright
     13   1.1      matt  *    notice, this list of conditions and the following disclaimer in the
     14   1.1      matt  *    documentation and/or other materials provided with the distribution.
     15   1.1      matt  * 3. The name of the company nor the name of the author may be used to
     16   1.1      matt  *    endorse or promote products derived from this software without specific
     17   1.1      matt  *    prior written permission.
     18   1.1      matt  *
     19   1.1      matt  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     20   1.1      matt  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     21   1.1      matt  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     22   1.1      matt  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     23   1.1      matt  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     24   1.1      matt  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     25   1.1      matt  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     26   1.1      matt  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     27   1.1      matt  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     28   1.1      matt  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     29   1.1      matt  * SUCH DAMAGE.
     30   1.1      matt  */
     31   1.1      matt 
     32   1.1      matt #ifndef _VAX_INTR_H_
     33   1.1      matt #define _VAX_INTR_H_
     34   1.1      matt 
     35   1.2      matt #include <sys/queue.h>
     36   1.2      matt 
     37   1.1      matt /* Define the various Interrupt Priority Levels */
     38   1.1      matt 
     39   1.1      matt /* Interrupt Priority Levels are not mutually exclusive. */
     40   1.1      matt 
     41   1.2      matt /* Hardware interrupt levels are 16 (0x10) thru 31 (0x1f)
     42   1.2      matt  */
     43   1.2      matt #define IPL_HIGH	0x1f	/* high -- blocks all interrupts */
     44   1.2      matt #define IPL_CLOCK	0x18	/* clock */
     45  1.17      yamt #define IPL_STATCLOCK	IPL_CLOCK
     46   1.2      matt #define IPL_UBA		0x17	/* unibus adapters */
     47  1.14   thorpej #define IPL_VM		0x17	/* memory allocation */
     48  1.13     ragge #define IPL_NET		0x16	/* network */
     49   1.2      matt #define IPL_BIO		0x15	/* block I/O */
     50   1.2      matt #define IPL_TTY		0x15	/* terminal */
     51   1.2      matt #define IPL_AUDIO	0x15	/* audio */
     52  1.13     ragge #define IPL_IPI		0x14	/* interprocessor interrupt */
     53   1.2      matt #define IPL_CONSMEDIA	0x14	/* console media */
     54   1.1      matt 
     55   1.2      matt /* Software interrupt level s are 0 (0x00) thru 15 (0x0f)
     56   1.2      matt  */
     57   1.2      matt #define IPL_SOFTDDB	0x0f	/* used by DDB on VAX */
     58   1.2      matt #define IPL_SOFTSERIAL	0x0d	/* soft serial */
     59   1.2      matt #define IPL_SOFTNET	0x0c	/* soft network */
     60   1.2      matt #define IPL_SOFTCLOCK	0x08
     61   1.2      matt #define IPL_NONE	0x00
     62   1.2      matt 
     63  1.17      yamt /* Misc
     64  1.17      yamt  */
     65  1.17      yamt 
     66  1.17      yamt #define	IPL_SCHED	IPL_HIGH
     67  1.17      yamt #define	IPL_LOCK	IPL_HIGH
     68  1.17      yamt 
     69   1.2      matt #define IPL_LEVELS	32
     70   1.2      matt 
     71   1.2      matt #define IST_UNUSABLE	-1	/* interrupt cannot be used */
     72   1.2      matt #define IST_NONE	0	/* none (dummy) */
     73   1.2      matt #define IST_PULSE	1	/* pulsed */
     74   1.2      matt #define IST_EDGE	2	/* edge-triggered */
     75   1.2      matt #define IST_LEVEL	3	/* level-triggered */
     76   1.2      matt 
     77   1.2      matt 
     78   1.2      matt #ifdef _KERNEL
     79  1.15    kleink #ifndef __lint__
     80   1.2      matt #define splx(reg)						\
     81   1.2      matt ({								\
     82  1.16     ragge 	register int __val;					\
     83  1.19     perry 	__asm volatile ("mfpr $0x12,%0;mtpr %1,$0x12"		\
     84  1.16     ragge 				: "=&g" (__val)			\
     85   1.2      matt 				: "g" (reg));			\
     86  1.16     ragge 	__val;							\
     87   1.2      matt })
     88   1.2      matt 
     89   1.4      matt #define _splset(reg)						\
     90   1.4      matt ((void)({							\
     91  1.19     perry 	__asm volatile ("mtpr %0,$0x12"			\
     92   1.4      matt 				: 				\
     93   1.4      matt 				: "g" (reg));			\
     94   1.4      matt }))
     95   1.4      matt 
     96  1.18  christos #define splraiseipl(reg)						\
     97   1.2      matt ({								\
     98  1.16     ragge 	register int __val;					\
     99  1.19     perry 	__asm volatile ("mfpr $0x12,%0"			\
    100  1.16     ragge 				: "=&g" (__val)			\
    101   1.2      matt 				: );				\
    102  1.16     ragge 	if ((reg) > __val) {					\
    103   1.4      matt 		_splset(reg);					\
    104   1.2      matt 	}							\
    105  1.16     ragge 	__val;							\
    106   1.2      matt })
    107   1.4      matt 
    108   1.2      matt #define _setsirr(reg)						\
    109   1.4      matt do {								\
    110  1.19     perry 	__asm volatile ("mtpr %0,$0x14"			\
    111   1.2      matt 				:				\
    112   1.2      matt 				: "g" (reg));			\
    113   1.4      matt } while (0)
    114   1.2      matt #endif
    115   1.2      matt 
    116   1.4      matt #define spl0()		_splset(IPL_NONE)		/* IPL00 */
    117   1.4      matt #define spllowersoftclock() _splset(IPL_SOFTCLOCK)	/* IPL08 */
    118  1.18  christos #define splddb()	splraiseipl(IPL_SOFTDDB)	/* IPL0F */
    119  1.18  christos #define splconsmedia()	splraiseipl(IPL_CONSMEDIA)	/* IPL14 */
    120   1.6   thorpej 
    121  1.17      yamt #include <sys/spl.h>
    122   1.2      matt 
    123   1.2      matt /* These are better to use when playing with VAX buses */
    124  1.18  christos #define	spluba()	splraiseipl(IPL_UBA)		/* IPL17 */
    125   1.2      matt #define spl4()		splx(0x14)
    126   1.2      matt #define spl5()		splx(0x15)
    127   1.2      matt #define spl6()		splx(0x16)
    128   1.2      matt #define spl7()		splx(0x17)
    129   1.1      matt 
    130   1.2      matt /* schedule software interrupts
    131   1.2      matt  */
    132   1.2      matt #define setsoftddb()	_setsirr(IPL_SOFTDDB)
    133   1.2      matt #define setsoftserial()	_setsirr(IPL_SOFTSERIAL)
    134   1.2      matt #define setsoftnet()	_setsirr(IPL_SOFTNET)
    135   1.2      matt 
    136   1.2      matt #if !defined(_LOCORE)
    137   1.2      matt LIST_HEAD(sh_head, softintr_handler);
    138   1.2      matt 
    139   1.2      matt struct softintr_head {
    140   1.2      matt 	int shd_ipl;
    141   1.2      matt 	struct sh_head shd_intrs;
    142   1.2      matt };
    143   1.2      matt 
    144   1.2      matt struct softintr_handler {
    145   1.2      matt 	struct softintr_head *sh_head;
    146   1.2      matt 	LIST_ENTRY(softintr_handler) sh_link;
    147   1.2      matt 	void (*sh_func)(void *);
    148   1.2      matt 	void *sh_arg;
    149   1.2      matt 	int sh_pending;
    150   1.2      matt };
    151   1.2      matt 
    152   1.2      matt extern void *softintr_establish(int, void (*)(void *), void *);
    153   1.2      matt extern void softintr_disestablish(void *);
    154   1.2      matt 
    155  1.20     perry static __inline void
    156   1.2      matt softintr_schedule(void *arg)
    157   1.2      matt {
    158   1.2      matt 	struct softintr_handler * const sh = arg;
    159   1.2      matt 	sh->sh_pending = 1;
    160   1.2      matt 	_setsirr(sh->sh_head->shd_ipl);
    161   1.2      matt }
    162   1.2      matt #endif /* _LOCORE */
    163   1.2      matt #endif /* _KERNEL */
    164   1.1      matt #endif	/* _VAX_INTR_H */
    165