intr.h revision 1.26 1 1.26 matt /* $NetBSD: intr.h,v 1.26 2008/02/03 08:32:25 matt Exp $ */
2 1.1 matt
3 1.1 matt /*
4 1.1 matt * Copyright (c) 1998 Matt Thomas.
5 1.1 matt * All rights reserved.
6 1.1 matt *
7 1.1 matt * Redistribution and use in source and binary forms, with or without
8 1.1 matt * modification, are permitted provided that the following conditions
9 1.1 matt * are met:
10 1.1 matt * 1. Redistributions of source code must retain the above copyright
11 1.1 matt * notice, this list of conditions and the following disclaimer.
12 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 matt * notice, this list of conditions and the following disclaimer in the
14 1.1 matt * documentation and/or other materials provided with the distribution.
15 1.1 matt * 3. The name of the company nor the name of the author may be used to
16 1.1 matt * endorse or promote products derived from this software without specific
17 1.1 matt * prior written permission.
18 1.1 matt *
19 1.1 matt * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
20 1.1 matt * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
21 1.1 matt * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 1.1 matt * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
23 1.1 matt * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 1.1 matt * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25 1.1 matt * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 1.1 matt * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 1.1 matt * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 1.1 matt * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 1.1 matt * SUCH DAMAGE.
30 1.1 matt */
31 1.1 matt
32 1.1 matt #ifndef _VAX_INTR_H_
33 1.1 matt #define _VAX_INTR_H_
34 1.1 matt
35 1.2 matt #include <sys/queue.h>
36 1.22 matt #include <machine/mtpr.h>
37 1.2 matt
38 1.1 matt /* Define the various Interrupt Priority Levels */
39 1.1 matt
40 1.1 matt /* Interrupt Priority Levels are not mutually exclusive. */
41 1.1 matt
42 1.2 matt /* Hardware interrupt levels are 16 (0x10) thru 31 (0x1f)
43 1.2 matt */
44 1.2 matt #define IPL_HIGH 0x1f /* high -- blocks all interrupts */
45 1.25 ad #define IPL_SCHED 0x18 /* clock */
46 1.14 thorpej #define IPL_VM 0x17 /* memory allocation */
47 1.1 matt
48 1.25 ad /* Software interrupt levels are 0 (0x00) thru 15 (0x0f)
49 1.2 matt */
50 1.2 matt #define IPL_SOFTDDB 0x0f /* used by DDB on VAX */
51 1.2 matt #define IPL_SOFTSERIAL 0x0d /* soft serial */
52 1.2 matt #define IPL_SOFTNET 0x0c /* soft network */
53 1.26 matt #define IPL_SOFTBIO 0x0b /* soft bio */
54 1.2 matt #define IPL_SOFTCLOCK 0x08
55 1.2 matt #define IPL_NONE 0x00
56 1.2 matt
57 1.25 ad /* vax weirdness
58 1.25 ad */
59 1.25 ad #define IPL_UBA IPL_VM /* unibus adapters */
60 1.25 ad #define IPL_CONSMEDIA IPL_VM /* console media */
61 1.25 ad
62 1.17 yamt /* Misc
63 1.17 yamt */
64 1.17 yamt
65 1.2 matt #define IPL_LEVELS 32
66 1.2 matt
67 1.2 matt #define IST_UNUSABLE -1 /* interrupt cannot be used */
68 1.2 matt #define IST_NONE 0 /* none (dummy) */
69 1.2 matt #define IST_PULSE 1 /* pulsed */
70 1.2 matt #define IST_EDGE 2 /* edge-triggered */
71 1.2 matt #define IST_LEVEL 3 /* level-triggered */
72 1.2 matt
73 1.2 matt
74 1.2 matt #ifdef _KERNEL
75 1.22 matt typedef int ipl_t;
76 1.22 matt
77 1.24 matt static inline void
78 1.24 matt _splset(ipl_t ipl)
79 1.24 matt {
80 1.24 matt mtpr(ipl, PR_IPL);
81 1.24 matt }
82 1.24 matt
83 1.22 matt static inline ipl_t
84 1.24 matt _splget(void)
85 1.22 matt {
86 1.24 matt return mfpr(PR_IPL);
87 1.22 matt }
88 1.22 matt
89 1.24 matt static inline ipl_t
90 1.24 matt splx(ipl_t new_ipl)
91 1.22 matt {
92 1.24 matt ipl_t old_ipl = _splget();
93 1.24 matt _splset(new_ipl);
94 1.24 matt return old_ipl;
95 1.22 matt }
96 1.4 matt
97 1.21 yamt typedef struct {
98 1.24 matt uint8_t _ipl;
99 1.21 yamt } ipl_cookie_t;
100 1.21 yamt
101 1.21 yamt static inline ipl_cookie_t
102 1.21 yamt makeiplcookie(ipl_t ipl)
103 1.21 yamt {
104 1.24 matt return (ipl_cookie_t){._ipl = (uint8_t)ipl};
105 1.21 yamt }
106 1.21 yamt
107 1.21 yamt static inline int
108 1.21 yamt splraiseipl(ipl_cookie_t icookie)
109 1.21 yamt {
110 1.22 matt ipl_t newipl = icookie._ipl;
111 1.24 matt ipl_t oldipl;
112 1.21 yamt
113 1.24 matt oldipl = _splget();
114 1.24 matt if (newipl > oldipl) {
115 1.21 yamt _splset(newipl);
116 1.21 yamt }
117 1.24 matt return oldipl;
118 1.21 yamt }
119 1.4 matt
120 1.22 matt #define _setsirr(reg) mtpr((reg), PR_SIRR)
121 1.2 matt
122 1.4 matt #define spl0() _splset(IPL_NONE) /* IPL00 */
123 1.21 yamt #define splddb() splraiseipl(makeiplcookie(IPL_SOFTDDB)) /* IPL0F */
124 1.21 yamt #define splconsmedia() splraiseipl(makeiplcookie(IPL_CONSMEDIA)) /* IPL14 */
125 1.6 thorpej
126 1.17 yamt #include <sys/spl.h>
127 1.2 matt
128 1.2 matt /* These are better to use when playing with VAX buses */
129 1.21 yamt #define spluba() splraiseipl(makeiplcookie(IPL_UBA)) /* IPL17 */
130 1.2 matt #define spl4() splx(0x14)
131 1.2 matt #define spl5() splx(0x15)
132 1.2 matt #define spl6() splx(0x16)
133 1.2 matt #define spl7() splx(0x17)
134 1.1 matt
135 1.2 matt /* schedule software interrupts
136 1.2 matt */
137 1.2 matt #define setsoftddb() _setsirr(IPL_SOFTDDB)
138 1.2 matt #define setsoftserial() _setsirr(IPL_SOFTSERIAL)
139 1.2 matt #define setsoftnet() _setsirr(IPL_SOFTNET)
140 1.2 matt
141 1.2 matt #if !defined(_LOCORE)
142 1.2 matt LIST_HEAD(sh_head, softintr_handler);
143 1.2 matt
144 1.2 matt struct softintr_head {
145 1.2 matt int shd_ipl;
146 1.2 matt struct sh_head shd_intrs;
147 1.2 matt };
148 1.2 matt
149 1.2 matt struct softintr_handler {
150 1.2 matt struct softintr_head *sh_head;
151 1.2 matt LIST_ENTRY(softintr_handler) sh_link;
152 1.2 matt void (*sh_func)(void *);
153 1.2 matt void *sh_arg;
154 1.2 matt int sh_pending;
155 1.2 matt };
156 1.2 matt
157 1.2 matt extern void *softintr_establish(int, void (*)(void *), void *);
158 1.2 matt extern void softintr_disestablish(void *);
159 1.2 matt
160 1.20 perry static __inline void
161 1.2 matt softintr_schedule(void *arg)
162 1.2 matt {
163 1.2 matt struct softintr_handler * const sh = arg;
164 1.2 matt sh->sh_pending = 1;
165 1.2 matt _setsirr(sh->sh_head->shd_ipl);
166 1.2 matt }
167 1.2 matt #endif /* _LOCORE */
168 1.2 matt #endif /* _KERNEL */
169 1.1 matt #endif /* _VAX_INTR_H */
170